]> git.proxmox.com Git - mirror_qemu.git/blame - hw/ppc/spapr_vio.c
spapr: replace numa_get_node() with lookup in pc-dimm list
[mirror_qemu.git] / hw / ppc / spapr_vio.c
CommitLineData
4040ab72
DG
1/*
2 * QEMU sPAPR VIO code
3 *
4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
5 * Based on the s390 virtio bus code:
6 * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
7 *
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 */
21
0d75590d 22#include "qemu/osdep.h"
ce9863b7 23#include "qemu/error-report.h"
da34e65c 24#include "qapi/error.h"
83c9f4ca 25#include "hw/hw.h"
03dd024f 26#include "qemu/log.h"
9c17d615 27#include "sysemu/sysemu.h"
83c9f4ca 28#include "hw/boards.h"
83c9f4ca 29#include "hw/loader.h"
4040ab72
DG
30#include "elf.h"
31#include "hw/sysbus.h"
9c17d615
PB
32#include "sysemu/kvm.h"
33#include "sysemu/device_tree.h"
b45d63b6 34#include "kvm_ppc.h"
4040ab72 35
0d09e41a
PB
36#include "hw/ppc/spapr.h"
37#include "hw/ppc/spapr_vio.h"
38#include "hw/ppc/xics.h"
bf5a6696 39#include "hw/ppc/fdt.h"
7ab6a501 40#include "trace.h"
4040ab72 41
4040ab72 42#include <libfdt.h>
4040ab72 43
3cb75a7c 44static Property spapr_vio_props[] = {
a307d594 45 DEFINE_PROP_UINT32("irq", VIOsPAPRDevice, irq, 0), \
3cb75a7c
PB
46 DEFINE_PROP_END_OF_LIST(),
47};
48
c4eda5b7
DG
49static char *spapr_vio_get_dev_name(DeviceState *qdev)
50{
51 VIOsPAPRDevice *dev = VIO_SPAPR_DEVICE(qdev);
52 VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
c4eda5b7
DG
53
54 /* Device tree style name device@reg */
9be38598 55 return g_strdup_printf("%s@%x", pc->dt_name, dev->reg);
c4eda5b7
DG
56}
57
58static void spapr_vio_bus_class_init(ObjectClass *klass, void *data)
59{
60 BusClass *k = BUS_CLASS(klass);
61
62 k->get_dev_path = spapr_vio_get_dev_name;
5a06393f 63 k->get_fw_dev_path = spapr_vio_get_dev_name;
c4eda5b7
DG
64}
65
0d936928
AL
66static const TypeInfo spapr_vio_bus_info = {
67 .name = TYPE_SPAPR_VIO_BUS,
68 .parent = TYPE_BUS,
c4eda5b7 69 .class_init = spapr_vio_bus_class_init,
0d936928 70 .instance_size = sizeof(VIOsPAPRBus),
4040ab72
DG
71};
72
73VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg)
74{
0866aca1 75 BusChild *kid;
4040ab72
DG
76 VIOsPAPRDevice *dev = NULL;
77
0866aca1
AL
78 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
79 dev = (VIOsPAPRDevice *)kid->child;
4040ab72 80 if (dev->reg == reg) {
5435352c 81 return dev;
4040ab72
DG
82 }
83 }
84
5435352c 85 return NULL;
4040ab72
DG
86}
87
4040ab72
DG
88static int vio_make_devnode(VIOsPAPRDevice *dev,
89 void *fdt)
90{
3954d33a 91 VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
1e34d859
ME
92 int vdevice_off, node_off, ret;
93 char *dt_name;
4040ab72
DG
94
95 vdevice_off = fdt_path_offset(fdt, "/vdevice");
96 if (vdevice_off < 0) {
97 return vdevice_off;
98 }
99
c4eda5b7 100 dt_name = spapr_vio_get_dev_name(DEVICE(dev));
1e34d859 101 node_off = fdt_add_subnode(fdt, vdevice_off, dt_name);
4ecf8aa5 102 g_free(dt_name);
4040ab72
DG
103 if (node_off < 0) {
104 return node_off;
105 }
106
107 ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg);
108 if (ret < 0) {
109 return ret;
110 }
111
3954d33a 112 if (pc->dt_type) {
4040ab72 113 ret = fdt_setprop_string(fdt, node_off, "device_type",
3954d33a 114 pc->dt_type);
4040ab72
DG
115 if (ret < 0) {
116 return ret;
117 }
118 }
119
3954d33a 120 if (pc->dt_compatible) {
4040ab72 121 ret = fdt_setprop_string(fdt, node_off, "compatible",
3954d33a 122 pc->dt_compatible);
4040ab72
DG
123 if (ret < 0) {
124 return ret;
125 }
126 }
127
a307d594
AK
128 if (dev->irq) {
129 uint32_t ints_prop[] = {cpu_to_be32(dev->irq), 0};
00dc738d
DG
130
131 ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop,
132 sizeof(ints_prop));
133 if (ret < 0) {
134 return ret;
135 }
136 }
137
2b7dc949 138 ret = spapr_tcet_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->tcet);
ad0ebb91
DG
139 if (ret < 0) {
140 return ret;
ee86dfee
DG
141 }
142
3954d33a
AL
143 if (pc->devnode) {
144 ret = (pc->devnode)(dev, fdt, node_off);
4040ab72
DG
145 if (ret < 0) {
146 return ret;
147 }
148 }
149
150 return node_off;
151}
4040ab72 152
b45d63b6
BH
153/*
154 * CRQ handling
155 */
28e02042 156static target_ulong h_reg_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr,
b45d63b6
BH
157 target_ulong opcode, target_ulong *args)
158{
159 target_ulong reg = args[0];
160 target_ulong queue_addr = args[1];
161 target_ulong queue_len = args[2];
162 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
163
164 if (!dev) {
d9599c92 165 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
166 return H_PARAMETER;
167 }
168
169 /* We can't grok a queue size bigger than 256M for now */
170 if (queue_len < 0x1000 || queue_len > 0x10000000) {
d9599c92
DG
171 hcall_dprintf("Queue size too small or too big (0x" TARGET_FMT_lx
172 ")\n", queue_len);
b45d63b6
BH
173 return H_PARAMETER;
174 }
175
176 /* Check queue alignment */
177 if (queue_addr & 0xfff) {
d9599c92 178 hcall_dprintf("Queue not aligned (0x" TARGET_FMT_lx ")\n", queue_addr);
b45d63b6
BH
179 return H_PARAMETER;
180 }
181
182 /* Check if device supports CRQs */
183 if (!dev->crq.SendFunc) {
8e01f355 184 hcall_dprintf("Device does not support CRQ\n");
b45d63b6
BH
185 return H_NOT_FOUND;
186 }
187
b45d63b6
BH
188 /* Already a queue ? */
189 if (dev->crq.qsize) {
8e01f355 190 hcall_dprintf("CRQ already registered\n");
b45d63b6
BH
191 return H_RESOURCE;
192 }
193 dev->crq.qladdr = queue_addr;
194 dev->crq.qsize = queue_len;
195 dev->crq.qnext = 0;
196
7ab6a501 197 trace_spapr_vio_h_reg_crq(reg, queue_addr, queue_len);
b45d63b6
BH
198 return H_SUCCESS;
199}
200
8e01f355
DG
201static target_ulong free_crq(VIOsPAPRDevice *dev)
202{
203 dev->crq.qladdr = 0;
204 dev->crq.qsize = 0;
205 dev->crq.qnext = 0;
206
7ab6a501 207 trace_spapr_vio_free_crq(dev->reg);
8e01f355
DG
208
209 return H_SUCCESS;
210}
211
28e02042 212static target_ulong h_free_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr,
b45d63b6
BH
213 target_ulong opcode, target_ulong *args)
214{
215 target_ulong reg = args[0];
216 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
217
218 if (!dev) {
d9599c92 219 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
220 return H_PARAMETER;
221 }
222
8e01f355 223 return free_crq(dev);
b45d63b6
BH
224}
225
28e02042 226static target_ulong h_send_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr,
b45d63b6
BH
227 target_ulong opcode, target_ulong *args)
228{
229 target_ulong reg = args[0];
230 target_ulong msg_hi = args[1];
231 target_ulong msg_lo = args[2];
232 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
233 uint64_t crq_mangle[2];
234
235 if (!dev) {
d9599c92 236 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
237 return H_PARAMETER;
238 }
239 crq_mangle[0] = cpu_to_be64(msg_hi);
240 crq_mangle[1] = cpu_to_be64(msg_lo);
241
242 if (dev->crq.SendFunc) {
243 return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle);
244 }
245
246 return H_HARDWARE;
247}
248
28e02042 249static target_ulong h_enable_crq(PowerPCCPU *cpu, sPAPRMachineState *spapr,
b45d63b6
BH
250 target_ulong opcode, target_ulong *args)
251{
252 target_ulong reg = args[0];
253 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
254
255 if (!dev) {
d9599c92 256 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
257 return H_PARAMETER;
258 }
259
260 return 0;
261}
262
263/* Returns negative error, 0 success, or positive: queue full */
264int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq)
265{
266 int rc;
267 uint8_t byte;
268
269 if (!dev->crq.qsize) {
ce9863b7 270 error_report("spapr_vio_send_creq on uninitialized queue");
b45d63b6
BH
271 return -1;
272 }
273
274 /* Maybe do a fast path for KVM just writing to the pages */
ad0ebb91 275 rc = spapr_vio_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1);
b45d63b6
BH
276 if (rc) {
277 return rc;
278 }
279 if (byte != 0) {
280 return 1;
281 }
282
ad0ebb91 283 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8,
b45d63b6
BH
284 &crq[8], 8);
285 if (rc) {
286 return rc;
287 }
288
289 kvmppc_eieio();
290
ad0ebb91 291 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8);
b45d63b6
BH
292 if (rc) {
293 return rc;
294 }
295
296 dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize;
297
298 if (dev->signal_state & 1) {
a307d594 299 qemu_irq_pulse(spapr_vio_qirq(dev));
b45d63b6
BH
300 }
301
302 return 0;
303}
304
08942ac1
BH
305/* "quiesce" handling */
306
307static void spapr_vio_quiesce_one(VIOsPAPRDevice *dev)
308{
2b7dc949 309 if (dev->tcet) {
a83000f5 310 device_reset(DEVICE(dev->tcet));
08942ac1 311 }
4dd96f24 312 free_crq(dev);
08942ac1
BH
313}
314
ee9a569a
AK
315void spapr_vio_set_bypass(VIOsPAPRDevice *dev, bool bypass)
316{
317 if (!dev->tcet) {
318 return;
319 }
320
321 memory_region_set_enabled(&dev->mrbypass, bypass);
322 memory_region_set_enabled(spapr_tce_get_iommu(dev->tcet), !bypass);
323
324 dev->tcet->bypass = bypass;
325}
326
28e02042 327static void rtas_set_tce_bypass(PowerPCCPU *cpu, sPAPRMachineState *spapr,
210b580b 328 uint32_t token,
08942ac1
BH
329 uint32_t nargs, target_ulong args,
330 uint32_t nret, target_ulong rets)
331{
332 VIOsPAPRBus *bus = spapr->vio_bus;
333 VIOsPAPRDevice *dev;
334 uint32_t unit, enable;
335
336 if (nargs != 2) {
a64d325d 337 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
338 return;
339 }
340 unit = rtas_ld(args, 0);
341 enable = rtas_ld(args, 1);
342 dev = spapr_vio_find_by_reg(bus, unit);
343 if (!dev) {
a64d325d 344 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
345 return;
346 }
ad0ebb91 347
2b7dc949 348 if (!dev->tcet) {
a64d325d 349 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
53724ee5 350 return;
08942ac1
BH
351 }
352
ee9a569a 353 spapr_vio_set_bypass(dev, !!enable);
53724ee5 354
a64d325d 355 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
08942ac1
BH
356}
357
28e02042 358static void rtas_quiesce(PowerPCCPU *cpu, sPAPRMachineState *spapr,
210b580b 359 uint32_t token,
08942ac1
BH
360 uint32_t nargs, target_ulong args,
361 uint32_t nret, target_ulong rets)
362{
363 VIOsPAPRBus *bus = spapr->vio_bus;
0866aca1 364 BusChild *kid;
08942ac1
BH
365 VIOsPAPRDevice *dev = NULL;
366
367 if (nargs != 0) {
a64d325d 368 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
369 return;
370 }
371
0866aca1
AL
372 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
373 dev = (VIOsPAPRDevice *)kid->child;
08942ac1
BH
374 spapr_vio_quiesce_one(dev);
375 }
376
a64d325d 377 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
08942ac1
BH
378}
379
d601fac4 380static VIOsPAPRDevice *reg_conflict(VIOsPAPRDevice *dev)
9fc380d3 381{
215e2098 382 VIOsPAPRBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
0866aca1 383 BusChild *kid;
d601fac4 384 VIOsPAPRDevice *other;
9fc380d3
ME
385
386 /*
d601fac4
DG
387 * Check for a device other than the given one which is already
388 * using the requested address. We have to open code this because
389 * the given dev might already be in the list.
9fc380d3 390 */
0866aca1 391 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
fd506b4f 392 other = VIO_SPAPR_DEVICE(kid->child);
9fc380d3 393
d601fac4
DG
394 if (other != dev && other->reg == dev->reg) {
395 return other;
9fc380d3
ME
396 }
397 }
398
399 return 0;
400}
401
b1c7f725 402static void spapr_vio_busdev_reset(DeviceState *qdev)
8e01f355 403{
fd506b4f 404 VIOsPAPRDevice *dev = VIO_SPAPR_DEVICE(qdev);
b1c7f725 405 VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
8e01f355 406
4dd96f24
DG
407 /* Shut down the request queue and TCEs if necessary */
408 spapr_vio_quiesce_one(dev);
409
410 dev->signal_state = 0;
b1c7f725 411
ee9a569a 412 spapr_vio_set_bypass(dev, false);
b1c7f725
DG
413 if (pc->reset) {
414 pc->reset(dev);
415 }
8e01f355
DG
416}
417
28b07e73 418static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp)
4040ab72 419{
28e02042 420 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
4040ab72 421 VIOsPAPRDevice *dev = (VIOsPAPRDevice *)qdev;
3954d33a 422 VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
4040ab72 423 char *id;
a005b3ef 424 Error *local_err = NULL;
9fc380d3 425
d601fac4
DG
426 if (dev->reg != -1) {
427 /*
428 * Explicitly assigned address, just verify that no-one else
429 * is using it. other mechanism). We have to open code this
430 * rather than using spapr_vio_find_by_reg() because sdev
431 * itself is already in the list.
432 */
433 VIOsPAPRDevice *other = reg_conflict(dev);
434
435 if (other) {
28b07e73
MA
436 error_setg(errp, "%s and %s devices conflict at address %#x",
437 object_get_typename(OBJECT(qdev)),
438 object_get_typename(OBJECT(&other->qdev)),
439 dev->reg);
440 return;
d601fac4
DG
441 }
442 } else {
443 /* Need to assign an address */
215e2098 444 VIOsPAPRBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
d601fac4
DG
445
446 do {
447 dev->reg = bus->next_reg++;
448 } while (reg_conflict(dev));
9fc380d3 449 }
4040ab72 450
1e34d859
ME
451 /* Don't overwrite ids assigned on the command line */
452 if (!dev->qdev.id) {
c4eda5b7 453 id = spapr_vio_get_dev_name(DEVICE(dev));
1e34d859 454 dev->qdev.id = id;
4040ab72
DG
455 }
456
60c6823b 457 dev->irq = spapr_irq_alloc(spapr, dev->irq, false, &local_err);
a005b3ef
GK
458 if (local_err) {
459 error_propagate(errp, local_err);
28b07e73 460 return;
416343b1 461 }
4040ab72 462
53724ee5 463 if (pc->rtce_window_size) {
4290ca49 464 uint32_t liobn = SPAPR_VIO_LIOBN(dev->reg);
ee9a569a
AK
465
466 memory_region_init(&dev->mrroot, OBJECT(dev), "iommu-spapr-root",
467 ram_size);
468 memory_region_init_alias(&dev->mrbypass, OBJECT(dev),
469 "iommu-spapr-bypass", get_system_memory(),
470 0, ram_size);
471 memory_region_add_subregion_overlap(&dev->mrroot, 0, &dev->mrbypass, 1);
472 address_space_init(&dev->as, &dev->mrroot, qdev->id);
473
df7625d4
AK
474 dev->tcet = spapr_tce_new_table(qdev, liobn);
475 spapr_tce_table_enable(dev->tcet, SPAPR_TCE_PAGE_SHIFT, 0,
476 pc->rtce_window_size >> SPAPR_TCE_PAGE_SHIFT);
ee9a569a
AK
477 dev->tcet->vdev = dev;
478 memory_region_add_subregion_overlap(&dev->mrroot, 0,
479 spapr_tce_get_iommu(dev->tcet), 2);
53724ee5 480 }
ee86dfee 481
28b07e73 482 pc->realize(dev, errp);
4040ab72
DG
483}
484
28e02042 485static target_ulong h_vio_signal(PowerPCCPU *cpu, sPAPRMachineState *spapr,
00dc738d
DG
486 target_ulong opcode,
487 target_ulong *args)
488{
489 target_ulong reg = args[0];
490 target_ulong mode = args[1];
491 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
3954d33a 492 VIOsPAPRDeviceClass *pc;
00dc738d
DG
493
494 if (!dev) {
495 return H_PARAMETER;
496 }
497
3954d33a 498 pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
00dc738d 499
3954d33a 500 if (mode & ~pc->signal_mask) {
00dc738d
DG
501 return H_PARAMETER;
502 }
503
504 dev->signal_state = mode;
505
506 return H_SUCCESS;
507}
508
4040ab72
DG
509VIOsPAPRBus *spapr_vio_bus_init(void)
510{
511 VIOsPAPRBus *bus;
512 BusState *qbus;
513 DeviceState *dev;
4040ab72
DG
514
515 /* Create bridge device */
215e2098 516 dev = qdev_create(NULL, TYPE_SPAPR_VIO_BRIDGE);
4040ab72
DG
517 qdev_init_nofail(dev);
518
519 /* Create bus on bridge device */
0d936928 520 qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio");
215e2098 521 bus = SPAPR_VIO_BUS(qbus);
1ea1ce8a 522 bus->next_reg = 0x71000000;
4040ab72 523
00dc738d
DG
524 /* hcall-vio */
525 spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal);
526
b45d63b6
BH
527 /* hcall-crq */
528 spapr_register_hypercall(H_REG_CRQ, h_reg_crq);
529 spapr_register_hypercall(H_FREE_CRQ, h_free_crq);
530 spapr_register_hypercall(H_SEND_CRQ, h_send_crq);
531 spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq);
532
08942ac1 533 /* RTAS calls */
3a3b8502
AK
534 spapr_rtas_register(RTAS_IBM_SET_TCE_BYPASS, "ibm,set-tce-bypass",
535 rtas_set_tce_bypass);
536 spapr_rtas_register(RTAS_QUIESCE, "quiesce", rtas_quiesce);
08942ac1 537
4040ab72
DG
538 return bus;
539}
540
999e12bb
AL
541static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data)
542{
5a06393f 543 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb 544
5a06393f 545 dc->fw_name = "vdevice";
999e12bb
AL
546}
547
8c43a6f0 548static const TypeInfo spapr_vio_bridge_info = {
215e2098 549 .name = TYPE_SPAPR_VIO_BRIDGE,
39bffca2 550 .parent = TYPE_SYS_BUS_DEVICE,
39bffca2 551 .class_init = spapr_vio_bridge_class_init,
4040ab72
DG
552};
553
b368a7d8
DG
554const VMStateDescription vmstate_spapr_vio = {
555 .name = "spapr_vio",
556 .version_id = 1,
557 .minimum_version_id = 1,
3aff6c2f 558 .fields = (VMStateField[]) {
b368a7d8 559 /* Sanity check */
d2164ad3
HP
560 VMSTATE_UINT32_EQUAL(reg, VIOsPAPRDevice, NULL),
561 VMSTATE_UINT32_EQUAL(irq, VIOsPAPRDevice, NULL),
b368a7d8
DG
562
563 /* General VIO device state */
cbd62f86 564 VMSTATE_UINT64(signal_state, VIOsPAPRDevice),
b368a7d8
DG
565 VMSTATE_UINT64(crq.qladdr, VIOsPAPRDevice),
566 VMSTATE_UINT32(crq.qsize, VIOsPAPRDevice),
567 VMSTATE_UINT32(crq.qnext, VIOsPAPRDevice),
568
569 VMSTATE_END_OF_LIST()
570 },
571};
572
39bffca2
AL
573static void vio_spapr_device_class_init(ObjectClass *klass, void *data)
574{
575 DeviceClass *k = DEVICE_CLASS(klass);
28b07e73 576 k->realize = spapr_vio_busdev_realize;
b1c7f725 577 k->reset = spapr_vio_busdev_reset;
0d936928 578 k->bus_type = TYPE_SPAPR_VIO_BUS;
bce54474 579 k->props = spapr_vio_props;
39bffca2
AL
580}
581
8c43a6f0 582static const TypeInfo spapr_vio_type_info = {
3954d33a
AL
583 .name = TYPE_VIO_SPAPR_DEVICE,
584 .parent = TYPE_DEVICE,
585 .instance_size = sizeof(VIOsPAPRDevice),
586 .abstract = true,
587 .class_size = sizeof(VIOsPAPRDeviceClass),
39bffca2 588 .class_init = vio_spapr_device_class_init,
3954d33a
AL
589};
590
83f7d43a 591static void spapr_vio_register_types(void)
4040ab72 592{
0d936928 593 type_register_static(&spapr_vio_bus_info);
39bffca2 594 type_register_static(&spapr_vio_bridge_info);
3954d33a 595 type_register_static(&spapr_vio_type_info);
4040ab72
DG
596}
597
83f7d43a 598type_init(spapr_vio_register_types)
4040ab72 599
05c19438
DG
600static int compare_reg(const void *p1, const void *p2)
601{
602 VIOsPAPRDevice const *dev1, *dev2;
603
604 dev1 = (VIOsPAPRDevice *)*(DeviceState **)p1;
605 dev2 = (VIOsPAPRDevice *)*(DeviceState **)p2;
606
607 if (dev1->reg < dev2->reg) {
608 return -1;
609 }
610 if (dev1->reg == dev2->reg) {
611 return 0;
612 }
613
614 /* dev1->reg > dev2->reg */
615 return 1;
616}
617
bf5a6696 618void spapr_dt_vdevice(VIOsPAPRBus *bus, void *fdt)
4040ab72 619{
05c19438 620 DeviceState *qdev, **qdevs;
0866aca1 621 BusChild *kid;
05c19438 622 int i, num, ret = 0;
bf5a6696
DG
623 int node;
624
625 _FDT(node = fdt_add_subnode(fdt, 0, "vdevice"));
626
627 _FDT(fdt_setprop_string(fdt, node, "device_type", "vdevice"));
628 _FDT(fdt_setprop_string(fdt, node, "compatible", "IBM,vdevice"));
629 _FDT(fdt_setprop_cell(fdt, node, "#address-cells", 1));
630 _FDT(fdt_setprop_cell(fdt, node, "#size-cells", 0));
631 _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2));
632 _FDT(fdt_setprop(fdt, node, "interrupt-controller", NULL, 0));
4040ab72 633
05c19438
DG
634 /* Count qdevs on the bus list */
635 num = 0;
0866aca1 636 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
05c19438
DG
637 num++;
638 }
639
640 /* Copy out into an array of pointers */
641 qdevs = g_malloc(sizeof(qdev) * num);
642 num = 0;
0866aca1
AL
643 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
644 qdevs[num++] = kid->child;
05c19438
DG
645 }
646
647 /* Sort the array */
648 qsort(qdevs, num, sizeof(qdev), compare_reg);
649
650 /* Hack alert. Give the devices to libfdt in reverse order, we happen
651 * to know that will mean they are in forward order in the tree. */
652 for (i = num - 1; i >= 0; i--) {
653 VIOsPAPRDevice *dev = (VIOsPAPRDevice *)(qdevs[i]);
bf5a6696 654 VIOsPAPRDeviceClass *vdc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
4040ab72
DG
655
656 ret = vio_make_devnode(dev, fdt);
4040ab72 657 if (ret < 0) {
bf5a6696
DG
658 error_report("Couldn't create device node /vdevice/%s@%"PRIx32,
659 vdc->dt_name, dev->reg);
660 exit(1);
4040ab72
DG
661 }
662 }
663
5f1d1fc5 664 g_free(qdevs);
4040ab72 665}
68f3a94c 666
7c866c6a 667gchar *spapr_vio_stdout_path(VIOsPAPRBus *bus)
68f3a94c
DG
668{
669 VIOsPAPRDevice *dev;
670 char *name, *path;
68f3a94c
DG
671
672 dev = spapr_vty_get_default(bus);
7c866c6a
DG
673 if (!dev) {
674 return NULL;
68f3a94c
DG
675 }
676
c4eda5b7 677 name = spapr_vio_get_dev_name(DEVICE(dev));
4ecf8aa5 678 path = g_strdup_printf("/vdevice/%s", name);
68f3a94c 679
4ecf8aa5 680 g_free(name);
7c866c6a 681 return path;
68f3a94c 682}