[mirror_qemu.git] / hw / ppc_chrp.c

/*
 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "vl.h"
#include "ppc_mac.h"

/* UniN device */
static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
{
}

static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
{
    return 0;
}

static CPUWriteMemoryFunc *unin_write[] = {
    &unin_writel,
    &unin_writel,
    &unin_writel,
};

static CPUReadMemoryFunc *unin_read[] = {
    &unin_readl,
    &unin_readl,
    &unin_readl,
};

/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (int ram_size, int vga_ram_size,
                             const char *boot_device, DisplayState *ds,
                             const char **fd_filename, int snapshot,
                             const char *kernel_filename,
                             const char *kernel_cmdline,
                             const char *initrd_filename,
                             const char *cpu_model)
{
    CPUState *env = NULL, *envs[MAX_CPUS];
    char buf[1024];
    qemu_irq *pic, **openpic_irqs;
    int unin_memory;
    int linux_boot, i;
    unsigned long bios_offset, vga_bios_offset;
    uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
    PCIBus *pci_bus;
    nvram_t nvram;
#if 0
    MacIONVRAMState *nvr;
    int nvram_mem_index;
#endif
    m48t59_t *m48t59;
    int vga_bios_size, bios_size;
    qemu_irq *dummy_irq;
    int pic_mem_index, dbdma_mem_index, cuda_mem_index;
    int ide_mem_index[2];
    int ppc_boot_device;

    linux_boot = (kernel_filename != NULL);

    /* init CPUs */
    if (cpu_model == NULL)
        cpu_model = "default";
    for (i = 0; i < smp_cpus; i++) {
        env = cpu_init(cpu_model);
        if (!env) {
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
            exit(1);
        }
        /* Set time-base frequency to 100 Mhz */
        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
#if 0
        env->osi_call = vga_osi_call;
#endif
        qemu_register_reset(&cpu_ppc_reset, env);
        register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
        envs[i] = env;
    }
    if (env->nip < 0xFFF80000) {
        /* Special test for PowerPC 601:
         * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
         * But the NVRAM is located at 0xFFF04000...
         */
        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
    }

    /* allocate RAM */
    cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);

    /* allocate and load BIOS */
    bios_offset = ram_size + vga_ram_size;
    if (bios_name == NULL)
        bios_name = BIOS_FILENAME;
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
    bios_size = load_image(buf, phys_ram_base + bios_offset);
    if (bios_size < 0 || bios_size > BIOS_SIZE) {
        cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
        exit(1);
    }
    bios_size = (bios_size + 0xfff) & ~0xfff;
    if (bios_size > 0x00080000) {
        /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
    }
    cpu_register_physical_memory((uint32_t)(-bios_size),
                                 bios_size, bios_offset | IO_MEM_ROM);

    /* allocate and load VGA BIOS */
    vga_bios_offset = bios_offset + bios_size;
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
    vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
    if (vga_bios_size < 0) {
        /* if no bios is present, we can still work */
        fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
        vga_bios_size = 0;
    } else {
        /* set a specific header (XXX: find real Apple format for NDRV
           drivers) */
        phys_ram_base[vga_bios_offset] = 'N';
        phys_ram_base[vga_bios_offset + 1] = 'D';
        phys_ram_base[vga_bios_offset + 2] = 'R';
        phys_ram_base[vga_bios_offset + 3] = 'V';
        cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
                     vga_bios_size);
        vga_bios_size += 8;
    }
    vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;

    if (linux_boot) {
        kernel_base = KERNEL_LOAD_ADDR;
        /* now we can load the kernel */
        kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
        if (kernel_size < 0) {
            cpu_abort(env, "qemu: could not load kernel '%s'\n",
                      kernel_filename);
            exit(1);
        }
        /* load initrd */
        if (initrd_filename) {
            initrd_base = INITRD_LOAD_ADDR;
            initrd_size = load_image(initrd_filename,
                                     phys_ram_base + initrd_base);
            if (initrd_size < 0) {
                cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
                          initrd_filename);
                exit(1);
            }
        } else {
            initrd_base = 0;
            initrd_size = 0;
        }
        ppc_boot_device = 'm';
    } else {
        kernel_base = 0;
        kernel_size = 0;
        initrd_base = 0;
        initrd_size = 0;
        ppc_boot_device = '\0';
        /* We consider that NewWorld PowerMac never have any floppy drive
         * For now, OHW cannot boot from the network.
         */
        for (i = 0; boot_device[i] != '\0'; i++) {
            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
                ppc_boot_device = boot_device[i];
                break;
            }
        }
        if (ppc_boot_device == '\0') {
            fprintf(stderr, "No valid boot device for Mac99 machine\n");
            exit(1);
        }
    }

    isa_mem_base = 0x80000000;

    /* Register 8 MB of ISA IO space */
    isa_mmio_init(0xf2000000, 0x00800000);

    /* UniN init */
    unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
    cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);

    openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
    openpic_irqs[0] =
        qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
    for (i = 0; i < smp_cpus; i++) {
        /* Mac99 IRQ connection between OpenPIC outputs pins
         * and PowerPC input pins
         */
        switch (PPC_INPUT(env)) {
        case PPC_FLAGS_INPUT_6xx:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
            break;
#if defined(TARGET_PPC64)
        case PPC_FLAGS_INPUT_970:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
            break;
#endif /* defined(TARGET_PPC64) */
        default:
            cpu_abort(env, "Bus model not supported on mac99 machine\n");
            exit(1);
        }
    }
    pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
    pci_bus = pci_pmac_init(pic);
    /* init basic PC hardware */
    pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
                 ram_size, vga_ram_size,
                 vga_bios_offset, vga_bios_size);
    
    /* XXX: suppress that */
    dummy_irq = i8259_init(NULL);

    /* XXX: use Mac Serial port */
    serial_init(0x3f8, dummy_irq[4], serial_hds[0]);
    for(i = 0; i < nb_nics; i++) {
        if (!nd_table[i].model)
            nd_table[i].model = "ne2k_pci";
        pci_nic_init(pci_bus, &nd_table[i], -1);
    }
#if 1
    ide_mem_index[0] = pmac_ide_init(&bs_table[0], pic[0x13]);
    ide_mem_index[1] = pmac_ide_init(&bs_table[2], pic[0x14]);
#else
    pci_cmd646_ide_init(pci_bus, &bs_table[0], 0);
#endif
    /* cuda also initialize ADB */
    cuda_init(&cuda_mem_index, pic[0x19]);
    
    adb_kbd_init(&adb_bus);
    adb_mouse_init(&adb_bus);

    dbdma_init(&dbdma_mem_index);

    macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
               cuda_mem_index, NULL, 2, ide_mem_index);

    if (usb_enabled) {
        usb_ohci_init_pci(pci_bus, 3, -1);
    }

    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
        graphic_depth = 15;
#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
    /* The NewWorld NVRAM is not located in the MacIO device */
    nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
    pmac_format_nvram_partition(nvr, 0x2000);
    macio_nvram_map(nvr, 0xFFF04000);
    nvram.opaque = nvr;
    nvram.read_fn = &macio_nvram_read;
    nvram.write_fn = &macio_nvram_write;
#else
    m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
    nvram.opaque = m48t59;
    nvram.read_fn = &m48t59_read;
    nvram.write_fn = &m48t59_write;
#endif
    PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
                         ppc_boot_device, kernel_base, kernel_size,
                         kernel_cmdline,
                         initrd_base, initrd_size,
                         /* XXX: need an option to load a NVRAM image */
                         0,
                         graphic_width, graphic_height, graphic_depth);
    /* No PCI init: the BIOS will do it */

    /* Special port to get debug messages from Open-Firmware */
    register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
 }

QEMUMachine core99_machine = {
    "mac99",
    "Mac99 based PowerMAC",
    ppc_core99_init,
};
Commit	Line	Data
64201201	1	/*
3cbee15b	2	* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
5fafdf24	3	*
47103572	4	* Copyright (c) 2004-2007 Fabrice Bellard
3cbee15b	5	* Copyright (c) 2007 Jocelyn Mayer
5fafdf24	6	*
64201201 FB	7	* Permission is hereby granted, free of charge, to any person obtaining a copy
	8	* of this software and associated documentation files (the "Software"), to deal
	9	* in the Software without restriction, including without limitation the rights
	10	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	11	* copies of the Software, and to permit persons to whom the Software is
	12	* furnished to do so, subject to the following conditions:
	13	*
	14	* The above copyright notice and this permission notice shall be included in
	15	* all copies or substantial portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	22	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	23	* THE SOFTWARE.
	24	*/
	25	#include "vl.h"
3cbee15b	26	#include "ppc_mac.h"
267002cd	27
0aa6a4a2 FB	28	/* UniN device */
	29	static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
	30	{
	31	}
	32
	33	static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
	34	{
	35	return 0;
	36	}
	37
	38	static CPUWriteMemoryFunc *unin_write[] = {
	39	&unin_writel,
	40	&unin_writel,
	41	&unin_writel,
	42	};
	43
	44	static CPUReadMemoryFunc *unin_read[] = {
	45	&unin_readl,
	46	&unin_readl,
	47	&unin_readl,
	48	};
	49
3cbee15b	50	/* PowerPC Mac99 hardware initialisation */
6ac0e82d AZ	51	static void ppc_core99_init (int ram_size, int vga_ram_size,
	52	const char boot_device, DisplayState ds,
	53	const char **fd_filename, int snapshot,
3cbee15b JM	54	const char *kernel_filename,
	55	const char *kernel_cmdline,
	56	const char *initrd_filename,
	57	const char *cpu_model)
64201201	58	{
aaed909a	59	CPUState env = NULL, envs[MAX_CPUS];
64201201	60	char buf[1024];
e9df014c	61	qemu_irq pic, *openpic_irqs;
aef445bd	62	int unin_memory;
d5295253 FB	63	int linux_boot, i;
d5295253 FB	64	unsigned long bios_offset, vga_bios_offset;
b6b8bd18	65	uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
46e50e9d	66	PCIBus *pci_bus;
3cbee15b JM	67	nvram_t nvram;
	68	#if 0
	69	MacIONVRAMState *nvr;
	70	int nvram_mem_index;
	71	#endif
	72	m48t59_t *m48t59;
d5295253	73	int vga_bios_size, bios_size;
d537cf6c	74	qemu_irq *dummy_irq;
3cbee15b JM	75	int pic_mem_index, dbdma_mem_index, cuda_mem_index;
3cbee15b JM	76	int ide_mem_index[2];
28c5af54	77	int ppc_boot_device;
46e50e9d	78
64201201 FB	79	linux_boot = (kernel_filename != NULL);
64201201 FB	80
c68ea704	81	/* init CPUs */
94fc95cd	82	if (cpu_model == NULL)
d12f4c38	83	cpu_model = "default";
e9df014c	84	for (i = 0; i < smp_cpus; i++) {
aaed909a FB	85	env = cpu_init(cpu_model);
	86	if (!env) {
	87	fprintf(stderr, "Unable to find PowerPC CPU definition\n");
	88	exit(1);
	89	}
e9df014c JM	90	/* Set time-base frequency to 100 Mhz */
e9df014c JM	91	cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
3cbee15b	92	#if 0
e9df014c	93	env->osi_call = vga_osi_call;
3cbee15b	94	#endif
fe33cc71 JM	95	qemu_register_reset(&cpu_ppc_reset, env);
fe33cc71 JM	96	register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
e9df014c JM	97	envs[i] = env;
e9df014c JM	98	}
4c823cff JM	99	if (env->nip < 0xFFF80000) {
	100	/* Special test for PowerPC 601:
	101	* the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
	102	* But the NVRAM is located at 0xFFF04000...
	103	*/
	104	cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
	105	}
c68ea704	106
64201201 FB	107	/* allocate RAM */
	108	cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
	109
	110	/* allocate and load BIOS */
	111	bios_offset = ram_size + vga_ram_size;
1192dad8 JM	112	if (bios_name == NULL)
	113	bios_name = BIOS_FILENAME;
	114	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
d5295253 FB	115	bios_size = load_image(buf, phys_ram_base + bios_offset);
d5295253 FB	116	if (bios_size < 0 \|\| bios_size > BIOS_SIZE) {
4a057712	117	cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
64201201 FB	118	exit(1);
64201201 FB	119	}
d5295253	120	bios_size = (bios_size + 0xfff) & ~0xfff;
4c823cff JM	121	if (bios_size > 0x00080000) {
	122	/* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
	123	cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
	124	}
4a057712	125	cpu_register_physical_memory((uint32_t)(-bios_size),
d5295253	126	bios_size, bios_offset \| IO_MEM_ROM);
3b46e624	127
d5295253 FB	128	/* allocate and load VGA BIOS */
	129	vga_bios_offset = bios_offset + bios_size;
	130	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
	131	vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
	132	if (vga_bios_size < 0) {
	133	/* if no bios is present, we can still work */
	134	fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
	135	vga_bios_size = 0;
	136	} else {
	137	/* set a specific header (XXX: find real Apple format for NDRV
	138	drivers) */
	139	phys_ram_base[vga_bios_offset] = 'N';
	140	phys_ram_base[vga_bios_offset + 1] = 'D';
	141	phys_ram_base[vga_bios_offset + 2] = 'R';
	142	phys_ram_base[vga_bios_offset + 3] = 'V';
5fafdf24	143	cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
d5295253 FB	144	vga_bios_size);
	145	vga_bios_size += 8;
	146	}
	147	vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
3b46e624	148
b6b8bd18 FB	149	if (linux_boot) {
	150	kernel_base = KERNEL_LOAD_ADDR;
	151	/* now we can load the kernel */
	152	kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
	153	if (kernel_size < 0) {
4a057712 JM	154	cpu_abort(env, "qemu: could not load kernel '%s'\n",
4a057712 JM	155	kernel_filename);
b6b8bd18 FB	156	exit(1);
	157	}
	158	/* load initrd */
	159	if (initrd_filename) {
	160	initrd_base = INITRD_LOAD_ADDR;
	161	initrd_size = load_image(initrd_filename,
	162	phys_ram_base + initrd_base);
	163	if (initrd_size < 0) {
4a057712 JM	164	cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
4a057712 JM	165	initrd_filename);
b6b8bd18 FB	166	exit(1);
	167	}
	168	} else {
	169	initrd_base = 0;
	170	initrd_size = 0;
	171	}
6ac0e82d	172	ppc_boot_device = 'm';
b6b8bd18 FB	173	} else {
	174	kernel_base = 0;
	175	kernel_size = 0;
	176	initrd_base = 0;
	177	initrd_size = 0;
28c5af54 JM	178	ppc_boot_device = '\0';
	179	/* We consider that NewWorld PowerMac never have any floppy drive
	180	* For now, OHW cannot boot from the network.
	181	*/
0d913fdb JM	182	for (i = 0; boot_device[i] != '\0'; i++) {
	183	if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
	184	ppc_boot_device = boot_device[i];
28c5af54	185	break;
0d913fdb	186	}
28c5af54 JM	187	}
	188	if (ppc_boot_device == '\0') {
	189	fprintf(stderr, "No valid boot device for Mac99 machine\n");
	190	exit(1);
	191	}
b6b8bd18	192	}
0aa6a4a2	193
3cbee15b	194	isa_mem_base = 0x80000000;
aef445bd	195
3cbee15b JM	196	/* Register 8 MB of ISA IO space */
3cbee15b JM	197	isa_mmio_init(0xf2000000, 0x00800000);
3b46e624	198
3cbee15b JM	199	/* UniN init */
	200	unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
	201	cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
47103572	202
3cbee15b JM	203	openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
	204	openpic_irqs[0] =
	205	qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
	206	for (i = 0; i < smp_cpus; i++) {
	207	/* Mac99 IRQ connection between OpenPIC outputs pins
	208	* and PowerPC input pins
	209	*/
	210	switch (PPC_INPUT(env)) {
	211	case PPC_FLAGS_INPUT_6xx:
	212	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	213	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	214	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	215	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	216	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	217	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	218	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
	219	/* Not connected ? */
	220	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	221	/* Check this */
	222	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	223	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
	224	break;
00af685f	225	#if defined(TARGET_PPC64)
3cbee15b JM	226	case PPC_FLAGS_INPUT_970:
	227	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	228	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	229	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	230	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	231	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	232	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	233	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
	234	/* Not connected ? */
	235	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	236	/* Check this */
	237	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	238	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
	239	break;
00af685f	240	#endif /* defined(TARGET_PPC64) */
3cbee15b JM	241	default:
	242	cpu_abort(env, "Bus model not supported on mac99 machine\n");
	243	exit(1);
0aa6a4a2	244	}
3cbee15b JM	245	}
	246	pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
	247	pci_bus = pci_pmac_init(pic);
	248	/* init basic PC hardware */
	249	pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
	250	ram_size, vga_ram_size,
	251	vga_bios_offset, vga_bios_size);
	252
	253	/* XXX: suppress that */
	254	dummy_irq = i8259_init(NULL);
	255
	256	/* XXX: use Mac Serial port */
	257	serial_init(0x3f8, dummy_irq[4], serial_hds[0]);
	258	for(i = 0; i < nb_nics; i++) {
	259	if (!nd_table[i].model)
	260	nd_table[i].model = "ne2k_pci";
	261	pci_nic_init(pci_bus, &nd_table[i], -1);
	262	}
0aa6a4a2	263	#if 1
3cbee15b JM	264	ide_mem_index[0] = pmac_ide_init(&bs_table[0], pic[0x13]);
3cbee15b JM	265	ide_mem_index[1] = pmac_ide_init(&bs_table[2], pic[0x14]);
0aa6a4a2	266	#else
3cbee15b	267	pci_cmd646_ide_init(pci_bus, &bs_table[0], 0);
0aa6a4a2	268	#endif
3cbee15b JM	269	/* cuda also initialize ADB */
	270	cuda_init(&cuda_mem_index, pic[0x19]);
	271
	272	adb_kbd_init(&adb_bus);
	273	adb_mouse_init(&adb_bus);
3b46e624	274
3cbee15b	275	dbdma_init(&dbdma_mem_index);
3b46e624	276
3cbee15b	277	macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
74e91155	278	cuda_mem_index, NULL, 2, ide_mem_index);
0d92ed30 PB	279
0d92ed30 PB	280	if (usb_enabled) {
e24ad6f1	281	usb_ohci_init_pci(pci_bus, 3, -1);
0d92ed30 PB	282	}
0d92ed30 PB	283
b6b8bd18 FB	284	if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
b6b8bd18 FB	285	graphic_depth = 15;
3cbee15b JM	286	#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
3cbee15b JM	287	/* The NewWorld NVRAM is not located in the MacIO device */
74e91155	288	nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
3cbee15b	289	pmac_format_nvram_partition(nvr, 0x2000);
74e91155	290	macio_nvram_map(nvr, 0xFFF04000);
3cbee15b JM	291	nvram.opaque = nvr;
	292	nvram.read_fn = &macio_nvram_read;
	293	nvram.write_fn = &macio_nvram_write;
	294	#else
	295	m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
	296	nvram.opaque = m48t59;
	297	nvram.read_fn = &m48t59_read;
	298	nvram.write_fn = &m48t59_write;
	299	#endif
6ac0e82d AZ	300	PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
6ac0e82d AZ	301	ppc_boot_device, kernel_base, kernel_size,
b6b8bd18 FB	302	kernel_cmdline,
b6b8bd18 FB	303	initrd_base, initrd_size,
64201201	304	/* XXX: need an option to load a NVRAM image */
b6b8bd18 FB	305	0,
	306	graphic_width, graphic_height, graphic_depth);
	307	/* No PCI init: the BIOS will do it */
0aa6a4a2 FB	308
	309	/* Special port to get debug messages from Open-Firmware */
	310	register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
3cbee15b	311	}
0aa6a4a2 FB	312
0aa6a4a2 FB	313	QEMUMachine core99_machine = {
0289b2c1 FB	314	"mac99",
0289b2c1 FB	315	"Mac99 based PowerMAC",
0aa6a4a2 FB	316	ppc_core99_init,
0aa6a4a2 FB	317	};