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ae0bfb79 1
3cbee15b 2/*
4d7ca41e 3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
3cbee15b
JM
4 *
5 * Copyright (c) 2004-2007 Fabrice Bellard
6 * Copyright (c) 2007 Jocelyn Mayer
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
87ecb68b
PB
26#include "hw.h"
27#include "ppc.h"
3cbee15b 28#include "ppc_mac.h"
28ce5ce6 29#include "mac_dbdma.h"
87ecb68b
PB
30#include "nvram.h"
31#include "pc.h"
32#include "sysemu.h"
33#include "net.h"
34#include "isa.h"
35#include "pci.h"
18e08a55 36#include "usb-ohci.h"
87ecb68b 37#include "boards.h"
271dd5e0 38#include "fw_cfg.h"
7fa9ae1a 39#include "escc.h"
977e1244 40#include "ide.h"
ca20cf32
BS
41#include "loader.h"
42#include "elf.h"
dc702288 43#include "kvm.h"
dc333cd6 44#include "kvm_ppc.h"
2446333c 45#include "blockdev.h"
1e39101c 46#include "exec-memory.h"
3cbee15b 47
e4bcb14c 48#define MAX_IDE_BUS 2
271dd5e0
BS
49#define CFG_ADDR 0xf0000510
50
513f789f
BS
51static int fw_cfg_boot_set(void *opaque, const char *boot_device)
52{
53 fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
54 return 0;
55}
56
409dbce5
AJ
57
58static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
59{
60 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
61}
62
b9e17a34
AG
63static target_phys_addr_t round_page(target_phys_addr_t addr)
64{
65 return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
66}
67
c227f099 68static void ppc_heathrow_init (ram_addr_t ram_size,
3023f332 69 const char *boot_device,
3cbee15b
JM
70 const char *kernel_filename,
71 const char *kernel_cmdline,
72 const char *initrd_filename,
73 const char *cpu_model)
74{
49a2942d 75 CPUState *env = NULL;
5cea8590 76 char *filename;
3cbee15b 77 qemu_irq *pic, **heathrow_irqs;
3cbee15b 78 int linux_boot, i;
ae0bfb79 79 ram_addr_t ram_offset, bios_offset;
b9e17a34 80 uint32_t kernel_base, initrd_base, cmdline_base = 0;
7373048c 81 int32_t kernel_size, initrd_size;
3cbee15b
JM
82 PCIBus *pci_bus;
83 MacIONVRAMState *nvr;
ae0bfb79 84 int bios_size;
23c5e4ca 85 MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem;
5b15f275 86 MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1), *ide_mem[2];
513f789f 87 uint16_t ppc_boot_device;
f455e98c 88 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
271dd5e0 89 void *fw_cfg;
28ce5ce6 90 void *dbdma;
3cbee15b
JM
91
92 linux_boot = (kernel_filename != NULL);
93
94 /* init CPUs */
3cbee15b 95 if (cpu_model == NULL)
f2fde45a 96 cpu_model = "G3";
3cbee15b 97 for (i = 0; i < smp_cpus; i++) {
aaed909a
FB
98 env = cpu_init(cpu_model);
99 if (!env) {
100 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
101 exit(1);
102 }
b0fb43d8
AJ
103 /* Set time-base frequency to 16.6 Mhz */
104 cpu_ppc_tb_init(env, 16600000UL);
d84bda46 105 qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
3cbee15b
JM
106 }
107
108 /* allocate RAM */
6b4079f8
AJ
109 if (ram_size > (2047 << 20)) {
110 fprintf(stderr,
111 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
112 ((unsigned int)ram_size / (1 << 20)));
113 exit(1);
114 }
115
1724f049 116 ram_offset = qemu_ram_alloc(NULL, "ppc_heathrow.ram", ram_size);
a748ab6d
AJ
117 cpu_register_physical_memory(0, ram_size, ram_offset);
118
3cbee15b 119 /* allocate and load BIOS */
1724f049 120 bios_offset = qemu_ram_alloc(NULL, "ppc_heathrow.bios", BIOS_SIZE);
3cbee15b 121 if (bios_name == NULL)
992e5acd 122 bios_name = PROM_FILENAME;
5cea8590 123 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
992e5acd
BS
124 cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
125
126 /* Load OpenBIOS (ELF) */
5cea8590 127 if (filename) {
409dbce5
AJ
128 bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
129 1, ELF_MACHINE, 0);
7267c094 130 g_free(filename);
5cea8590
PB
131 } else {
132 bios_size = -1;
133 }
3cbee15b 134 if (bios_size < 0 || bios_size > BIOS_SIZE) {
5cea8590 135 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
3cbee15b
JM
136 exit(1);
137 }
3cbee15b 138
3cbee15b 139 if (linux_boot) {
36bee1e3 140 uint64_t lowaddr = 0;
ca20cf32
BS
141 int bswap_needed;
142
143#ifdef BSWAP_NEEDED
144 bswap_needed = 1;
145#else
146 bswap_needed = 0;
147#endif
3cbee15b 148 kernel_base = KERNEL_LOAD_ADDR;
409dbce5
AJ
149 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
150 NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
52f163b7
BS
151 if (kernel_size < 0)
152 kernel_size = load_aout(kernel_filename, kernel_base,
ca20cf32
BS
153 ram_size - kernel_base, bswap_needed,
154 TARGET_PAGE_SIZE);
52f163b7
BS
155 if (kernel_size < 0)
156 kernel_size = load_image_targphys(kernel_filename,
157 kernel_base,
158 ram_size - kernel_base);
3cbee15b 159 if (kernel_size < 0) {
2ac71179 160 hw_error("qemu: could not load kernel '%s'\n",
3cbee15b
JM
161 kernel_filename);
162 exit(1);
163 }
164 /* load initrd */
165 if (initrd_filename) {
b9e17a34 166 initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
dcac9679
PB
167 initrd_size = load_image_targphys(initrd_filename, initrd_base,
168 ram_size - initrd_base);
3cbee15b 169 if (initrd_size < 0) {
2ac71179
PB
170 hw_error("qemu: could not load initial ram disk '%s'\n",
171 initrd_filename);
3cbee15b
JM
172 exit(1);
173 }
b9e17a34 174 cmdline_base = round_page(initrd_base + initrd_size);
3cbee15b
JM
175 } else {
176 initrd_base = 0;
177 initrd_size = 0;
b9e17a34 178 cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
3cbee15b 179 }
6ac0e82d 180 ppc_boot_device = 'm';
3cbee15b
JM
181 } else {
182 kernel_base = 0;
183 kernel_size = 0;
184 initrd_base = 0;
185 initrd_size = 0;
28c5af54 186 ppc_boot_device = '\0';
0d913fdb 187 for (i = 0; boot_device[i] != '\0'; i++) {
28c5af54 188 /* TOFIX: for now, the second IDE channel is not properly
0d913fdb 189 * used by OHW. The Mac floppy disk are not emulated.
28c5af54
JM
190 * For now, OHW cannot boot from the network.
191 */
192#if 0
0d913fdb
JM
193 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
194 ppc_boot_device = boot_device[i];
28c5af54 195 break;
0d913fdb 196 }
28c5af54 197#else
0d913fdb
JM
198 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
199 ppc_boot_device = boot_device[i];
28c5af54 200 break;
0d913fdb 201 }
28c5af54
JM
202#endif
203 }
204 if (ppc_boot_device == '\0') {
8a901def 205 fprintf(stderr, "No valid boot device for G3 Beige machine\n");
28c5af54
JM
206 exit(1);
207 }
3cbee15b
JM
208 }
209
3cbee15b 210 /* Register 2 MB of ISA IO space */
968d683c 211 isa_mmio_init(0xfe000000, 0x00200000);
3cbee15b
JM
212
213 /* XXX: we register only 1 output pin for heathrow PIC */
7267c094 214 heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
3cbee15b 215 heathrow_irqs[0] =
7267c094 216 g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
3cbee15b
JM
217 /* Connect the heathrow PIC outputs to the 6xx bus */
218 for (i = 0; i < smp_cpus; i++) {
219 switch (PPC_INPUT(env)) {
220 case PPC_FLAGS_INPUT_6xx:
221 heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
222 heathrow_irqs[i][0] =
223 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
224 break;
225 default:
2ac71179 226 hw_error("Bus model not supported on OldWorld Mac machine\n");
3cbee15b
JM
227 }
228 }
229
230 /* init basic PC hardware */
231 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
2ac71179 232 hw_error("Only 6xx bus is supported on heathrow machine\n");
3cbee15b 233 }
23c5e4ca 234 pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
aee97b84
AK
235 pci_bus = pci_grackle_init(0xfec00000, pic,
236 get_system_memory(),
237 get_system_io());
78895427 238 pci_vga_init(pci_bus);
aae9366a 239
23c5e4ca 240 escc_mem = escc_init(0x80013000, pic[0x0f], pic[0x10], serial_hds[0],
7fa9ae1a 241 serial_hds[1], ESCC_CLOCK, 4);
5b15f275
AK
242 memory_region_init_alias(escc_bar, "escc-bar",
243 escc_mem, 0, memory_region_size(escc_mem));
aae9366a 244
cb457d76 245 for(i = 0; i < nb_nics; i++)
07caea31 246 pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
0d913fdb 247
e4bcb14c 248
75717903 249 ide_drive_get(hd, MAX_IDE_BUS);
bd4524ed
AJ
250
251 /* First IDE channel is a MAC IDE on the MacIO bus */
23c5e4ca
AK
252 dbdma = DBDMA_init(&dbdma_mem);
253 ide_mem[0] = NULL;
254 ide_mem[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);
e4bcb14c 255
bd4524ed 256 /* Second IDE channel is a CMD646 on the PCI bus */
75717903
IY
257 hd[0] = hd[MAX_IDE_DEVS];
258 hd[1] = hd[MAX_IDE_DEVS + 1];
bd4524ed
AJ
259 hd[3] = hd[2] = NULL;
260 pci_cmd646_ide_init(pci_bus, hd, 0);
3cbee15b
JM
261
262 /* cuda also initialize ADB */
23c5e4ca 263 cuda_init(&cuda_mem, pic[0x12]);
3cbee15b
JM
264
265 adb_kbd_init(&adb_bus);
266 adb_mouse_init(&adb_bus);
aae9366a 267
23c5e4ca 268 nvr = macio_nvram_init(0x2000, 4);
3cbee15b
JM
269 pmac_format_nvram_partition(nvr, 0x2000);
270
23c5e4ca 271 macio_init(pci_bus, PCI_DEVICE_ID_APPLE_343S1201, 1, pic_mem,
5b15f275 272 dbdma_mem, cuda_mem, nvr, 2, ide_mem, escc_bar);
3cbee15b
JM
273
274 if (usb_enabled) {
a67ba3b6 275 usb_ohci_init_pci(pci_bus, -1);
3cbee15b
JM
276 }
277
278 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
279 graphic_depth = 15;
280
3cbee15b
JM
281 /* No PCI init: the BIOS will do it */
282
271dd5e0
BS
283 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
284 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
285 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
286 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
513f789f
BS
287 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
288 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
289 if (kernel_cmdline) {
b9e17a34
AG
290 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
291 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
513f789f
BS
292 } else {
293 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
294 }
295 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
296 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
297 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
7f1aec5f
LV
298
299 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
300 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
301 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
302
45024f09 303 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
dc333cd6
AG
304 if (kvm_enabled()) {
305#ifdef CONFIG_KVM
45024f09
AG
306 uint8_t *hypercall;
307
dc333cd6 308 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
7267c094 309 hypercall = g_malloc(16);
45024f09
AG
310 kvmppc_get_hypercall(env, hypercall, 16);
311 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
312 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
dc333cd6
AG
313#endif
314 } else {
315 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
316 }
317
513f789f 318 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
3cbee15b
JM
319}
320
f80f9ec9 321static QEMUMachine heathrow_machine = {
4d7ca41e 322 .name = "g3beige",
4b32e168
AL
323 .desc = "Heathrow based PowerMAC",
324 .init = ppc_heathrow_init,
3d878caa 325 .max_cpus = MAX_CPUS,
46214a27 326#ifndef TARGET_PPC64
0c257437 327 .is_default = 1,
46214a27 328#endif
3cbee15b 329};
f80f9ec9
AL
330
331static void heathrow_machine_init(void)
332{
333 qemu_register_machine(&heathrow_machine);
334}
335
336machine_init(heathrow_machine_init);