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Commit | Line | Data |
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ae0bfb79 | 1 | |
3cbee15b | 2 | /* |
4d7ca41e | 3 | * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator |
3cbee15b JM |
4 | * |
5 | * Copyright (c) 2004-2007 Fabrice Bellard | |
6 | * Copyright (c) 2007 Jocelyn Mayer | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
9 | * of this software and associated documentation files (the "Software"), to deal | |
10 | * in the Software without restriction, including without limitation the rights | |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
12 | * copies of the Software, and to permit persons to whom the Software is | |
13 | * furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice shall be included in | |
16 | * all copies or substantial portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | */ | |
87ecb68b PB |
26 | #include "hw.h" |
27 | #include "ppc.h" | |
3cbee15b | 28 | #include "ppc_mac.h" |
7a880d93 | 29 | #include "adb.h" |
28ce5ce6 | 30 | #include "mac_dbdma.h" |
87ecb68b PB |
31 | #include "nvram.h" |
32 | #include "pc.h" | |
33 | #include "sysemu.h" | |
34 | #include "net.h" | |
35 | #include "isa.h" | |
36 | #include "pci.h" | |
37 | #include "boards.h" | |
271dd5e0 | 38 | #include "fw_cfg.h" |
7fa9ae1a | 39 | #include "escc.h" |
977e1244 | 40 | #include "ide.h" |
ca20cf32 BS |
41 | #include "loader.h" |
42 | #include "elf.h" | |
dc702288 | 43 | #include "kvm.h" |
dc333cd6 | 44 | #include "kvm_ppc.h" |
2446333c | 45 | #include "blockdev.h" |
1e39101c | 46 | #include "exec-memory.h" |
3cbee15b | 47 | |
e4bcb14c | 48 | #define MAX_IDE_BUS 2 |
271dd5e0 BS |
49 | #define CFG_ADDR 0xf0000510 |
50 | ||
513f789f BS |
51 | static int fw_cfg_boot_set(void *opaque, const char *boot_device) |
52 | { | |
53 | fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); | |
54 | return 0; | |
55 | } | |
56 | ||
409dbce5 AJ |
57 | |
58 | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) | |
59 | { | |
60 | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; | |
61 | } | |
62 | ||
b9e17a34 AG |
63 | static target_phys_addr_t round_page(target_phys_addr_t addr) |
64 | { | |
65 | return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK; | |
66 | } | |
67 | ||
c227f099 | 68 | static void ppc_heathrow_init (ram_addr_t ram_size, |
3023f332 | 69 | const char *boot_device, |
3cbee15b JM |
70 | const char *kernel_filename, |
71 | const char *kernel_cmdline, | |
72 | const char *initrd_filename, | |
73 | const char *cpu_model) | |
74 | { | |
c92bb2c7 | 75 | MemoryRegion *sysmem = get_system_memory(); |
49a2942d | 76 | CPUState *env = NULL; |
5cea8590 | 77 | char *filename; |
3cbee15b | 78 | qemu_irq *pic, **heathrow_irqs; |
3cbee15b | 79 | int linux_boot, i; |
c92bb2c7 AK |
80 | MemoryRegion *ram = g_new(MemoryRegion, 1); |
81 | MemoryRegion *bios = g_new(MemoryRegion, 1); | |
b9e17a34 | 82 | uint32_t kernel_base, initrd_base, cmdline_base = 0; |
7373048c | 83 | int32_t kernel_size, initrd_size; |
3cbee15b JM |
84 | PCIBus *pci_bus; |
85 | MacIONVRAMState *nvr; | |
ae0bfb79 | 86 | int bios_size; |
23c5e4ca | 87 | MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem; |
5b15f275 | 88 | MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1), *ide_mem[2]; |
513f789f | 89 | uint16_t ppc_boot_device; |
f455e98c | 90 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
271dd5e0 | 91 | void *fw_cfg; |
28ce5ce6 | 92 | void *dbdma; |
3cbee15b JM |
93 | |
94 | linux_boot = (kernel_filename != NULL); | |
95 | ||
96 | /* init CPUs */ | |
3cbee15b | 97 | if (cpu_model == NULL) |
f2fde45a | 98 | cpu_model = "G3"; |
3cbee15b | 99 | for (i = 0; i < smp_cpus; i++) { |
aaed909a FB |
100 | env = cpu_init(cpu_model); |
101 | if (!env) { | |
102 | fprintf(stderr, "Unable to find PowerPC CPU definition\n"); | |
103 | exit(1); | |
104 | } | |
b0fb43d8 AJ |
105 | /* Set time-base frequency to 16.6 Mhz */ |
106 | cpu_ppc_tb_init(env, 16600000UL); | |
d84bda46 | 107 | qemu_register_reset((QEMUResetHandler*)&cpu_reset, env); |
3cbee15b JM |
108 | } |
109 | ||
110 | /* allocate RAM */ | |
6b4079f8 AJ |
111 | if (ram_size > (2047 << 20)) { |
112 | fprintf(stderr, | |
113 | "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n", | |
114 | ((unsigned int)ram_size / (1 << 20))); | |
115 | exit(1); | |
116 | } | |
117 | ||
c5705a77 AK |
118 | memory_region_init_ram(ram, "ppc_heathrow.ram", ram_size); |
119 | vmstate_register_ram_global(ram); | |
c92bb2c7 | 120 | memory_region_add_subregion(sysmem, 0, ram); |
a748ab6d | 121 | |
3cbee15b | 122 | /* allocate and load BIOS */ |
c5705a77 AK |
123 | memory_region_init_ram(bios, "ppc_heathrow.bios", BIOS_SIZE); |
124 | vmstate_register_ram_global(bios); | |
3cbee15b | 125 | if (bios_name == NULL) |
992e5acd | 126 | bios_name = PROM_FILENAME; |
5cea8590 | 127 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
c92bb2c7 AK |
128 | memory_region_set_readonly(bios, true); |
129 | memory_region_add_subregion(sysmem, PROM_ADDR, bios); | |
992e5acd BS |
130 | |
131 | /* Load OpenBIOS (ELF) */ | |
5cea8590 | 132 | if (filename) { |
409dbce5 AJ |
133 | bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL, |
134 | 1, ELF_MACHINE, 0); | |
7267c094 | 135 | g_free(filename); |
5cea8590 PB |
136 | } else { |
137 | bios_size = -1; | |
138 | } | |
3cbee15b | 139 | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
5cea8590 | 140 | hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name); |
3cbee15b JM |
141 | exit(1); |
142 | } | |
3cbee15b | 143 | |
3cbee15b | 144 | if (linux_boot) { |
36bee1e3 | 145 | uint64_t lowaddr = 0; |
ca20cf32 BS |
146 | int bswap_needed; |
147 | ||
148 | #ifdef BSWAP_NEEDED | |
149 | bswap_needed = 1; | |
150 | #else | |
151 | bswap_needed = 0; | |
152 | #endif | |
3cbee15b | 153 | kernel_base = KERNEL_LOAD_ADDR; |
409dbce5 AJ |
154 | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, |
155 | NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); | |
52f163b7 BS |
156 | if (kernel_size < 0) |
157 | kernel_size = load_aout(kernel_filename, kernel_base, | |
ca20cf32 BS |
158 | ram_size - kernel_base, bswap_needed, |
159 | TARGET_PAGE_SIZE); | |
52f163b7 BS |
160 | if (kernel_size < 0) |
161 | kernel_size = load_image_targphys(kernel_filename, | |
162 | kernel_base, | |
163 | ram_size - kernel_base); | |
3cbee15b | 164 | if (kernel_size < 0) { |
2ac71179 | 165 | hw_error("qemu: could not load kernel '%s'\n", |
3cbee15b JM |
166 | kernel_filename); |
167 | exit(1); | |
168 | } | |
169 | /* load initrd */ | |
170 | if (initrd_filename) { | |
b9e17a34 | 171 | initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP); |
dcac9679 PB |
172 | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
173 | ram_size - initrd_base); | |
3cbee15b | 174 | if (initrd_size < 0) { |
2ac71179 PB |
175 | hw_error("qemu: could not load initial ram disk '%s'\n", |
176 | initrd_filename); | |
3cbee15b JM |
177 | exit(1); |
178 | } | |
b9e17a34 | 179 | cmdline_base = round_page(initrd_base + initrd_size); |
3cbee15b JM |
180 | } else { |
181 | initrd_base = 0; | |
182 | initrd_size = 0; | |
b9e17a34 | 183 | cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP); |
3cbee15b | 184 | } |
6ac0e82d | 185 | ppc_boot_device = 'm'; |
3cbee15b JM |
186 | } else { |
187 | kernel_base = 0; | |
188 | kernel_size = 0; | |
189 | initrd_base = 0; | |
190 | initrd_size = 0; | |
28c5af54 | 191 | ppc_boot_device = '\0'; |
0d913fdb | 192 | for (i = 0; boot_device[i] != '\0'; i++) { |
28c5af54 | 193 | /* TOFIX: for now, the second IDE channel is not properly |
0d913fdb | 194 | * used by OHW. The Mac floppy disk are not emulated. |
28c5af54 JM |
195 | * For now, OHW cannot boot from the network. |
196 | */ | |
197 | #if 0 | |
0d913fdb JM |
198 | if (boot_device[i] >= 'a' && boot_device[i] <= 'f') { |
199 | ppc_boot_device = boot_device[i]; | |
28c5af54 | 200 | break; |
0d913fdb | 201 | } |
28c5af54 | 202 | #else |
0d913fdb JM |
203 | if (boot_device[i] >= 'c' && boot_device[i] <= 'd') { |
204 | ppc_boot_device = boot_device[i]; | |
28c5af54 | 205 | break; |
0d913fdb | 206 | } |
28c5af54 JM |
207 | #endif |
208 | } | |
209 | if (ppc_boot_device == '\0') { | |
8a901def | 210 | fprintf(stderr, "No valid boot device for G3 Beige machine\n"); |
28c5af54 JM |
211 | exit(1); |
212 | } | |
3cbee15b JM |
213 | } |
214 | ||
3cbee15b | 215 | /* Register 2 MB of ISA IO space */ |
968d683c | 216 | isa_mmio_init(0xfe000000, 0x00200000); |
3cbee15b JM |
217 | |
218 | /* XXX: we register only 1 output pin for heathrow PIC */ | |
7267c094 | 219 | heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *)); |
3cbee15b | 220 | heathrow_irqs[0] = |
7267c094 | 221 | g_malloc0(smp_cpus * sizeof(qemu_irq) * 1); |
3cbee15b JM |
222 | /* Connect the heathrow PIC outputs to the 6xx bus */ |
223 | for (i = 0; i < smp_cpus; i++) { | |
224 | switch (PPC_INPUT(env)) { | |
225 | case PPC_FLAGS_INPUT_6xx: | |
226 | heathrow_irqs[i] = heathrow_irqs[0] + (i * 1); | |
227 | heathrow_irqs[i][0] = | |
228 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | |
229 | break; | |
230 | default: | |
2ac71179 | 231 | hw_error("Bus model not supported on OldWorld Mac machine\n"); |
3cbee15b JM |
232 | } |
233 | } | |
234 | ||
235 | /* init basic PC hardware */ | |
236 | if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) { | |
2ac71179 | 237 | hw_error("Only 6xx bus is supported on heathrow machine\n"); |
3cbee15b | 238 | } |
23c5e4ca | 239 | pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs); |
aee97b84 AK |
240 | pci_bus = pci_grackle_init(0xfec00000, pic, |
241 | get_system_memory(), | |
242 | get_system_io()); | |
78895427 | 243 | pci_vga_init(pci_bus); |
aae9366a | 244 | |
b39491a8 | 245 | escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0], |
7fa9ae1a | 246 | serial_hds[1], ESCC_CLOCK, 4); |
5b15f275 AK |
247 | memory_region_init_alias(escc_bar, "escc-bar", |
248 | escc_mem, 0, memory_region_size(escc_mem)); | |
aae9366a | 249 | |
cb457d76 | 250 | for(i = 0; i < nb_nics; i++) |
07caea31 | 251 | pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL); |
0d913fdb | 252 | |
e4bcb14c | 253 | |
75717903 | 254 | ide_drive_get(hd, MAX_IDE_BUS); |
bd4524ed AJ |
255 | |
256 | /* First IDE channel is a MAC IDE on the MacIO bus */ | |
23c5e4ca AK |
257 | dbdma = DBDMA_init(&dbdma_mem); |
258 | ide_mem[0] = NULL; | |
259 | ide_mem[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]); | |
e4bcb14c | 260 | |
bd4524ed | 261 | /* Second IDE channel is a CMD646 on the PCI bus */ |
75717903 IY |
262 | hd[0] = hd[MAX_IDE_DEVS]; |
263 | hd[1] = hd[MAX_IDE_DEVS + 1]; | |
bd4524ed AJ |
264 | hd[3] = hd[2] = NULL; |
265 | pci_cmd646_ide_init(pci_bus, hd, 0); | |
3cbee15b JM |
266 | |
267 | /* cuda also initialize ADB */ | |
23c5e4ca | 268 | cuda_init(&cuda_mem, pic[0x12]); |
3cbee15b JM |
269 | |
270 | adb_kbd_init(&adb_bus); | |
271 | adb_mouse_init(&adb_bus); | |
aae9366a | 272 | |
23c5e4ca | 273 | nvr = macio_nvram_init(0x2000, 4); |
3cbee15b JM |
274 | pmac_format_nvram_partition(nvr, 0x2000); |
275 | ||
23c5e4ca | 276 | macio_init(pci_bus, PCI_DEVICE_ID_APPLE_343S1201, 1, pic_mem, |
5b15f275 | 277 | dbdma_mem, cuda_mem, nvr, 2, ide_mem, escc_bar); |
3cbee15b JM |
278 | |
279 | if (usb_enabled) { | |
afb9a60e | 280 | pci_create_simple(pci_bus, -1, "pci-ohci"); |
3cbee15b JM |
281 | } |
282 | ||
283 | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) | |
284 | graphic_depth = 15; | |
285 | ||
3cbee15b JM |
286 | /* No PCI init: the BIOS will do it */ |
287 | ||
271dd5e0 BS |
288 | fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2); |
289 | fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1); | |
290 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); | |
291 | fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW); | |
513f789f BS |
292 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); |
293 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); | |
294 | if (kernel_cmdline) { | |
b9e17a34 AG |
295 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); |
296 | pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline); | |
513f789f BS |
297 | } else { |
298 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); | |
299 | } | |
300 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); | |
301 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); | |
302 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); | |
7f1aec5f LV |
303 | |
304 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); | |
305 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); | |
306 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); | |
307 | ||
45024f09 | 308 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); |
dc333cd6 AG |
309 | if (kvm_enabled()) { |
310 | #ifdef CONFIG_KVM | |
45024f09 AG |
311 | uint8_t *hypercall; |
312 | ||
dc333cd6 | 313 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq()); |
7267c094 | 314 | hypercall = g_malloc(16); |
45024f09 AG |
315 | kvmppc_get_hypercall(env, hypercall, 16); |
316 | fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); | |
317 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); | |
dc333cd6 AG |
318 | #endif |
319 | } else { | |
320 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec()); | |
321 | } | |
322 | ||
513f789f | 323 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); |
3cbee15b JM |
324 | } |
325 | ||
f80f9ec9 | 326 | static QEMUMachine heathrow_machine = { |
4d7ca41e | 327 | .name = "g3beige", |
4b32e168 AL |
328 | .desc = "Heathrow based PowerMAC", |
329 | .init = ppc_heathrow_init, | |
3d878caa | 330 | .max_cpus = MAX_CPUS, |
46214a27 | 331 | #ifndef TARGET_PPC64 |
0c257437 | 332 | .is_default = 1, |
46214a27 | 333 | #endif |
3cbee15b | 334 | }; |
f80f9ec9 AL |
335 | |
336 | static void heathrow_machine_init(void) | |
337 | { | |
338 | qemu_register_machine(&heathrow_machine); | |
339 | } | |
340 | ||
341 | machine_init(heathrow_machine_init); |