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vmstate, memory: decouple vmstate from memory API
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ae0bfb79 1
3cbee15b 2/*
4d7ca41e 3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
3cbee15b
JM
4 *
5 * Copyright (c) 2004-2007 Fabrice Bellard
6 * Copyright (c) 2007 Jocelyn Mayer
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
87ecb68b
PB
26#include "hw.h"
27#include "ppc.h"
3cbee15b 28#include "ppc_mac.h"
7a880d93 29#include "adb.h"
28ce5ce6 30#include "mac_dbdma.h"
87ecb68b
PB
31#include "nvram.h"
32#include "pc.h"
33#include "sysemu.h"
34#include "net.h"
35#include "isa.h"
36#include "pci.h"
18e08a55 37#include "usb-ohci.h"
87ecb68b 38#include "boards.h"
271dd5e0 39#include "fw_cfg.h"
7fa9ae1a 40#include "escc.h"
977e1244 41#include "ide.h"
ca20cf32
BS
42#include "loader.h"
43#include "elf.h"
dc702288 44#include "kvm.h"
dc333cd6 45#include "kvm_ppc.h"
2446333c 46#include "blockdev.h"
1e39101c 47#include "exec-memory.h"
3cbee15b 48
e4bcb14c 49#define MAX_IDE_BUS 2
271dd5e0
BS
50#define CFG_ADDR 0xf0000510
51
513f789f
BS
52static int fw_cfg_boot_set(void *opaque, const char *boot_device)
53{
54 fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
55 return 0;
56}
57
409dbce5
AJ
58
59static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
60{
61 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
62}
63
b9e17a34
AG
64static target_phys_addr_t round_page(target_phys_addr_t addr)
65{
66 return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
67}
68
c227f099 69static void ppc_heathrow_init (ram_addr_t ram_size,
3023f332 70 const char *boot_device,
3cbee15b
JM
71 const char *kernel_filename,
72 const char *kernel_cmdline,
73 const char *initrd_filename,
74 const char *cpu_model)
75{
c92bb2c7 76 MemoryRegion *sysmem = get_system_memory();
49a2942d 77 CPUState *env = NULL;
5cea8590 78 char *filename;
3cbee15b 79 qemu_irq *pic, **heathrow_irqs;
3cbee15b 80 int linux_boot, i;
c92bb2c7
AK
81 MemoryRegion *ram = g_new(MemoryRegion, 1);
82 MemoryRegion *bios = g_new(MemoryRegion, 1);
b9e17a34 83 uint32_t kernel_base, initrd_base, cmdline_base = 0;
7373048c 84 int32_t kernel_size, initrd_size;
3cbee15b
JM
85 PCIBus *pci_bus;
86 MacIONVRAMState *nvr;
ae0bfb79 87 int bios_size;
23c5e4ca 88 MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem;
5b15f275 89 MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1), *ide_mem[2];
513f789f 90 uint16_t ppc_boot_device;
f455e98c 91 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
271dd5e0 92 void *fw_cfg;
28ce5ce6 93 void *dbdma;
3cbee15b
JM
94
95 linux_boot = (kernel_filename != NULL);
96
97 /* init CPUs */
3cbee15b 98 if (cpu_model == NULL)
f2fde45a 99 cpu_model = "G3";
3cbee15b 100 for (i = 0; i < smp_cpus; i++) {
aaed909a
FB
101 env = cpu_init(cpu_model);
102 if (!env) {
103 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
104 exit(1);
105 }
b0fb43d8
AJ
106 /* Set time-base frequency to 16.6 Mhz */
107 cpu_ppc_tb_init(env, 16600000UL);
d84bda46 108 qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
3cbee15b
JM
109 }
110
111 /* allocate RAM */
6b4079f8
AJ
112 if (ram_size > (2047 << 20)) {
113 fprintf(stderr,
114 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
115 ((unsigned int)ram_size / (1 << 20)));
116 exit(1);
117 }
118
c5705a77
AK
119 memory_region_init_ram(ram, "ppc_heathrow.ram", ram_size);
120 vmstate_register_ram_global(ram);
c92bb2c7 121 memory_region_add_subregion(sysmem, 0, ram);
a748ab6d 122
3cbee15b 123 /* allocate and load BIOS */
c5705a77
AK
124 memory_region_init_ram(bios, "ppc_heathrow.bios", BIOS_SIZE);
125 vmstate_register_ram_global(bios);
3cbee15b 126 if (bios_name == NULL)
992e5acd 127 bios_name = PROM_FILENAME;
5cea8590 128 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
c92bb2c7
AK
129 memory_region_set_readonly(bios, true);
130 memory_region_add_subregion(sysmem, PROM_ADDR, bios);
992e5acd
BS
131
132 /* Load OpenBIOS (ELF) */
5cea8590 133 if (filename) {
409dbce5
AJ
134 bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
135 1, ELF_MACHINE, 0);
7267c094 136 g_free(filename);
5cea8590
PB
137 } else {
138 bios_size = -1;
139 }
3cbee15b 140 if (bios_size < 0 || bios_size > BIOS_SIZE) {
5cea8590 141 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
3cbee15b
JM
142 exit(1);
143 }
3cbee15b 144
3cbee15b 145 if (linux_boot) {
36bee1e3 146 uint64_t lowaddr = 0;
ca20cf32
BS
147 int bswap_needed;
148
149#ifdef BSWAP_NEEDED
150 bswap_needed = 1;
151#else
152 bswap_needed = 0;
153#endif
3cbee15b 154 kernel_base = KERNEL_LOAD_ADDR;
409dbce5
AJ
155 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
156 NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
52f163b7
BS
157 if (kernel_size < 0)
158 kernel_size = load_aout(kernel_filename, kernel_base,
ca20cf32
BS
159 ram_size - kernel_base, bswap_needed,
160 TARGET_PAGE_SIZE);
52f163b7
BS
161 if (kernel_size < 0)
162 kernel_size = load_image_targphys(kernel_filename,
163 kernel_base,
164 ram_size - kernel_base);
3cbee15b 165 if (kernel_size < 0) {
2ac71179 166 hw_error("qemu: could not load kernel '%s'\n",
3cbee15b
JM
167 kernel_filename);
168 exit(1);
169 }
170 /* load initrd */
171 if (initrd_filename) {
b9e17a34 172 initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
dcac9679
PB
173 initrd_size = load_image_targphys(initrd_filename, initrd_base,
174 ram_size - initrd_base);
3cbee15b 175 if (initrd_size < 0) {
2ac71179
PB
176 hw_error("qemu: could not load initial ram disk '%s'\n",
177 initrd_filename);
3cbee15b
JM
178 exit(1);
179 }
b9e17a34 180 cmdline_base = round_page(initrd_base + initrd_size);
3cbee15b
JM
181 } else {
182 initrd_base = 0;
183 initrd_size = 0;
b9e17a34 184 cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
3cbee15b 185 }
6ac0e82d 186 ppc_boot_device = 'm';
3cbee15b
JM
187 } else {
188 kernel_base = 0;
189 kernel_size = 0;
190 initrd_base = 0;
191 initrd_size = 0;
28c5af54 192 ppc_boot_device = '\0';
0d913fdb 193 for (i = 0; boot_device[i] != '\0'; i++) {
28c5af54 194 /* TOFIX: for now, the second IDE channel is not properly
0d913fdb 195 * used by OHW. The Mac floppy disk are not emulated.
28c5af54
JM
196 * For now, OHW cannot boot from the network.
197 */
198#if 0
0d913fdb
JM
199 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
200 ppc_boot_device = boot_device[i];
28c5af54 201 break;
0d913fdb 202 }
28c5af54 203#else
0d913fdb
JM
204 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
205 ppc_boot_device = boot_device[i];
28c5af54 206 break;
0d913fdb 207 }
28c5af54
JM
208#endif
209 }
210 if (ppc_boot_device == '\0') {
8a901def 211 fprintf(stderr, "No valid boot device for G3 Beige machine\n");
28c5af54
JM
212 exit(1);
213 }
3cbee15b
JM
214 }
215
3cbee15b 216 /* Register 2 MB of ISA IO space */
968d683c 217 isa_mmio_init(0xfe000000, 0x00200000);
3cbee15b
JM
218
219 /* XXX: we register only 1 output pin for heathrow PIC */
7267c094 220 heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
3cbee15b 221 heathrow_irqs[0] =
7267c094 222 g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
3cbee15b
JM
223 /* Connect the heathrow PIC outputs to the 6xx bus */
224 for (i = 0; i < smp_cpus; i++) {
225 switch (PPC_INPUT(env)) {
226 case PPC_FLAGS_INPUT_6xx:
227 heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
228 heathrow_irqs[i][0] =
229 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
230 break;
231 default:
2ac71179 232 hw_error("Bus model not supported on OldWorld Mac machine\n");
3cbee15b
JM
233 }
234 }
235
236 /* init basic PC hardware */
237 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
2ac71179 238 hw_error("Only 6xx bus is supported on heathrow machine\n");
3cbee15b 239 }
23c5e4ca 240 pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
aee97b84
AK
241 pci_bus = pci_grackle_init(0xfec00000, pic,
242 get_system_memory(),
243 get_system_io());
78895427 244 pci_vga_init(pci_bus);
aae9366a 245
b39491a8 246 escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0],
7fa9ae1a 247 serial_hds[1], ESCC_CLOCK, 4);
5b15f275
AK
248 memory_region_init_alias(escc_bar, "escc-bar",
249 escc_mem, 0, memory_region_size(escc_mem));
aae9366a 250
cb457d76 251 for(i = 0; i < nb_nics; i++)
07caea31 252 pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
0d913fdb 253
e4bcb14c 254
75717903 255 ide_drive_get(hd, MAX_IDE_BUS);
bd4524ed
AJ
256
257 /* First IDE channel is a MAC IDE on the MacIO bus */
23c5e4ca
AK
258 dbdma = DBDMA_init(&dbdma_mem);
259 ide_mem[0] = NULL;
260 ide_mem[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);
e4bcb14c 261
bd4524ed 262 /* Second IDE channel is a CMD646 on the PCI bus */
75717903
IY
263 hd[0] = hd[MAX_IDE_DEVS];
264 hd[1] = hd[MAX_IDE_DEVS + 1];
bd4524ed
AJ
265 hd[3] = hd[2] = NULL;
266 pci_cmd646_ide_init(pci_bus, hd, 0);
3cbee15b
JM
267
268 /* cuda also initialize ADB */
23c5e4ca 269 cuda_init(&cuda_mem, pic[0x12]);
3cbee15b
JM
270
271 adb_kbd_init(&adb_bus);
272 adb_mouse_init(&adb_bus);
aae9366a 273
23c5e4ca 274 nvr = macio_nvram_init(0x2000, 4);
3cbee15b
JM
275 pmac_format_nvram_partition(nvr, 0x2000);
276
23c5e4ca 277 macio_init(pci_bus, PCI_DEVICE_ID_APPLE_343S1201, 1, pic_mem,
5b15f275 278 dbdma_mem, cuda_mem, nvr, 2, ide_mem, escc_bar);
3cbee15b
JM
279
280 if (usb_enabled) {
a67ba3b6 281 usb_ohci_init_pci(pci_bus, -1);
3cbee15b
JM
282 }
283
284 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
285 graphic_depth = 15;
286
3cbee15b
JM
287 /* No PCI init: the BIOS will do it */
288
271dd5e0
BS
289 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
290 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
291 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
292 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
513f789f
BS
293 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
294 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
295 if (kernel_cmdline) {
b9e17a34
AG
296 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
297 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
513f789f
BS
298 } else {
299 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
300 }
301 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
302 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
303 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
7f1aec5f
LV
304
305 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
306 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
307 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
308
45024f09 309 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
dc333cd6
AG
310 if (kvm_enabled()) {
311#ifdef CONFIG_KVM
45024f09
AG
312 uint8_t *hypercall;
313
dc333cd6 314 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
7267c094 315 hypercall = g_malloc(16);
45024f09
AG
316 kvmppc_get_hypercall(env, hypercall, 16);
317 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
318 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
dc333cd6
AG
319#endif
320 } else {
321 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
322 }
323
513f789f 324 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
3cbee15b
JM
325}
326
f80f9ec9 327static QEMUMachine heathrow_machine = {
4d7ca41e 328 .name = "g3beige",
4b32e168
AL
329 .desc = "Heathrow based PowerMAC",
330 .init = ppc_heathrow_init,
3d878caa 331 .max_cpus = MAX_CPUS,
46214a27 332#ifndef TARGET_PPC64
0c257437 333 .is_default = 1,
46214a27 334#endif
3cbee15b 335};
f80f9ec9
AL
336
337static void heathrow_machine_init(void)
338{
339 qemu_register_machine(&heathrow_machine);
340}
341
342machine_init(heathrow_machine_init);