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ef6d4ccd
YS
1/*
2 * QEMU paravirtual RDMA - Generic RDMA backend
3 *
4 * Copyright (C) 2018 Oracle
5 * Copyright (C) 2018 Red Hat Inc
6 *
7 * Authors:
8 * Yuval Shaia <yuval.shaia@oracle.com>
9 * Marcel Apfelbaum <marcel@redhat.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2 or later.
12 * See the COPYING file in the top-level directory.
13 *
14 */
15
0efc9511 16#include "qemu/osdep.h"
2b05705d 17#include "qapi/qapi-events-rdma.h"
ef6d4ccd
YS
18
19#include <infiniband/verbs.h>
20
2b05705d 21#include "contrib/rdmacm-mux/rdmacm-mux.h"
ef6d4ccd
YS
22#include "trace.h"
23#include "rdma_utils.h"
24#include "rdma_rm.h"
25#include "rdma_backend.h"
26
ef6d4ccd 27#define THR_NAME_LEN 16
75152227 28#define THR_POLL_TO 5000
ef6d4ccd 29
605ec166
YS
30#define MAD_HDR_SIZE sizeof(struct ibv_grh)
31
ef6d4ccd 32typedef struct BackendCtx {
ef6d4ccd 33 void *up_ctx;
605ec166 34 struct ibv_sge sge; /* Used to save MAD recv buffer */
bf441451 35 RdmaBackendQP *backend_qp; /* To maintain recv buffers */
e926c9f1 36 RdmaBackendSRQ *backend_srq;
ef6d4ccd
YS
37} BackendCtx;
38
605ec166
YS
39struct backend_umad {
40 struct ib_user_mad hdr;
41 char mad[RDMA_MAX_PRIVATE_DATA];
42};
43
eaac0100 44static void (*comp_handler)(void *ctx, struct ibv_wc *wc);
ef6d4ccd 45
eaac0100 46static void dummy_comp_handler(void *ctx, struct ibv_wc *wc)
ef6d4ccd 47{
4d71b38a 48 rdma_error_report("No completion handler is registered");
ef6d4ccd
YS
49}
50
eaac0100
YS
51static inline void complete_work(enum ibv_wc_status status, uint32_t vendor_err,
52 void *ctx)
53{
a421c811 54 struct ibv_wc wc = {};
eaac0100
YS
55
56 wc.status = status;
57 wc.vendor_err = vendor_err;
58
59 comp_handler(ctx, &wc);
60}
61
ff30a446
YS
62static void free_cqe_ctx(gpointer data, gpointer user_data)
63{
64 BackendCtx *bctx;
65 RdmaDeviceResources *rdma_dev_res = user_data;
66 unsigned long cqe_ctx_id = GPOINTER_TO_INT(data);
67
68 bctx = rdma_rm_get_cqe_ctx(rdma_dev_res, cqe_ctx_id);
69 if (bctx) {
70 rdma_rm_dealloc_cqe_ctx(rdma_dev_res, cqe_ctx_id);
bf441451 71 atomic_dec(&rdma_dev_res->stats.missing_cqe);
ff30a446
YS
72 }
73 g_free(bctx);
74}
75
76static void clean_recv_mads(RdmaBackendDev *backend_dev)
77{
78 unsigned long cqe_ctx_id;
79
80 do {
81 cqe_ctx_id = rdma_protected_qlist_pop_int64(&backend_dev->
82 recv_mads_list);
83 if (cqe_ctx_id != -ENOENT) {
bf441451 84 atomic_inc(&backend_dev->rdma_dev_res->stats.missing_cqe);
ff30a446
YS
85 free_cqe_ctx(GINT_TO_POINTER(cqe_ctx_id),
86 backend_dev->rdma_dev_res);
87 }
88 } while (cqe_ctx_id != -ENOENT);
89}
90
1373f4a8 91static int rdma_poll_cq(RdmaDeviceResources *rdma_dev_res, struct ibv_cq *ibcq)
ef6d4ccd 92{
c2dd117b 93 int i, ne, total_ne = 0;
ef6d4ccd
YS
94 BackendCtx *bctx;
95 struct ibv_wc wc[2];
e926c9f1 96 RdmaProtectedGSList *cqe_ctx_list;
ef6d4ccd 97
2cfa9530 98 qemu_mutex_lock(&rdma_dev_res->lock);
ef6d4ccd
YS
99 do {
100 ne = ibv_poll_cq(ibcq, ARRAY_SIZE(wc), wc);
101
4d71b38a 102 trace_rdma_poll_cq(ne, ibcq);
ef6d4ccd
YS
103
104 for (i = 0; i < ne; i++) {
ef6d4ccd
YS
105 bctx = rdma_rm_get_cqe_ctx(rdma_dev_res, wc[i].wr_id);
106 if (unlikely(!bctx)) {
4d71b38a
YS
107 rdma_error_report("No matching ctx for req %"PRId64,
108 wc[i].wr_id);
ef6d4ccd
YS
109 continue;
110 }
ef6d4ccd 111
eaac0100 112 comp_handler(bctx->up_ctx, &wc[i]);
ef6d4ccd 113
e926c9f1
KH
114 if (bctx->backend_qp) {
115 cqe_ctx_list = &bctx->backend_qp->cqe_ctx_list;
116 } else {
117 cqe_ctx_list = &bctx->backend_srq->cqe_ctx_list;
118 }
119
120 rdma_protected_gslist_remove_int32(cqe_ctx_list, wc[i].wr_id);
ef6d4ccd
YS
121 rdma_rm_dealloc_cqe_ctx(rdma_dev_res, wc[i].wr_id);
122 g_free(bctx);
123 }
c2dd117b 124 total_ne += ne;
ef6d4ccd 125 } while (ne > 0);
c2dd117b 126 atomic_sub(&rdma_dev_res->stats.missing_cqe, total_ne);
2cfa9530 127 qemu_mutex_unlock(&rdma_dev_res->lock);
ef6d4ccd
YS
128
129 if (ne < 0) {
4d71b38a 130 rdma_error_report("ibv_poll_cq fail, rc=%d, errno=%d", ne, errno);
ef6d4ccd 131 }
c2dd117b
YS
132
133 rdma_dev_res->stats.completions += total_ne;
134
135 return total_ne;
ef6d4ccd
YS
136}
137
138static void *comp_handler_thread(void *arg)
139{
140 RdmaBackendDev *backend_dev = (RdmaBackendDev *)arg;
141 int rc;
142 struct ibv_cq *ev_cq;
143 void *ev_ctx;
75152227
YS
144 int flags;
145 GPollFD pfds[1];
146
147 /* Change to non-blocking mode */
148 flags = fcntl(backend_dev->channel->fd, F_GETFL);
149 rc = fcntl(backend_dev->channel->fd, F_SETFL, flags | O_NONBLOCK);
150 if (rc < 0) {
4d71b38a 151 rdma_error_report("Failed to change backend channel FD to non-blocking");
75152227
YS
152 return NULL;
153 }
ef6d4ccd 154
75152227
YS
155 pfds[0].fd = backend_dev->channel->fd;
156 pfds[0].events = G_IO_IN | G_IO_HUP | G_IO_ERR;
157
158 backend_dev->comp_thread.is_running = true;
159
ef6d4ccd 160 while (backend_dev->comp_thread.run) {
75152227
YS
161 do {
162 rc = qemu_poll_ns(pfds, 1, THR_POLL_TO * (int64_t)SCALE_MS);
c2dd117b
YS
163 if (!rc) {
164 backend_dev->rdma_dev_res->stats.poll_cq_ppoll_to++;
165 }
75152227
YS
166 } while (!rc && backend_dev->comp_thread.run);
167
168 if (backend_dev->comp_thread.run) {
75152227 169 rc = ibv_get_cq_event(backend_dev->channel, &ev_cq, &ev_ctx);
75152227 170 if (unlikely(rc)) {
4d71b38a
YS
171 rdma_error_report("ibv_get_cq_event fail, rc=%d, errno=%d", rc,
172 errno);
75152227
YS
173 continue;
174 }
ef6d4ccd 175
75152227
YS
176 rc = ibv_req_notify_cq(ev_cq, 0);
177 if (unlikely(rc)) {
4d71b38a
YS
178 rdma_error_report("ibv_req_notify_cq fail, rc=%d, errno=%d", rc,
179 errno);
75152227 180 }
ef6d4ccd 181
c2dd117b 182 backend_dev->rdma_dev_res->stats.poll_cq_from_bk++;
1373f4a8 183 rdma_poll_cq(backend_dev->rdma_dev_res, ev_cq);
ef6d4ccd 184
75152227
YS
185 ibv_ack_cq_events(ev_cq, 1);
186 }
ef6d4ccd
YS
187 }
188
75152227
YS
189 backend_dev->comp_thread.is_running = false;
190
191 qemu_thread_exit(0);
192
ef6d4ccd
YS
193 return NULL;
194}
195
2b05705d
YS
196static inline void disable_rdmacm_mux_async(RdmaBackendDev *backend_dev)
197{
198 atomic_set(&backend_dev->rdmacm_mux.can_receive, 0);
199}
200
201static inline void enable_rdmacm_mux_async(RdmaBackendDev *backend_dev)
202{
203 atomic_set(&backend_dev->rdmacm_mux.can_receive, sizeof(RdmaCmMuxMsg));
204}
205
206static inline int rdmacm_mux_can_process_async(RdmaBackendDev *backend_dev)
207{
208 return atomic_read(&backend_dev->rdmacm_mux.can_receive);
209}
210
4d71b38a 211static int rdmacm_mux_check_op_status(CharBackend *mad_chr_be)
2b05705d 212{
555b3d67 213 RdmaCmMuxMsg msg = {};
2b05705d
YS
214 int ret;
215
2b05705d
YS
216 ret = qemu_chr_fe_read_all(mad_chr_be, (uint8_t *)&msg, sizeof(msg));
217 if (ret != sizeof(msg)) {
4d71b38a
YS
218 rdma_error_report("Got invalid message from mux: size %d, expecting %d",
219 ret, (int)sizeof(msg));
2b05705d
YS
220 return -EIO;
221 }
222
4d71b38a
YS
223 trace_rdmacm_mux_check_op_status(msg.hdr.msg_type, msg.hdr.op_code,
224 msg.hdr.err_code);
2b05705d
YS
225
226 if (msg.hdr.msg_type != RDMACM_MUX_MSG_TYPE_RESP) {
4d71b38a 227 rdma_error_report("Got invalid message type %d", msg.hdr.msg_type);
2b05705d
YS
228 return -EIO;
229 }
230
231 if (msg.hdr.err_code != RDMACM_MUX_ERR_CODE_OK) {
4d71b38a
YS
232 rdma_error_report("Operation failed in mux, error code %d",
233 msg.hdr.err_code);
2b05705d
YS
234 return -EIO;
235 }
236
237 return 0;
238}
239
4d71b38a 240static int rdmacm_mux_send(RdmaBackendDev *backend_dev, RdmaCmMuxMsg *msg)
2b05705d
YS
241{
242 int rc = 0;
243
2b05705d 244 msg->hdr.msg_type = RDMACM_MUX_MSG_TYPE_REQ;
4d71b38a 245 trace_rdmacm_mux("send", msg->hdr.msg_type, msg->hdr.op_code);
2b05705d
YS
246 disable_rdmacm_mux_async(backend_dev);
247 rc = qemu_chr_fe_write(backend_dev->rdmacm_mux.chr_be,
248 (const uint8_t *)msg, sizeof(*msg));
249 if (rc != sizeof(*msg)) {
250 enable_rdmacm_mux_async(backend_dev);
4d71b38a 251 rdma_error_report("Failed to send request to rdmacm_mux (rc=%d)", rc);
2b05705d
YS
252 return -EIO;
253 }
254
4d71b38a 255 rc = rdmacm_mux_check_op_status(backend_dev->rdmacm_mux.chr_be);
2b05705d 256 if (rc) {
4d71b38a
YS
257 rdma_error_report("Failed to execute rdmacm_mux request %d (rc=%d)",
258 msg->hdr.op_code, rc);
2b05705d
YS
259 }
260
261 enable_rdmacm_mux_async(backend_dev);
262
263 return 0;
264}
265
292dce62 266static void stop_backend_thread(RdmaBackendThread *thread)
75152227 267{
292dce62
YS
268 thread->run = false;
269 while (thread->is_running) {
75152227
YS
270 sleep(THR_POLL_TO / SCALE_US / 2);
271 }
272}
273
274static void start_comp_thread(RdmaBackendDev *backend_dev)
275{
a421c811 276 char thread_name[THR_NAME_LEN] = {};
75152227 277
292dce62 278 stop_backend_thread(&backend_dev->comp_thread);
75152227
YS
279
280 snprintf(thread_name, sizeof(thread_name), "rdma_comp_%s",
281 ibv_get_device_name(backend_dev->ib_dev));
282 backend_dev->comp_thread.run = true;
283 qemu_thread_create(&backend_dev->comp_thread.thread, thread_name,
284 comp_handler_thread, backend_dev, QEMU_THREAD_DETACHED);
285}
286
eaac0100
YS
287void rdma_backend_register_comp_handler(void (*handler)(void *ctx,
288 struct ibv_wc *wc))
ef6d4ccd
YS
289{
290 comp_handler = handler;
291}
292
293void rdma_backend_unregister_comp_handler(void)
294{
295 rdma_backend_register_comp_handler(dummy_comp_handler);
296}
297
298int rdma_backend_query_port(RdmaBackendDev *backend_dev,
299 struct ibv_port_attr *port_attr)
300{
301 int rc;
302
303 rc = ibv_query_port(backend_dev->context, backend_dev->port_num, port_attr);
304 if (rc) {
4d71b38a 305 rdma_error_report("ibv_query_port fail, rc=%d, errno=%d", rc, errno);
ef6d4ccd
YS
306 return -EIO;
307 }
308
309 return 0;
310}
311
312void rdma_backend_poll_cq(RdmaDeviceResources *rdma_dev_res, RdmaBackendCQ *cq)
313{
c2dd117b
YS
314 int polled;
315
316 rdma_dev_res->stats.poll_cq_from_guest++;
1373f4a8 317 polled = rdma_poll_cq(rdma_dev_res, cq->ibcq);
c2dd117b
YS
318 if (!polled) {
319 rdma_dev_res->stats.poll_cq_from_guest_empty++;
320 }
ef6d4ccd
YS
321}
322
323static GHashTable *ah_hash;
324
325static struct ibv_ah *create_ah(RdmaBackendDev *backend_dev, struct ibv_pd *pd,
326 uint8_t sgid_idx, union ibv_gid *dgid)
327{
328 GBytes *ah_key = g_bytes_new(dgid, sizeof(*dgid));
329 struct ibv_ah *ah = g_hash_table_lookup(ah_hash, ah_key);
330
331 if (ah) {
4d71b38a
YS
332 trace_rdma_create_ah_cache_hit(be64_to_cpu(dgid->global.subnet_prefix),
333 be64_to_cpu(dgid->global.interface_id));
ef6d4ccd
YS
334 g_bytes_unref(ah_key);
335 } else {
336 struct ibv_ah_attr ah_attr = {
337 .is_global = 1,
338 .port_num = backend_dev->port_num,
339 .grh.hop_limit = 1,
340 };
341
342 ah_attr.grh.dgid = *dgid;
343 ah_attr.grh.sgid_index = sgid_idx;
344
345 ah = ibv_create_ah(pd, &ah_attr);
346 if (ah) {
347 g_hash_table_insert(ah_hash, ah_key, ah);
348 } else {
349 g_bytes_unref(ah_key);
4d71b38a
YS
350 rdma_error_report("Failed to create AH for gid <0x%" PRIx64", 0x%"PRIx64">",
351 be64_to_cpu(dgid->global.subnet_prefix),
352 be64_to_cpu(dgid->global.interface_id));
ef6d4ccd
YS
353 }
354
4d71b38a
YS
355 trace_rdma_create_ah_cache_miss(be64_to_cpu(dgid->global.subnet_prefix),
356 be64_to_cpu(dgid->global.interface_id));
ef6d4ccd
YS
357 }
358
359 return ah;
360}
361
362static void destroy_ah_hash_key(gpointer data)
363{
364 g_bytes_unref(data);
365}
366
367static void destroy_ah_hast_data(gpointer data)
368{
369 struct ibv_ah *ah = data;
370
371 ibv_destroy_ah(ah);
372}
373
374static void ah_cache_init(void)
375{
376 ah_hash = g_hash_table_new_full(g_bytes_hash, g_bytes_equal,
377 destroy_ah_hash_key, destroy_ah_hast_data);
378}
379
380static int build_host_sge_array(RdmaDeviceResources *rdma_dev_res,
381 struct ibv_sge *dsge, struct ibv_sge *ssge,
c2dd117b 382 uint8_t num_sge, uint64_t *total_length)
ef6d4ccd
YS
383{
384 RdmaRmMR *mr;
385 int ssge_idx;
386
ef6d4ccd
YS
387 for (ssge_idx = 0; ssge_idx < num_sge; ssge_idx++) {
388 mr = rdma_rm_get_mr(rdma_dev_res, ssge[ssge_idx].lkey);
389 if (unlikely(!mr)) {
4d71b38a 390 rdma_error_report("Invalid lkey 0x%x", ssge[ssge_idx].lkey);
ef6d4ccd
YS
391 return VENDOR_ERR_INVLKEY | ssge[ssge_idx].lkey;
392 }
393
7f99daad 394 dsge->addr = (uintptr_t)mr->virt + ssge[ssge_idx].addr - mr->start;
ef6d4ccd
YS
395 dsge->length = ssge[ssge_idx].length;
396 dsge->lkey = rdma_backend_mr_lkey(&mr->backend_mr);
397
c2dd117b
YS
398 *total_length += dsge->length;
399
ef6d4ccd
YS
400 dsge++;
401 }
402
403 return 0;
404}
405
4d71b38a
YS
406static void trace_mad_message(const char *title, char *buf, int len)
407{
408 int i;
409 char *b = g_malloc0(len * 3 + 1);
410 char b1[4];
411
412 for (i = 0; i < len; i++) {
413 sprintf(b1, "%.2X ", buf[i] & 0x000000FF);
414 strcat(b, b1);
415 }
416
417 trace_rdma_mad_message(title, len, b);
418
419 g_free(b);
420}
421
2b05705d
YS
422static int mad_send(RdmaBackendDev *backend_dev, uint8_t sgid_idx,
423 union ibv_gid *sgid, struct ibv_sge *sge, uint32_t num_sge)
605ec166 424{
555b3d67 425 RdmaCmMuxMsg msg = {};
2b05705d 426 char *hdr, *data;
605ec166
YS
427 int ret;
428
605ec166
YS
429 if (num_sge != 2) {
430 return -EINVAL;
431 }
432
2b05705d
YS
433 msg.hdr.op_code = RDMACM_MUX_OP_CODE_MAD;
434 memcpy(msg.hdr.sgid.raw, sgid->raw, sizeof(msg.hdr.sgid));
605ec166 435
2b05705d 436 msg.umad_len = sge[0].length + sge[1].length;
2b05705d
YS
437
438 if (msg.umad_len > sizeof(msg.umad.mad)) {
605ec166
YS
439 return -ENOMEM;
440 }
441
2b05705d
YS
442 msg.umad.hdr.addr.qpn = htobe32(1);
443 msg.umad.hdr.addr.grh_present = 1;
2b05705d
YS
444 msg.umad.hdr.addr.gid_index = sgid_idx;
445 memcpy(msg.umad.hdr.addr.gid, sgid->raw, sizeof(msg.umad.hdr.addr.gid));
446 msg.umad.hdr.addr.hop_limit = 0xFF;
605ec166
YS
447
448 hdr = rdma_pci_dma_map(backend_dev->dev, sge[0].addr, sge[0].length);
449 if (!hdr) {
605ec166
YS
450 return -ENOMEM;
451 }
2b05705d
YS
452 data = rdma_pci_dma_map(backend_dev->dev, sge[1].addr, sge[1].length);
453 if (!data) {
605ec166
YS
454 rdma_pci_dma_unmap(backend_dev->dev, hdr, sge[0].length);
455 return -ENOMEM;
456 }
457
2b05705d
YS
458 memcpy(&msg.umad.mad[0], hdr, sge[0].length);
459 memcpy(&msg.umad.mad[sge[0].length], data, sge[1].length);
605ec166 460
2b05705d 461 rdma_pci_dma_unmap(backend_dev->dev, data, sge[1].length);
605ec166
YS
462 rdma_pci_dma_unmap(backend_dev->dev, hdr, sge[0].length);
463
4d71b38a
YS
464 trace_mad_message("send", msg.umad.mad, msg.umad_len);
465
466 ret = rdmacm_mux_send(backend_dev, &msg);
2b05705d 467 if (ret) {
4d71b38a 468 rdma_error_report("Failed to send MAD to rdma_umadmux (%d)", ret);
2b05705d
YS
469 return -EIO;
470 }
605ec166 471
2b05705d 472 return 0;
605ec166
YS
473}
474
ef6d4ccd
YS
475void rdma_backend_post_send(RdmaBackendDev *backend_dev,
476 RdmaBackendQP *qp, uint8_t qp_type,
477 struct ibv_sge *sge, uint32_t num_sge,
2b05705d
YS
478 uint8_t sgid_idx, union ibv_gid *sgid,
479 union ibv_gid *dgid, uint32_t dqpn, uint32_t dqkey,
480 void *ctx)
ef6d4ccd
YS
481{
482 BackendCtx *bctx;
483 struct ibv_sge new_sge[MAX_SGE];
484 uint32_t bctx_id;
485 int rc;
a421c811 486 struct ibv_send_wr wr = {}, *bad_wr;
ef6d4ccd 487
4d71b38a 488 if (!qp->ibqp) { /* This field is not initialized for QP0 and QP1 */
ef6d4ccd 489 if (qp_type == IBV_QPT_SMI) {
4d71b38a 490 rdma_error_report("Got QP0 request");
eaac0100 491 complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_QP0, ctx);
ef6d4ccd 492 } else if (qp_type == IBV_QPT_GSI) {
2b05705d 493 rc = mad_send(backend_dev, sgid_idx, sgid, sge, num_sge);
605ec166 494 if (rc) {
eaac0100 495 complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_MAD_SEND, ctx);
c2dd117b 496 backend_dev->rdma_dev_res->stats.mad_tx_err++;
605ec166 497 } else {
eaac0100 498 complete_work(IBV_WC_SUCCESS, 0, ctx);
c2dd117b 499 backend_dev->rdma_dev_res->stats.mad_tx++;
605ec166 500 }
ef6d4ccd 501 }
ef6d4ccd
YS
502 return;
503 }
504
ef6d4ccd
YS
505 bctx = g_malloc0(sizeof(*bctx));
506 bctx->up_ctx = ctx;
bf441451 507 bctx->backend_qp = qp;
ef6d4ccd
YS
508
509 rc = rdma_rm_alloc_cqe_ctx(backend_dev->rdma_dev_res, &bctx_id, bctx);
510 if (unlikely(rc)) {
eaac0100 511 complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_NOMEM, ctx);
c2dd117b 512 goto err_free_bctx;
ef6d4ccd
YS
513 }
514
bf441451
YS
515 rdma_protected_gslist_append_int32(&qp->cqe_ctx_list, bctx_id);
516
c2dd117b
YS
517 rc = build_host_sge_array(backend_dev->rdma_dev_res, new_sge, sge, num_sge,
518 &backend_dev->rdma_dev_res->stats.tx_len);
ef6d4ccd 519 if (rc) {
eaac0100 520 complete_work(IBV_WC_GENERAL_ERR, rc, ctx);
c2dd117b 521 goto err_dealloc_cqe_ctx;
ef6d4ccd
YS
522 }
523
524 if (qp_type == IBV_QPT_UD) {
2b05705d 525 wr.wr.ud.ah = create_ah(backend_dev, qp->ibpd, sgid_idx, dgid);
305bdd7a 526 if (!wr.wr.ud.ah) {
eaac0100 527 complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_FAIL_BACKEND, ctx);
c2dd117b 528 goto err_dealloc_cqe_ctx;
305bdd7a 529 }
ef6d4ccd
YS
530 wr.wr.ud.remote_qpn = dqpn;
531 wr.wr.ud.remote_qkey = dqkey;
532 }
533
534 wr.num_sge = num_sge;
535 wr.opcode = IBV_WR_SEND;
536 wr.send_flags = IBV_SEND_SIGNALED;
537 wr.sg_list = new_sge;
538 wr.wr_id = bctx_id;
539
540 rc = ibv_post_send(qp->ibqp, &wr, &bad_wr);
ef6d4ccd 541 if (rc) {
4d71b38a
YS
542 rdma_error_report("ibv_post_send fail, qpn=0x%x, rc=%d, errno=%d",
543 qp->ibqp->qp_num, rc, errno);
eaac0100 544 complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_FAIL_BACKEND, ctx);
c2dd117b 545 goto err_dealloc_cqe_ctx;
ef6d4ccd
YS
546 }
547
c2dd117b
YS
548 atomic_inc(&backend_dev->rdma_dev_res->stats.missing_cqe);
549 backend_dev->rdma_dev_res->stats.tx++;
550
ef6d4ccd
YS
551 return;
552
c2dd117b
YS
553err_dealloc_cqe_ctx:
554 backend_dev->rdma_dev_res->stats.tx_err++;
ef6d4ccd
YS
555 rdma_rm_dealloc_cqe_ctx(backend_dev->rdma_dev_res, bctx_id);
556
c2dd117b 557err_free_bctx:
ef6d4ccd
YS
558 g_free(bctx);
559}
560
605ec166
YS
561static unsigned int save_mad_recv_buffer(RdmaBackendDev *backend_dev,
562 struct ibv_sge *sge, uint32_t num_sge,
563 void *ctx)
564{
565 BackendCtx *bctx;
566 int rc;
567 uint32_t bctx_id;
568
569 if (num_sge != 1) {
4d71b38a 570 rdma_error_report("Invalid num_sge (%d), expecting 1", num_sge);
605ec166
YS
571 return VENDOR_ERR_INV_NUM_SGE;
572 }
573
574 if (sge[0].length < RDMA_MAX_PRIVATE_DATA + sizeof(struct ibv_grh)) {
4d71b38a 575 rdma_error_report("Too small buffer for MAD");
605ec166
YS
576 return VENDOR_ERR_INV_MAD_BUFF;
577 }
578
605ec166
YS
579 bctx = g_malloc0(sizeof(*bctx));
580
581 rc = rdma_rm_alloc_cqe_ctx(backend_dev->rdma_dev_res, &bctx_id, bctx);
582 if (unlikely(rc)) {
583 g_free(bctx);
605ec166
YS
584 return VENDOR_ERR_NOMEM;
585 }
586
605ec166
YS
587 bctx->up_ctx = ctx;
588 bctx->sge = *sge;
589
b20fc795 590 rdma_protected_qlist_append_int64(&backend_dev->recv_mads_list, bctx_id);
605ec166
YS
591
592 return 0;
593}
594
ef6d4ccd 595void rdma_backend_post_recv(RdmaBackendDev *backend_dev,
ef6d4ccd
YS
596 RdmaBackendQP *qp, uint8_t qp_type,
597 struct ibv_sge *sge, uint32_t num_sge, void *ctx)
598{
599 BackendCtx *bctx;
600 struct ibv_sge new_sge[MAX_SGE];
601 uint32_t bctx_id;
602 int rc;
a421c811 603 struct ibv_recv_wr wr = {}, *bad_wr;
ef6d4ccd
YS
604
605 if (!qp->ibqp) { /* This field does not get initialized for QP0 and QP1 */
606 if (qp_type == IBV_QPT_SMI) {
4d71b38a 607 rdma_error_report("Got QP0 request");
eaac0100 608 complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_QP0, ctx);
ef6d4ccd
YS
609 }
610 if (qp_type == IBV_QPT_GSI) {
605ec166
YS
611 rc = save_mad_recv_buffer(backend_dev, sge, num_sge, ctx);
612 if (rc) {
eaac0100 613 complete_work(IBV_WC_GENERAL_ERR, rc, ctx);
3c890bcf 614 backend_dev->rdma_dev_res->stats.mad_rx_bufs_err++;
c2dd117b 615 } else {
3c890bcf 616 backend_dev->rdma_dev_res->stats.mad_rx_bufs++;
605ec166 617 }
ef6d4ccd
YS
618 }
619 return;
620 }
621
ef6d4ccd
YS
622 bctx = g_malloc0(sizeof(*bctx));
623 bctx->up_ctx = ctx;
bf441451 624 bctx->backend_qp = qp;
ef6d4ccd 625
3c890bcf 626 rc = rdma_rm_alloc_cqe_ctx(backend_dev->rdma_dev_res, &bctx_id, bctx);
ef6d4ccd 627 if (unlikely(rc)) {
eaac0100 628 complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_NOMEM, ctx);
c2dd117b 629 goto err_free_bctx;
ef6d4ccd
YS
630 }
631
bf441451
YS
632 rdma_protected_gslist_append_int32(&qp->cqe_ctx_list, bctx_id);
633
3c890bcf 634 rc = build_host_sge_array(backend_dev->rdma_dev_res, new_sge, sge, num_sge,
c2dd117b 635 &backend_dev->rdma_dev_res->stats.rx_bufs_len);
ef6d4ccd 636 if (rc) {
eaac0100 637 complete_work(IBV_WC_GENERAL_ERR, rc, ctx);
c2dd117b 638 goto err_dealloc_cqe_ctx;
ef6d4ccd
YS
639 }
640
641 wr.num_sge = num_sge;
642 wr.sg_list = new_sge;
643 wr.wr_id = bctx_id;
644 rc = ibv_post_recv(qp->ibqp, &wr, &bad_wr);
ef6d4ccd 645 if (rc) {
4d71b38a
YS
646 rdma_error_report("ibv_post_recv fail, qpn=0x%x, rc=%d, errno=%d",
647 qp->ibqp->qp_num, rc, errno);
eaac0100 648 complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_FAIL_BACKEND, ctx);
c2dd117b 649 goto err_dealloc_cqe_ctx;
ef6d4ccd
YS
650 }
651
c2dd117b 652 atomic_inc(&backend_dev->rdma_dev_res->stats.missing_cqe);
3c890bcf 653 backend_dev->rdma_dev_res->stats.rx_bufs++;
c2dd117b 654
ef6d4ccd
YS
655 return;
656
c2dd117b
YS
657err_dealloc_cqe_ctx:
658 backend_dev->rdma_dev_res->stats.rx_bufs_err++;
3c890bcf 659 rdma_rm_dealloc_cqe_ctx(backend_dev->rdma_dev_res, bctx_id);
ef6d4ccd 660
c2dd117b 661err_free_bctx:
ef6d4ccd
YS
662 g_free(bctx);
663}
664
e926c9f1
KH
665void rdma_backend_post_srq_recv(RdmaBackendDev *backend_dev,
666 RdmaBackendSRQ *srq, struct ibv_sge *sge,
667 uint32_t num_sge, void *ctx)
668{
669 BackendCtx *bctx;
670 struct ibv_sge new_sge[MAX_SGE];
671 uint32_t bctx_id;
672 int rc;
673 struct ibv_recv_wr wr = {}, *bad_wr;
674
675 bctx = g_malloc0(sizeof(*bctx));
676 bctx->up_ctx = ctx;
677 bctx->backend_srq = srq;
678
679 rc = rdma_rm_alloc_cqe_ctx(backend_dev->rdma_dev_res, &bctx_id, bctx);
680 if (unlikely(rc)) {
681 complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_NOMEM, ctx);
682 goto err_free_bctx;
683 }
684
685 rdma_protected_gslist_append_int32(&srq->cqe_ctx_list, bctx_id);
686
687 rc = build_host_sge_array(backend_dev->rdma_dev_res, new_sge, sge, num_sge,
688 &backend_dev->rdma_dev_res->stats.rx_bufs_len);
689 if (rc) {
690 complete_work(IBV_WC_GENERAL_ERR, rc, ctx);
691 goto err_dealloc_cqe_ctx;
692 }
693
694 wr.num_sge = num_sge;
695 wr.sg_list = new_sge;
696 wr.wr_id = bctx_id;
697 rc = ibv_post_srq_recv(srq->ibsrq, &wr, &bad_wr);
698 if (rc) {
699 rdma_error_report("ibv_post_srq_recv fail, srqn=0x%x, rc=%d, errno=%d",
700 srq->ibsrq->handle, rc, errno);
701 complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_FAIL_BACKEND, ctx);
702 goto err_dealloc_cqe_ctx;
703 }
704
705 atomic_inc(&backend_dev->rdma_dev_res->stats.missing_cqe);
706 backend_dev->rdma_dev_res->stats.rx_bufs++;
707 backend_dev->rdma_dev_res->stats.rx_srq++;
708
709 return;
710
711err_dealloc_cqe_ctx:
712 backend_dev->rdma_dev_res->stats.rx_bufs_err++;
713 rdma_rm_dealloc_cqe_ctx(backend_dev->rdma_dev_res, bctx_id);
714
715err_free_bctx:
716 g_free(bctx);
717}
718
ef6d4ccd
YS
719int rdma_backend_create_pd(RdmaBackendDev *backend_dev, RdmaBackendPD *pd)
720{
721 pd->ibpd = ibv_alloc_pd(backend_dev->context);
722
4d71b38a
YS
723 if (!pd->ibpd) {
724 rdma_error_report("ibv_alloc_pd fail, errno=%d", errno);
725 return -EIO;
726 }
727
728 return 0;
ef6d4ccd
YS
729}
730
731void rdma_backend_destroy_pd(RdmaBackendPD *pd)
732{
733 if (pd->ibpd) {
734 ibv_dealloc_pd(pd->ibpd);
735 }
736}
737
9bbb8d35 738int rdma_backend_create_mr(RdmaBackendMR *mr, RdmaBackendPD *pd, void *addr,
ef6d4ccd
YS
739 size_t length, int access)
740{
9bbb8d35 741 mr->ibmr = ibv_reg_mr(pd->ibpd, addr, length, access);
4d71b38a
YS
742 if (!mr->ibmr) {
743 rdma_error_report("ibv_reg_mr fail, errno=%d", errno);
744 return -EIO;
ef6d4ccd
YS
745 }
746
4d71b38a
YS
747 mr->ibpd = pd->ibpd;
748
749 return 0;
ef6d4ccd
YS
750}
751
752void rdma_backend_destroy_mr(RdmaBackendMR *mr)
753{
754 if (mr->ibmr) {
755 ibv_dereg_mr(mr->ibmr);
756 }
757}
758
759int rdma_backend_create_cq(RdmaBackendDev *backend_dev, RdmaBackendCQ *cq,
760 int cqe)
761{
762 int rc;
763
ef6d4ccd
YS
764 cq->ibcq = ibv_create_cq(backend_dev->context, cqe + 1, NULL,
765 backend_dev->channel, 0);
4d71b38a
YS
766 if (!cq->ibcq) {
767 rdma_error_report("ibv_create_cq fail, errno=%d", errno);
768 return -EIO;
769 }
ef6d4ccd 770
4d71b38a
YS
771 rc = ibv_req_notify_cq(cq->ibcq, 0);
772 if (rc) {
773 rdma_warn_report("ibv_req_notify_cq fail, rc=%d, errno=%d", rc, errno);
ef6d4ccd
YS
774 }
775
4d71b38a
YS
776 cq->backend_dev = backend_dev;
777
778 return 0;
ef6d4ccd
YS
779}
780
781void rdma_backend_destroy_cq(RdmaBackendCQ *cq)
782{
783 if (cq->ibcq) {
784 ibv_destroy_cq(cq->ibcq);
785 }
786}
787
788int rdma_backend_create_qp(RdmaBackendQP *qp, uint8_t qp_type,
789 RdmaBackendPD *pd, RdmaBackendCQ *scq,
8b42cfab
KH
790 RdmaBackendCQ *rcq, RdmaBackendSRQ *srq,
791 uint32_t max_send_wr, uint32_t max_recv_wr,
792 uint32_t max_send_sge, uint32_t max_recv_sge)
ef6d4ccd 793{
a421c811 794 struct ibv_qp_init_attr attr = {};
ef6d4ccd
YS
795
796 qp->ibqp = 0;
ef6d4ccd
YS
797
798 switch (qp_type) {
799 case IBV_QPT_GSI:
ef6d4ccd
YS
800 return 0;
801
802 case IBV_QPT_RC:
803 /* fall through */
804 case IBV_QPT_UD:
805 /* do nothing */
806 break;
807
808 default:
4d71b38a 809 rdma_error_report("Unsupported QP type %d", qp_type);
ef6d4ccd
YS
810 return -EIO;
811 }
812
813 attr.qp_type = qp_type;
814 attr.send_cq = scq->ibcq;
815 attr.recv_cq = rcq->ibcq;
816 attr.cap.max_send_wr = max_send_wr;
817 attr.cap.max_recv_wr = max_recv_wr;
818 attr.cap.max_send_sge = max_send_sge;
819 attr.cap.max_recv_sge = max_recv_sge;
8b42cfab
KH
820 if (srq) {
821 attr.srq = srq->ibsrq;
822 }
ef6d4ccd 823
ef6d4ccd 824 qp->ibqp = ibv_create_qp(pd->ibpd, &attr);
4d71b38a
YS
825 if (!qp->ibqp) {
826 rdma_error_report("ibv_create_qp fail, errno=%d", errno);
ef6d4ccd
YS
827 return -EIO;
828 }
829
bf441451
YS
830 rdma_protected_gslist_init(&qp->cqe_ctx_list);
831
ef6d4ccd
YS
832 qp->ibpd = pd->ibpd;
833
834 /* TODO: Query QP to get max_inline_data and save it to be used in send */
835
ef6d4ccd
YS
836 return 0;
837}
838
839int rdma_backend_qp_state_init(RdmaBackendDev *backend_dev, RdmaBackendQP *qp,
840 uint8_t qp_type, uint32_t qkey)
841{
a421c811 842 struct ibv_qp_attr attr = {};
ef6d4ccd
YS
843 int rc, attr_mask;
844
ef6d4ccd
YS
845 attr_mask = IBV_QP_STATE | IBV_QP_PKEY_INDEX | IBV_QP_PORT;
846 attr.qp_state = IBV_QPS_INIT;
847 attr.pkey_index = 0;
848 attr.port_num = backend_dev->port_num;
849
850 switch (qp_type) {
851 case IBV_QPT_RC:
852 attr_mask |= IBV_QP_ACCESS_FLAGS;
4d71b38a 853 trace_rdma_backend_rc_qp_state_init(qp->ibqp->qp_num);
ef6d4ccd
YS
854 break;
855
856 case IBV_QPT_UD:
857 attr.qkey = qkey;
858 attr_mask |= IBV_QP_QKEY;
4d71b38a 859 trace_rdma_backend_ud_qp_state_init(qp->ibqp->qp_num, qkey);
ef6d4ccd
YS
860 break;
861
862 default:
4d71b38a 863 rdma_error_report("Unsupported QP type %d", qp_type);
ef6d4ccd
YS
864 return -EIO;
865 }
866
867 rc = ibv_modify_qp(qp->ibqp, &attr, attr_mask);
868 if (rc) {
4d71b38a 869 rdma_error_report("ibv_modify_qp fail, rc=%d, errno=%d", rc, errno);
ef6d4ccd
YS
870 return -EIO;
871 }
872
873 return 0;
874}
875
876int rdma_backend_qp_state_rtr(RdmaBackendDev *backend_dev, RdmaBackendQP *qp,
2b05705d
YS
877 uint8_t qp_type, uint8_t sgid_idx,
878 union ibv_gid *dgid, uint32_t dqpn,
879 uint32_t rq_psn, uint32_t qkey, bool use_qkey)
ef6d4ccd 880{
a421c811 881 struct ibv_qp_attr attr = {};
ef6d4ccd
YS
882 union ibv_gid ibv_gid = {
883 .global.interface_id = dgid->global.interface_id,
884 .global.subnet_prefix = dgid->global.subnet_prefix
885 };
886 int rc, attr_mask;
887
888 attr.qp_state = IBV_QPS_RTR;
889 attr_mask = IBV_QP_STATE;
890
2b05705d
YS
891 qp->sgid_idx = sgid_idx;
892
ef6d4ccd
YS
893 switch (qp_type) {
894 case IBV_QPT_RC:
ef6d4ccd
YS
895 attr.path_mtu = IBV_MTU_1024;
896 attr.dest_qp_num = dqpn;
897 attr.max_dest_rd_atomic = 1;
898 attr.min_rnr_timer = 12;
899 attr.ah_attr.port_num = backend_dev->port_num;
900 attr.ah_attr.is_global = 1;
901 attr.ah_attr.grh.hop_limit = 1;
902 attr.ah_attr.grh.dgid = ibv_gid;
2b05705d 903 attr.ah_attr.grh.sgid_index = qp->sgid_idx;
ef6d4ccd
YS
904 attr.rq_psn = rq_psn;
905
906 attr_mask |= IBV_QP_AV | IBV_QP_PATH_MTU | IBV_QP_DEST_QPN |
907 IBV_QP_RQ_PSN | IBV_QP_MAX_DEST_RD_ATOMIC |
908 IBV_QP_MIN_RNR_TIMER;
4d71b38a
YS
909
910 trace_rdma_backend_rc_qp_state_rtr(qp->ibqp->qp_num,
911 be64_to_cpu(ibv_gid.global.
912 subnet_prefix),
913 be64_to_cpu(ibv_gid.global.
914 interface_id),
915 qp->sgid_idx, dqpn, rq_psn);
ef6d4ccd
YS
916 break;
917
918 case IBV_QPT_UD:
919 if (use_qkey) {
ef6d4ccd
YS
920 attr.qkey = qkey;
921 attr_mask |= IBV_QP_QKEY;
922 }
4d71b38a
YS
923 trace_rdma_backend_ud_qp_state_rtr(qp->ibqp->qp_num, use_qkey ? qkey :
924 0);
ef6d4ccd
YS
925 break;
926 }
927
928 rc = ibv_modify_qp(qp->ibqp, &attr, attr_mask);
929 if (rc) {
4d71b38a 930 rdma_error_report("ibv_modify_qp fail, rc=%d, errno=%d", rc, errno);
ef6d4ccd
YS
931 return -EIO;
932 }
933
934 return 0;
935}
936
937int rdma_backend_qp_state_rts(RdmaBackendQP *qp, uint8_t qp_type,
938 uint32_t sq_psn, uint32_t qkey, bool use_qkey)
939{
a421c811 940 struct ibv_qp_attr attr = {};
ef6d4ccd
YS
941 int rc, attr_mask;
942
ef6d4ccd
YS
943 attr.qp_state = IBV_QPS_RTS;
944 attr.sq_psn = sq_psn;
945 attr_mask = IBV_QP_STATE | IBV_QP_SQ_PSN;
946
947 switch (qp_type) {
948 case IBV_QPT_RC:
949 attr.timeout = 14;
950 attr.retry_cnt = 7;
951 attr.rnr_retry = 7;
952 attr.max_rd_atomic = 1;
953
954 attr_mask |= IBV_QP_TIMEOUT | IBV_QP_RETRY_CNT | IBV_QP_RNR_RETRY |
955 IBV_QP_MAX_QP_RD_ATOMIC;
4d71b38a 956 trace_rdma_backend_rc_qp_state_rts(qp->ibqp->qp_num, sq_psn);
ef6d4ccd
YS
957 break;
958
959 case IBV_QPT_UD:
960 if (use_qkey) {
ef6d4ccd
YS
961 attr.qkey = qkey;
962 attr_mask |= IBV_QP_QKEY;
963 }
4d71b38a
YS
964 trace_rdma_backend_ud_qp_state_rts(qp->ibqp->qp_num, sq_psn,
965 use_qkey ? qkey : 0);
ef6d4ccd
YS
966 break;
967 }
968
969 rc = ibv_modify_qp(qp->ibqp, &attr, attr_mask);
970 if (rc) {
4d71b38a 971 rdma_error_report("ibv_modify_qp fail, rc=%d, errno=%d", rc, errno);
ef6d4ccd
YS
972 return -EIO;
973 }
974
975 return 0;
976}
977
c99f2174
YS
978int rdma_backend_query_qp(RdmaBackendQP *qp, struct ibv_qp_attr *attr,
979 int attr_mask, struct ibv_qp_init_attr *init_attr)
980{
981 if (!qp->ibqp) {
c99f2174
YS
982 attr->qp_state = IBV_QPS_RTS;
983 return 0;
984 }
985
986 return ibv_query_qp(qp->ibqp, attr, attr_mask, init_attr);
987}
988
bf441451 989void rdma_backend_destroy_qp(RdmaBackendQP *qp, RdmaDeviceResources *dev_res)
ef6d4ccd
YS
990{
991 if (qp->ibqp) {
992 ibv_destroy_qp(qp->ibqp);
993 }
bf441451
YS
994 g_slist_foreach(qp->cqe_ctx_list.list, free_cqe_ctx, dev_res);
995 rdma_protected_gslist_destroy(&qp->cqe_ctx_list);
ef6d4ccd
YS
996}
997
e926c9f1
KH
998int rdma_backend_create_srq(RdmaBackendSRQ *srq, RdmaBackendPD *pd,
999 uint32_t max_wr, uint32_t max_sge,
1000 uint32_t srq_limit)
1001{
1002 struct ibv_srq_init_attr srq_init_attr = {};
1003
1004 srq_init_attr.attr.max_wr = max_wr;
1005 srq_init_attr.attr.max_sge = max_sge;
1006 srq_init_attr.attr.srq_limit = srq_limit;
1007
1008 srq->ibsrq = ibv_create_srq(pd->ibpd, &srq_init_attr);
1009 if (!srq->ibsrq) {
1010 rdma_error_report("ibv_create_srq failed, errno=%d", errno);
1011 return -EIO;
1012 }
1013
1014 rdma_protected_gslist_init(&srq->cqe_ctx_list);
1015
1016 return 0;
1017}
1018
1019int rdma_backend_query_srq(RdmaBackendSRQ *srq, struct ibv_srq_attr *srq_attr)
1020{
1021 if (!srq->ibsrq) {
1022 return -EINVAL;
1023 }
1024
1025 return ibv_query_srq(srq->ibsrq, srq_attr);
1026}
1027
1028int rdma_backend_modify_srq(RdmaBackendSRQ *srq, struct ibv_srq_attr *srq_attr,
1029 int srq_attr_mask)
1030{
1031 if (!srq->ibsrq) {
1032 return -EINVAL;
1033 }
1034
1035 return ibv_modify_srq(srq->ibsrq, srq_attr, srq_attr_mask);
1036}
1037
1038void rdma_backend_destroy_srq(RdmaBackendSRQ *srq, RdmaDeviceResources *dev_res)
1039{
1040 if (srq->ibsrq) {
1041 ibv_destroy_srq(srq->ibsrq);
1042 }
1043 g_slist_foreach(srq->cqe_ctx_list.list, free_cqe_ctx, dev_res);
1044 rdma_protected_gslist_destroy(&srq->cqe_ctx_list);
1045}
1046
ef6d4ccd 1047#define CHK_ATTR(req, dev, member, fmt) ({ \
4d71b38a 1048 trace_rdma_check_dev_attr(#member, dev.member, req->member); \
ef6d4ccd 1049 if (req->member > dev.member) { \
4d71b38a
YS
1050 rdma_warn_report("%s = "fmt" is higher than host device capability "fmt, \
1051 #member, req->member, dev.member); \
ef6d4ccd
YS
1052 req->member = dev.member; \
1053 } \
4d71b38a 1054})
ef6d4ccd
YS
1055
1056static int init_device_caps(RdmaBackendDev *backend_dev,
1057 struct ibv_device_attr *dev_attr)
1058{
732d948c 1059 struct ibv_device_attr bk_dev_attr;
4d71b38a 1060 int rc;
732d948c 1061
4d71b38a
YS
1062 rc = ibv_query_device(backend_dev->context, &bk_dev_attr);
1063 if (rc) {
1064 rdma_error_report("ibv_query_device fail, rc=%d, errno=%d", rc, errno);
ef6d4ccd
YS
1065 return -EIO;
1066 }
1067
ffef4775 1068 dev_attr->max_sge = MAX_SGE;
e926c9f1 1069 dev_attr->max_srq_sge = MAX_SGE;
ffef4775 1070
732d948c
YS
1071 CHK_ATTR(dev_attr, bk_dev_attr, max_mr_size, "%" PRId64);
1072 CHK_ATTR(dev_attr, bk_dev_attr, max_qp, "%d");
1073 CHK_ATTR(dev_attr, bk_dev_attr, max_sge, "%d");
732d948c 1074 CHK_ATTR(dev_attr, bk_dev_attr, max_cq, "%d");
732d948c
YS
1075 CHK_ATTR(dev_attr, bk_dev_attr, max_mr, "%d");
1076 CHK_ATTR(dev_attr, bk_dev_attr, max_pd, "%d");
1077 CHK_ATTR(dev_attr, bk_dev_attr, max_qp_rd_atom, "%d");
1078 CHK_ATTR(dev_attr, bk_dev_attr, max_qp_init_rd_atom, "%d");
1079 CHK_ATTR(dev_attr, bk_dev_attr, max_ah, "%d");
e926c9f1 1080 CHK_ATTR(dev_attr, bk_dev_attr, max_srq, "%d");
ef6d4ccd
YS
1081
1082 return 0;
1083}
1084
605ec166
YS
1085static inline void build_mad_hdr(struct ibv_grh *grh, union ibv_gid *sgid,
1086 union ibv_gid *my_gid, int paylen)
1087{
1088 grh->paylen = htons(paylen);
1089 grh->sgid = *sgid;
1090 grh->dgid = *my_gid;
605ec166
YS
1091}
1092
2b05705d
YS
1093static void process_incoming_mad_req(RdmaBackendDev *backend_dev,
1094 RdmaCmMuxMsg *msg)
605ec166 1095{
605ec166
YS
1096 unsigned long cqe_ctx_id;
1097 BackendCtx *bctx;
1098 char *mad;
605ec166 1099
4d71b38a 1100 trace_mad_message("recv", msg->umad.mad, msg->umad_len);
605ec166 1101
b20fc795
YS
1102 cqe_ctx_id = rdma_protected_qlist_pop_int64(&backend_dev->recv_mads_list);
1103 if (cqe_ctx_id == -ENOENT) {
4d71b38a 1104 rdma_warn_report("No more free MADs buffers, waiting for a while");
605ec166
YS
1105 sleep(THR_POLL_TO);
1106 return;
1107 }
1108
605ec166
YS
1109 bctx = rdma_rm_get_cqe_ctx(backend_dev->rdma_dev_res, cqe_ctx_id);
1110 if (unlikely(!bctx)) {
4d71b38a 1111 rdma_error_report("No matching ctx for req %ld", cqe_ctx_id);
c2dd117b 1112 backend_dev->rdma_dev_res->stats.mad_rx_err++;
605ec166
YS
1113 return;
1114 }
1115
605ec166
YS
1116 mad = rdma_pci_dma_map(backend_dev->dev, bctx->sge.addr,
1117 bctx->sge.length);
2b05705d 1118 if (!mad || bctx->sge.length < msg->umad_len + MAD_HDR_SIZE) {
c2dd117b 1119 backend_dev->rdma_dev_res->stats.mad_rx_err++;
eaac0100
YS
1120 complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_INV_MAD_BUFF,
1121 bctx->up_ctx);
605ec166 1122 } else {
a421c811 1123 struct ibv_wc wc = {};
605ec166
YS
1124 memset(mad, 0, bctx->sge.length);
1125 build_mad_hdr((struct ibv_grh *)mad,
2b05705d
YS
1126 (union ibv_gid *)&msg->umad.hdr.addr.gid, &msg->hdr.sgid,
1127 msg->umad_len);
1128 memcpy(&mad[MAD_HDR_SIZE], msg->umad.mad, msg->umad_len);
605ec166
YS
1129 rdma_pci_dma_unmap(backend_dev->dev, mad, bctx->sge.length);
1130
eaac0100
YS
1131 wc.byte_len = msg->umad_len;
1132 wc.status = IBV_WC_SUCCESS;
1133 wc.wc_flags = IBV_WC_GRH;
c2dd117b 1134 backend_dev->rdma_dev_res->stats.mad_rx++;
eaac0100 1135 comp_handler(bctx->up_ctx, &wc);
605ec166
YS
1136 }
1137
1138 g_free(bctx);
1139 rdma_rm_dealloc_cqe_ctx(backend_dev->rdma_dev_res, cqe_ctx_id);
1140}
1141
2b05705d 1142static inline int rdmacm_mux_can_receive(void *opaque)
605ec166 1143{
2b05705d 1144 RdmaBackendDev *backend_dev = (RdmaBackendDev *)opaque;
605ec166 1145
2b05705d
YS
1146 return rdmacm_mux_can_process_async(backend_dev);
1147}
1148
1149static void rdmacm_mux_read(void *opaque, const uint8_t *buf, int size)
1150{
1151 RdmaBackendDev *backend_dev = (RdmaBackendDev *)opaque;
1152 RdmaCmMuxMsg *msg = (RdmaCmMuxMsg *)buf;
1153
4d71b38a 1154 trace_rdmacm_mux("read", msg->hdr.msg_type, msg->hdr.op_code);
2b05705d
YS
1155
1156 if (msg->hdr.msg_type != RDMACM_MUX_MSG_TYPE_REQ &&
1157 msg->hdr.op_code != RDMACM_MUX_OP_CODE_MAD) {
4d71b38a 1158 rdma_error_report("Error: Not a MAD request, skipping");
2b05705d 1159 return;
605ec166 1160 }
2b05705d
YS
1161 process_incoming_mad_req(backend_dev, msg);
1162}
1163
1164static int mad_init(RdmaBackendDev *backend_dev, CharBackend *mad_chr_be)
1165{
1166 int ret;
605ec166 1167
2b05705d 1168 backend_dev->rdmacm_mux.chr_be = mad_chr_be;
605ec166 1169
2b05705d
YS
1170 ret = qemu_chr_fe_backend_connected(backend_dev->rdmacm_mux.chr_be);
1171 if (!ret) {
4d71b38a 1172 rdma_error_report("Missing chardev for MAD multiplexer");
2b05705d 1173 return -EIO;
605ec166
YS
1174 }
1175
b20fc795 1176 rdma_protected_qlist_init(&backend_dev->recv_mads_list);
605ec166 1177
2b05705d
YS
1178 enable_rdmacm_mux_async(backend_dev);
1179
1180 qemu_chr_fe_set_handlers(backend_dev->rdmacm_mux.chr_be,
1181 rdmacm_mux_can_receive, rdmacm_mux_read, NULL,
1182 NULL, backend_dev, NULL, true);
1183
605ec166
YS
1184 return 0;
1185}
1186
ff30a446
YS
1187static void mad_stop(RdmaBackendDev *backend_dev)
1188{
1189 clean_recv_mads(backend_dev);
1190}
1191
605ec166
YS
1192static void mad_fini(RdmaBackendDev *backend_dev)
1193{
2b05705d
YS
1194 disable_rdmacm_mux_async(backend_dev);
1195 qemu_chr_fe_disconnect(backend_dev->rdmacm_mux.chr_be);
b20fc795 1196 rdma_protected_qlist_destroy(&backend_dev->recv_mads_list);
605ec166
YS
1197}
1198
2b05705d
YS
1199int rdma_backend_get_gid_index(RdmaBackendDev *backend_dev,
1200 union ibv_gid *gid)
1201{
1202 union ibv_gid sgid;
1203 int ret;
1204 int i = 0;
1205
2b05705d
YS
1206 do {
1207 ret = ibv_query_gid(backend_dev->context, backend_dev->port_num, i,
1208 &sgid);
1209 i++;
1210 } while (!ret && (memcmp(&sgid, gid, sizeof(*gid))));
1211
4d71b38a
YS
1212 trace_rdma_backend_get_gid_index(be64_to_cpu(gid->global.subnet_prefix),
1213 be64_to_cpu(gid->global.interface_id),
1214 i - 1);
2b05705d
YS
1215
1216 return ret ? ret : i - 1;
1217}
1218
1219int rdma_backend_add_gid(RdmaBackendDev *backend_dev, const char *ifname,
1220 union ibv_gid *gid)
1221{
555b3d67 1222 RdmaCmMuxMsg msg = {};
2b05705d
YS
1223 int ret;
1224
4d71b38a
YS
1225 trace_rdma_backend_gid_change("add", be64_to_cpu(gid->global.subnet_prefix),
1226 be64_to_cpu(gid->global.interface_id));
2b05705d
YS
1227
1228 msg.hdr.op_code = RDMACM_MUX_OP_CODE_REG;
1229 memcpy(msg.hdr.sgid.raw, gid->raw, sizeof(msg.hdr.sgid));
1230
4d71b38a 1231 ret = rdmacm_mux_send(backend_dev, &msg);
2b05705d 1232 if (ret) {
4d71b38a 1233 rdma_error_report("Failed to register GID to rdma_umadmux (%d)", ret);
2b05705d
YS
1234 return -EIO;
1235 }
1236
1237 qapi_event_send_rdma_gid_status_changed(ifname, true,
1238 gid->global.subnet_prefix,
1239 gid->global.interface_id);
1240
1241 return ret;
1242}
1243
1244int rdma_backend_del_gid(RdmaBackendDev *backend_dev, const char *ifname,
1245 union ibv_gid *gid)
1246{
555b3d67 1247 RdmaCmMuxMsg msg = {};
2b05705d
YS
1248 int ret;
1249
4d71b38a
YS
1250 trace_rdma_backend_gid_change("del", be64_to_cpu(gid->global.subnet_prefix),
1251 be64_to_cpu(gid->global.interface_id));
2b05705d
YS
1252
1253 msg.hdr.op_code = RDMACM_MUX_OP_CODE_UNREG;
1254 memcpy(msg.hdr.sgid.raw, gid->raw, sizeof(msg.hdr.sgid));
1255
4d71b38a 1256 ret = rdmacm_mux_send(backend_dev, &msg);
2b05705d 1257 if (ret) {
4d71b38a
YS
1258 rdma_error_report("Failed to unregister GID from rdma_umadmux (%d)",
1259 ret);
2b05705d
YS
1260 return -EIO;
1261 }
1262
1263 qapi_event_send_rdma_gid_status_changed(ifname, false,
1264 gid->global.subnet_prefix,
1265 gid->global.interface_id);
1266
1267 return 0;
1268}
1269
430e440c 1270int rdma_backend_init(RdmaBackendDev *backend_dev, PCIDevice *pdev,
ef6d4ccd
YS
1271 RdmaDeviceResources *rdma_dev_res,
1272 const char *backend_device_name, uint8_t port_num,
4d71b38a 1273 struct ibv_device_attr *dev_attr, CharBackend *mad_chr_be)
ef6d4ccd
YS
1274{
1275 int i;
1276 int ret = 0;
1277 int num_ibv_devices;
ef6d4ccd 1278 struct ibv_device **dev_list;
ef6d4ccd 1279
430e440c
YS
1280 memset(backend_dev, 0, sizeof(*backend_dev));
1281
1282 backend_dev->dev = pdev;
ef6d4ccd
YS
1283 backend_dev->port_num = port_num;
1284 backend_dev->rdma_dev_res = rdma_dev_res;
1285
1286 rdma_backend_register_comp_handler(dummy_comp_handler);
1287
1288 dev_list = ibv_get_device_list(&num_ibv_devices);
1289 if (!dev_list) {
4d71b38a 1290 rdma_error_report("Failed to get IB devices list");
ef6d4ccd
YS
1291 return -EIO;
1292 }
1293
1294 if (num_ibv_devices == 0) {
4d71b38a 1295 rdma_error_report("No IB devices were found");
ef6d4ccd
YS
1296 ret = -ENXIO;
1297 goto out_free_dev_list;
1298 }
1299
1300 if (backend_device_name) {
1301 for (i = 0; dev_list[i]; ++i) {
1302 if (!strcmp(ibv_get_device_name(dev_list[i]),
1303 backend_device_name)) {
1304 break;
1305 }
1306 }
1307
1308 backend_dev->ib_dev = dev_list[i];
1309 if (!backend_dev->ib_dev) {
4d71b38a
YS
1310 rdma_error_report("Failed to find IB device %s",
1311 backend_device_name);
ef6d4ccd
YS
1312 ret = -EIO;
1313 goto out_free_dev_list;
1314 }
1315 } else {
1316 backend_dev->ib_dev = *dev_list;
1317 }
1318
4d71b38a 1319 rdma_info_report("uverb device %s", backend_dev->ib_dev->dev_name);
ef6d4ccd
YS
1320
1321 backend_dev->context = ibv_open_device(backend_dev->ib_dev);
1322 if (!backend_dev->context) {
4d71b38a
YS
1323 rdma_error_report("Failed to open IB device %s",
1324 ibv_get_device_name(backend_dev->ib_dev));
ef6d4ccd
YS
1325 ret = -EIO;
1326 goto out;
1327 }
1328
1329 backend_dev->channel = ibv_create_comp_channel(backend_dev->context);
1330 if (!backend_dev->channel) {
4d71b38a 1331 rdma_error_report("Failed to create IB communication channel");
ef6d4ccd
YS
1332 ret = -EIO;
1333 goto out_close_device;
1334 }
ef6d4ccd 1335
ef6d4ccd
YS
1336 ret = init_device_caps(backend_dev, dev_attr);
1337 if (ret) {
4d71b38a 1338 rdma_error_report("Failed to initialize device capabilities");
ef6d4ccd
YS
1339 ret = -EIO;
1340 goto out_destroy_comm_channel;
1341 }
1342
ef6d4ccd 1343
2b05705d 1344 ret = mad_init(backend_dev, mad_chr_be);
605ec166 1345 if (ret) {
4d71b38a 1346 rdma_error_report("Failed to initialize mad");
605ec166
YS
1347 ret = -EIO;
1348 goto out_destroy_comm_channel;
1349 }
1350
75152227
YS
1351 backend_dev->comp_thread.run = false;
1352 backend_dev->comp_thread.is_running = false;
ef6d4ccd
YS
1353
1354 ah_cache_init();
1355
1356 goto out_free_dev_list;
1357
1358out_destroy_comm_channel:
1359 ibv_destroy_comp_channel(backend_dev->channel);
1360
1361out_close_device:
1362 ibv_close_device(backend_dev->context);
1363
1364out_free_dev_list:
1365 ibv_free_device_list(dev_list);
1366
1367out:
1368 return ret;
1369}
1370
75152227
YS
1371
1372void rdma_backend_start(RdmaBackendDev *backend_dev)
1373{
75152227
YS
1374 start_comp_thread(backend_dev);
1375}
1376
1377void rdma_backend_stop(RdmaBackendDev *backend_dev)
1378{
ff30a446 1379 mad_stop(backend_dev);
292dce62 1380 stop_backend_thread(&backend_dev->comp_thread);
75152227
YS
1381}
1382
ef6d4ccd
YS
1383void rdma_backend_fini(RdmaBackendDev *backend_dev)
1384{
605ec166 1385 mad_fini(backend_dev);
ef6d4ccd
YS
1386 g_hash_table_destroy(ah_hash);
1387 ibv_destroy_comp_channel(backend_dev->channel);
1388 ibv_close_device(backend_dev->context);
1389}