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b3a92277 YS |
1 | /* |
2 | * RDMA device: Definitions of Resource Manager structures | |
3 | * | |
4 | * Copyright (C) 2018 Oracle | |
5 | * Copyright (C) 2018 Red Hat Inc | |
6 | * | |
7 | * Authors: | |
8 | * Yuval Shaia <yuval.shaia@oracle.com> | |
9 | * Marcel Apfelbaum <marcel@redhat.com> | |
10 | * | |
11 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
12 | * See the COPYING file in the top-level directory. | |
13 | * | |
14 | */ | |
15 | ||
16 | #ifndef RDMA_RM_DEFS_H | |
17 | #define RDMA_RM_DEFS_H | |
18 | ||
19 | #include "rdma_backend_defs.h" | |
20 | ||
14c74f72 | 21 | #define MAX_PORTS 1 /* Do not change - we support only one port */ |
2b05705d | 22 | #define MAX_PORT_GIDS 255 |
c387e8a4 | 23 | #define MAX_GIDS MAX_PORT_GIDS |
b3a92277 | 24 | #define MAX_PORT_PKEYS 1 |
b9e34872 | 25 | #define MAX_PKEYS MAX_PORT_PKEYS |
b3a92277 YS |
26 | #define MAX_UCS 512 |
27 | #define MAX_MR_SIZE (1UL << 27) | |
28 | #define MAX_QP 1024 | |
29 | #define MAX_SGE 4 | |
30 | #define MAX_CQ 2048 | |
31 | #define MAX_MR 1024 | |
32 | #define MAX_PD 1024 | |
33 | #define MAX_QP_RD_ATOM 16 | |
34 | #define MAX_QP_INIT_RD_ATOM 16 | |
35 | #define MAX_AH 64 | |
cdc84058 | 36 | #define MAX_SRQ 512 |
b3a92277 | 37 | |
c2dd117b YS |
38 | #define MAX_RM_TBL_NAME 16 |
39 | #define MAX_CONSEQ_EMPTY_POLL_CQ 4096 /* considered as error above this */ | |
40 | ||
b3a92277 | 41 | typedef struct RdmaRmResTbl { |
6c080b9e | 42 | char name[MAX_RM_TBL_NAME]; |
b3a92277 YS |
43 | QemuMutex lock; |
44 | unsigned long *bitmap; | |
45 | size_t tbl_sz; | |
46 | size_t res_sz; | |
47 | void *tbl; | |
c2dd117b | 48 | uint32_t used; /* number of used entries in the table */ |
b3a92277 YS |
49 | } RdmaRmResTbl; |
50 | ||
51 | typedef struct RdmaRmPD { | |
52 | RdmaBackendPD backend_pd; | |
53 | uint32_t ctx_handle; | |
54 | } RdmaRmPD; | |
55 | ||
4082e533 YS |
56 | typedef enum CQNotificationType { |
57 | CNT_CLEAR, | |
58 | CNT_ARM, | |
59 | CNT_SET, | |
60 | } CQNotificationType; | |
61 | ||
b3a92277 YS |
62 | typedef struct RdmaRmCQ { |
63 | RdmaBackendCQ backend_cq; | |
64 | void *opaque; | |
4082e533 | 65 | CQNotificationType notify; |
b3a92277 YS |
66 | } RdmaRmCQ; |
67 | ||
b3a92277 YS |
68 | /* MR (DMA region) */ |
69 | typedef struct RdmaRmMR { | |
70 | RdmaBackendMR backend_mr; | |
7f99daad YS |
71 | void *virt; |
72 | uint64_t start; | |
73 | size_t length; | |
b3a92277 YS |
74 | uint32_t pd_handle; |
75 | uint32_t lkey; | |
76 | uint32_t rkey; | |
77 | } RdmaRmMR; | |
78 | ||
79 | typedef struct RdmaRmUC { | |
80 | uint64_t uc_handle; | |
81 | } RdmaRmUC; | |
82 | ||
83 | typedef struct RdmaRmQP { | |
84 | RdmaBackendQP backend_qp; | |
85 | void *opaque; | |
86 | uint32_t qp_type; | |
87 | uint32_t qpn; | |
88 | uint32_t send_cq_handle; | |
89 | uint32_t recv_cq_handle; | |
90 | enum ibv_qp_state qp_state; | |
8b42cfab | 91 | uint8_t is_srq; |
b3a92277 YS |
92 | } RdmaRmQP; |
93 | ||
cdc84058 KH |
94 | typedef struct RdmaRmSRQ { |
95 | RdmaBackendSRQ backend_srq; | |
96 | uint32_t recv_cq_handle; | |
97 | void *opaque; | |
98 | } RdmaRmSRQ; | |
99 | ||
2b05705d YS |
100 | typedef struct RdmaRmGid { |
101 | union ibv_gid gid; | |
102 | int backend_gid_index; | |
103 | } RdmaRmGid; | |
104 | ||
b3a92277 | 105 | typedef struct RdmaRmPort { |
2b05705d | 106 | RdmaRmGid gid_tbl[MAX_PORT_GIDS]; |
b3a92277 | 107 | enum ibv_port_state state; |
b3a92277 YS |
108 | } RdmaRmPort; |
109 | ||
c2dd117b YS |
110 | typedef struct RdmaRmStats { |
111 | uint64_t tx; | |
112 | uint64_t tx_len; | |
113 | uint64_t tx_err; | |
114 | uint64_t rx_bufs; | |
115 | uint64_t rx_bufs_len; | |
116 | uint64_t rx_bufs_err; | |
e926c9f1 | 117 | uint64_t rx_srq; |
c2dd117b YS |
118 | uint64_t completions; |
119 | uint64_t mad_tx; | |
120 | uint64_t mad_tx_err; | |
121 | uint64_t mad_rx; | |
122 | uint64_t mad_rx_err; | |
123 | uint64_t mad_rx_bufs; | |
124 | uint64_t mad_rx_bufs_err; | |
125 | uint64_t poll_cq_from_bk; | |
126 | uint64_t poll_cq_from_guest; | |
127 | uint64_t poll_cq_from_guest_empty; | |
128 | uint64_t poll_cq_ppoll_to; | |
129 | uint32_t missing_cqe; | |
130 | } RdmaRmStats; | |
131 | ||
59f91193 | 132 | struct RdmaDeviceResources { |
14c74f72 | 133 | RdmaRmPort port; |
b3a92277 YS |
134 | RdmaRmResTbl pd_tbl; |
135 | RdmaRmResTbl mr_tbl; | |
136 | RdmaRmResTbl uc_tbl; | |
137 | RdmaRmResTbl qp_tbl; | |
138 | RdmaRmResTbl cq_tbl; | |
139 | RdmaRmResTbl cqe_ctx_tbl; | |
cdc84058 | 140 | RdmaRmResTbl srq_tbl; |
b3a92277 | 141 | GHashTable *qp_hash; /* Keeps mapping between real and emulated */ |
2cfa9530 | 142 | QemuMutex lock; |
c2dd117b | 143 | RdmaRmStats stats; |
59f91193 | 144 | }; |
b3a92277 YS |
145 | |
146 | #endif |