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Commit | Line | Data |
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8cba80c3 FB |
1 | /* |
2 | * s390 PCI BUS | |
3 | * | |
4 | * Copyright 2014 IBM Corp. | |
5 | * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com> | |
6 | * Hong Bo Li <lihbbj@cn.ibm.com> | |
7 | * Yi Min Zhao <zyimin@cn.ibm.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or (at | |
10 | * your option) any later version. See the COPYING file in the top-level | |
11 | * directory. | |
12 | */ | |
13 | ||
9615495a | 14 | #include "qemu/osdep.h" |
3e5cfba3 YMZ |
15 | #include "qapi/error.h" |
16 | #include "qapi/visitor.h" | |
4771d756 PB |
17 | #include "qemu-common.h" |
18 | #include "cpu.h" | |
8cba80c3 | 19 | #include "s390-pci-bus.h" |
259a4f0a | 20 | #include "s390-pci-inst.h" |
a9c94277 | 21 | #include "hw/pci/pci_bus.h" |
3fc92a24 | 22 | #include "hw/pci/pci_bridge.h" |
a9c94277 MA |
23 | #include "hw/pci/msi.h" |
24 | #include "qemu/error-report.h" | |
8cba80c3 | 25 | |
229913f0 DA |
26 | #ifndef DEBUG_S390PCI_BUS |
27 | #define DEBUG_S390PCI_BUS 0 | |
8cba80c3 FB |
28 | #endif |
29 | ||
229913f0 DA |
30 | #define DPRINTF(fmt, ...) \ |
31 | do { \ | |
32 | if (DEBUG_S390PCI_BUS) { \ | |
33 | fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); \ | |
34 | } \ | |
35 | } while (0) | |
36 | ||
a975a24a | 37 | S390pciState *s390_get_phb(void) |
e7d33695 YMZ |
38 | { |
39 | static S390pciState *phb; | |
40 | ||
41 | if (!phb) { | |
42 | phb = S390_PCI_HOST_BRIDGE( | |
43 | object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL)); | |
44 | assert(phb != NULL); | |
45 | } | |
46 | ||
47 | return phb; | |
48 | } | |
49 | ||
8cba80c3 FB |
50 | int chsc_sei_nt2_get_event(void *res) |
51 | { | |
52 | ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res; | |
53 | PciCcdfAvail *accdf; | |
54 | PciCcdfErr *eccdf; | |
55 | int rc = 1; | |
56 | SeiContainer *sei_cont; | |
e7d33695 | 57 | S390pciState *s = s390_get_phb(); |
8cba80c3 FB |
58 | |
59 | sei_cont = QTAILQ_FIRST(&s->pending_sei); | |
60 | if (sei_cont) { | |
61 | QTAILQ_REMOVE(&s->pending_sei, sei_cont, link); | |
62 | nt2_res->nt = 2; | |
63 | nt2_res->cc = sei_cont->cc; | |
d3321fc7 | 64 | nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res)); |
8cba80c3 FB |
65 | switch (sei_cont->cc) { |
66 | case 1: /* error event */ | |
67 | eccdf = (PciCcdfErr *)nt2_res->ccdf; | |
68 | eccdf->fid = cpu_to_be32(sei_cont->fid); | |
69 | eccdf->fh = cpu_to_be32(sei_cont->fh); | |
70 | eccdf->e = cpu_to_be32(sei_cont->e); | |
71 | eccdf->faddr = cpu_to_be64(sei_cont->faddr); | |
72 | eccdf->pec = cpu_to_be16(sei_cont->pec); | |
73 | break; | |
74 | case 2: /* availability event */ | |
75 | accdf = (PciCcdfAvail *)nt2_res->ccdf; | |
76 | accdf->fid = cpu_to_be32(sei_cont->fid); | |
77 | accdf->fh = cpu_to_be32(sei_cont->fh); | |
78 | accdf->pec = cpu_to_be16(sei_cont->pec); | |
79 | break; | |
80 | default: | |
81 | abort(); | |
82 | } | |
83 | g_free(sei_cont); | |
84 | rc = 0; | |
85 | } | |
86 | ||
87 | return rc; | |
88 | } | |
89 | ||
90 | int chsc_sei_nt2_have_event(void) | |
91 | { | |
e7d33695 | 92 | S390pciState *s = s390_get_phb(); |
8cba80c3 FB |
93 | |
94 | return !QTAILQ_EMPTY(&s->pending_sei); | |
95 | } | |
96 | ||
a975a24a YMZ |
97 | S390PCIBusDevice *s390_pci_find_next_avail_dev(S390pciState *s, |
98 | S390PCIBusDevice *pbdev) | |
4e3bfc16 | 99 | { |
e70377df PM |
100 | S390PCIBusDevice *ret = pbdev ? QTAILQ_NEXT(pbdev, link) : |
101 | QTAILQ_FIRST(&s->zpci_devs); | |
4e3bfc16 | 102 | |
e70377df PM |
103 | while (ret && ret->state == ZPCI_FS_RESERVED) { |
104 | ret = QTAILQ_NEXT(ret, link); | |
4e3bfc16 YMZ |
105 | } |
106 | ||
e70377df | 107 | return ret; |
4e3bfc16 YMZ |
108 | } |
109 | ||
a975a24a | 110 | S390PCIBusDevice *s390_pci_find_dev_by_fid(S390pciState *s, uint32_t fid) |
8cba80c3 FB |
111 | { |
112 | S390PCIBusDevice *pbdev; | |
8cba80c3 | 113 | |
e70377df PM |
114 | QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { |
115 | if (pbdev->fid == fid) { | |
8cba80c3 FB |
116 | return pbdev; |
117 | } | |
118 | } | |
119 | ||
120 | return NULL; | |
121 | } | |
122 | ||
8f5cb693 | 123 | void s390_pci_sclp_configure(SCCB *sccb) |
8cba80c3 FB |
124 | { |
125 | PciCfgSccb *psccb = (PciCfgSccb *)sccb; | |
a975a24a YMZ |
126 | S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(), |
127 | be32_to_cpu(psccb->aid)); | |
8cba80c3 FB |
128 | uint16_t rc; |
129 | ||
3b40ea29 YMZ |
130 | if (be16_to_cpu(sccb->h.length) < 16) { |
131 | rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH; | |
132 | goto out; | |
133 | } | |
134 | ||
5d1abf23 | 135 | if (!pbdev) { |
8f5cb693 YMZ |
136 | DPRINTF("sclp config no dev found\n"); |
137 | rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; | |
5d1abf23 YMZ |
138 | goto out; |
139 | } | |
140 | ||
141 | switch (pbdev->state) { | |
142 | case ZPCI_FS_RESERVED: | |
143 | rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; | |
144 | break; | |
145 | case ZPCI_FS_STANDBY: | |
146 | pbdev->state = ZPCI_FS_DISABLED; | |
147 | rc = SCLP_RC_NORMAL_COMPLETION; | |
148 | break; | |
149 | default: | |
150 | rc = SCLP_RC_NO_ACTION_REQUIRED; | |
8f5cb693 | 151 | } |
3b40ea29 | 152 | out: |
8f5cb693 YMZ |
153 | psccb->header.response_code = cpu_to_be16(rc); |
154 | } | |
155 | ||
156 | void s390_pci_sclp_deconfigure(SCCB *sccb) | |
157 | { | |
158 | PciCfgSccb *psccb = (PciCfgSccb *)sccb; | |
a975a24a YMZ |
159 | S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(), |
160 | be32_to_cpu(psccb->aid)); | |
8f5cb693 YMZ |
161 | uint16_t rc; |
162 | ||
3b40ea29 YMZ |
163 | if (be16_to_cpu(sccb->h.length) < 16) { |
164 | rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH; | |
165 | goto out; | |
166 | } | |
167 | ||
5d1abf23 | 168 | if (!pbdev) { |
8f5cb693 | 169 | DPRINTF("sclp deconfig no dev found\n"); |
8cba80c3 | 170 | rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; |
5d1abf23 YMZ |
171 | goto out; |
172 | } | |
173 | ||
174 | switch (pbdev->state) { | |
175 | case ZPCI_FS_RESERVED: | |
176 | rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; | |
177 | break; | |
178 | case ZPCI_FS_STANDBY: | |
179 | rc = SCLP_RC_NO_ACTION_REQUIRED; | |
180 | break; | |
181 | default: | |
182 | if (pbdev->summary_ind) { | |
183 | pci_dereg_irqs(pbdev); | |
184 | } | |
de91ea92 YMZ |
185 | if (pbdev->iommu->enabled) { |
186 | pci_dereg_ioat(pbdev->iommu); | |
5d1abf23 YMZ |
187 | } |
188 | pbdev->state = ZPCI_FS_STANDBY; | |
189 | rc = SCLP_RC_NORMAL_COMPLETION; | |
93d16d81 YMZ |
190 | |
191 | if (pbdev->release_timer) { | |
192 | qdev_unplug(DEVICE(pbdev->pdev), NULL); | |
193 | } | |
8cba80c3 | 194 | } |
3b40ea29 | 195 | out: |
8cba80c3 | 196 | psccb->header.response_code = cpu_to_be16(rc); |
8cba80c3 FB |
197 | } |
198 | ||
a975a24a | 199 | static S390PCIBusDevice *s390_pci_find_dev_by_uid(S390pciState *s, uint16_t uid) |
3e5cfba3 | 200 | { |
3e5cfba3 | 201 | S390PCIBusDevice *pbdev; |
3e5cfba3 | 202 | |
e70377df | 203 | QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { |
3e5cfba3 YMZ |
204 | if (pbdev->uid == uid) { |
205 | return pbdev; | |
206 | } | |
207 | } | |
208 | ||
209 | return NULL; | |
210 | } | |
211 | ||
a975a24a YMZ |
212 | static S390PCIBusDevice *s390_pci_find_dev_by_target(S390pciState *s, |
213 | const char *target) | |
3e5cfba3 | 214 | { |
3e5cfba3 | 215 | S390PCIBusDevice *pbdev; |
3e5cfba3 YMZ |
216 | |
217 | if (!target) { | |
218 | return NULL; | |
219 | } | |
220 | ||
e70377df | 221 | QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { |
3e5cfba3 YMZ |
222 | if (!strcmp(pbdev->target, target)) { |
223 | return pbdev; | |
224 | } | |
225 | } | |
226 | ||
227 | return NULL; | |
228 | } | |
229 | ||
a975a24a | 230 | S390PCIBusDevice *s390_pci_find_dev_by_idx(S390pciState *s, uint32_t idx) |
8cba80c3 | 231 | { |
df8dd91b | 232 | return g_hash_table_lookup(s->zpci_table, &idx); |
8cba80c3 FB |
233 | } |
234 | ||
a975a24a | 235 | S390PCIBusDevice *s390_pci_find_dev_by_fh(S390pciState *s, uint32_t fh) |
8cba80c3 | 236 | { |
df8dd91b YMZ |
237 | uint32_t idx = FH_MASK_INDEX & fh; |
238 | S390PCIBusDevice *pbdev = s390_pci_find_dev_by_idx(s, idx); | |
8cba80c3 | 239 | |
df8dd91b YMZ |
240 | if (pbdev && pbdev->fh == fh) { |
241 | return pbdev; | |
8cba80c3 FB |
242 | } |
243 | ||
244 | return NULL; | |
245 | } | |
246 | ||
247 | static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh, | |
248 | uint32_t fid, uint64_t faddr, uint32_t e) | |
249 | { | |
b7022d9a | 250 | SeiContainer *sei_cont; |
e7d33695 | 251 | S390pciState *s = s390_get_phb(); |
8cba80c3 | 252 | |
b7022d9a | 253 | sei_cont = g_malloc0(sizeof(SeiContainer)); |
8cba80c3 FB |
254 | sei_cont->fh = fh; |
255 | sei_cont->fid = fid; | |
256 | sei_cont->cc = cc; | |
257 | sei_cont->pec = pec; | |
258 | sei_cont->faddr = faddr; | |
259 | sei_cont->e = e; | |
260 | ||
261 | QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link); | |
262 | css_generate_css_crws(0); | |
263 | } | |
264 | ||
265 | static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh, | |
266 | uint32_t fid) | |
267 | { | |
268 | s390_pci_generate_event(2, pec, fh, fid, 0, 0); | |
269 | } | |
270 | ||
5d1abf23 YMZ |
271 | void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid, |
272 | uint64_t faddr, uint32_t e) | |
8cba80c3 FB |
273 | { |
274 | s390_pci_generate_event(1, pec, fh, fid, faddr, e); | |
275 | } | |
276 | ||
277 | static void s390_pci_set_irq(void *opaque, int irq, int level) | |
278 | { | |
279 | /* nothing to do */ | |
280 | } | |
281 | ||
282 | static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num) | |
283 | { | |
284 | /* nothing to do */ | |
285 | return 0; | |
286 | } | |
287 | ||
288 | static uint64_t s390_pci_get_table_origin(uint64_t iota) | |
289 | { | |
290 | return iota & ~ZPCI_IOTA_RTTO_FLAG; | |
291 | } | |
292 | ||
293 | static unsigned int calc_rtx(dma_addr_t ptr) | |
294 | { | |
295 | return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK; | |
296 | } | |
297 | ||
298 | static unsigned int calc_sx(dma_addr_t ptr) | |
299 | { | |
300 | return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK; | |
301 | } | |
302 | ||
303 | static unsigned int calc_px(dma_addr_t ptr) | |
304 | { | |
305 | return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK; | |
306 | } | |
307 | ||
308 | static uint64_t get_rt_sto(uint64_t entry) | |
309 | { | |
310 | return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX) | |
311 | ? (entry & ZPCI_RTE_ADDR_MASK) | |
312 | : 0; | |
313 | } | |
314 | ||
315 | static uint64_t get_st_pto(uint64_t entry) | |
316 | { | |
317 | return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX) | |
318 | ? (entry & ZPCI_STE_ADDR_MASK) | |
319 | : 0; | |
320 | } | |
321 | ||
322 | static uint64_t s390_guest_io_table_walk(uint64_t guest_iota, | |
323 | uint64_t guest_dma_address) | |
324 | { | |
325 | uint64_t sto_a, pto_a, px_a; | |
326 | uint64_t sto, pto, pte; | |
327 | uint32_t rtx, sx, px; | |
328 | ||
329 | rtx = calc_rtx(guest_dma_address); | |
330 | sx = calc_sx(guest_dma_address); | |
331 | px = calc_px(guest_dma_address); | |
332 | ||
333 | sto_a = guest_iota + rtx * sizeof(uint64_t); | |
42874d3a PM |
334 | sto = address_space_ldq(&address_space_memory, sto_a, |
335 | MEMTXATTRS_UNSPECIFIED, NULL); | |
8cba80c3 FB |
336 | sto = get_rt_sto(sto); |
337 | if (!sto) { | |
338 | pte = 0; | |
339 | goto out; | |
340 | } | |
341 | ||
342 | pto_a = sto + sx * sizeof(uint64_t); | |
42874d3a PM |
343 | pto = address_space_ldq(&address_space_memory, pto_a, |
344 | MEMTXATTRS_UNSPECIFIED, NULL); | |
8cba80c3 FB |
345 | pto = get_st_pto(pto); |
346 | if (!pto) { | |
347 | pte = 0; | |
348 | goto out; | |
349 | } | |
350 | ||
351 | px_a = pto + px * sizeof(uint64_t); | |
42874d3a PM |
352 | pte = address_space_ldq(&address_space_memory, px_a, |
353 | MEMTXATTRS_UNSPECIFIED, NULL); | |
8cba80c3 FB |
354 | |
355 | out: | |
356 | return pte; | |
357 | } | |
358 | ||
de91ea92 | 359 | static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *mr, hwaddr addr, |
bf55b7af | 360 | IOMMUAccessFlags flag) |
8cba80c3 FB |
361 | { |
362 | uint64_t pte; | |
363 | uint32_t flags; | |
de91ea92 | 364 | S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr); |
8cba80c3 FB |
365 | IOMMUTLBEntry ret = { |
366 | .target_as = &address_space_memory, | |
367 | .iova = 0, | |
368 | .translated_addr = 0, | |
369 | .addr_mask = ~(hwaddr)0, | |
370 | .perm = IOMMU_NONE, | |
371 | }; | |
372 | ||
de91ea92 | 373 | switch (iommu->pbdev->state) { |
5d1abf23 YMZ |
374 | case ZPCI_FS_ENABLED: |
375 | case ZPCI_FS_BLOCKED: | |
de91ea92 | 376 | if (!iommu->enabled) { |
5d1abf23 YMZ |
377 | return ret; |
378 | } | |
379 | break; | |
380 | default: | |
dce1b089 YMZ |
381 | return ret; |
382 | } | |
383 | ||
8cba80c3 FB |
384 | DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr); |
385 | ||
de91ea92 | 386 | if (addr < iommu->pba || addr > iommu->pal) { |
8cba80c3 FB |
387 | return ret; |
388 | } | |
389 | ||
de91ea92 | 390 | pte = s390_guest_io_table_walk(s390_pci_get_table_origin(iommu->g_iota), |
8cba80c3 | 391 | addr); |
8cba80c3 | 392 | if (!pte) { |
8cba80c3 FB |
393 | return ret; |
394 | } | |
395 | ||
396 | flags = pte & ZPCI_PTE_FLAG_MASK; | |
397 | ret.iova = addr; | |
398 | ret.translated_addr = pte & ZPCI_PTE_ADDR_MASK; | |
399 | ret.addr_mask = 0xfff; | |
400 | ||
401 | if (flags & ZPCI_PTE_INVALID) { | |
402 | ret.perm = IOMMU_NONE; | |
403 | } else { | |
404 | ret.perm = IOMMU_RW; | |
405 | } | |
406 | ||
407 | return ret; | |
408 | } | |
409 | ||
410 | static const MemoryRegionIOMMUOps s390_iommu_ops = { | |
411 | .translate = s390_translate_iommu, | |
412 | }; | |
413 | ||
03805be0 YMZ |
414 | static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s, PCIBus *bus, |
415 | int devfn) | |
416 | { | |
417 | uint64_t key = (uintptr_t)bus; | |
418 | S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key); | |
419 | S390PCIIOMMU *iommu; | |
420 | ||
421 | if (!table) { | |
422 | table = g_malloc0(sizeof(S390PCIIOMMUTable)); | |
423 | table->key = key; | |
424 | g_hash_table_insert(s->iommu_table, &table->key, table); | |
425 | } | |
426 | ||
427 | iommu = table->iommu[PCI_SLOT(devfn)]; | |
428 | if (!iommu) { | |
429 | iommu = S390_PCI_IOMMU(object_new(TYPE_S390_PCI_IOMMU)); | |
430 | ||
431 | char *mr_name = g_strdup_printf("iommu-root-%02x:%02x.%01x", | |
432 | pci_bus_num(bus), | |
433 | PCI_SLOT(devfn), | |
434 | PCI_FUNC(devfn)); | |
435 | char *as_name = g_strdup_printf("iommu-pci-%02x:%02x.%01x", | |
436 | pci_bus_num(bus), | |
437 | PCI_SLOT(devfn), | |
438 | PCI_FUNC(devfn)); | |
439 | memory_region_init(&iommu->mr, OBJECT(iommu), mr_name, UINT64_MAX); | |
440 | address_space_init(&iommu->as, &iommu->mr, as_name); | |
441 | table->iommu[PCI_SLOT(devfn)] = iommu; | |
442 | ||
443 | g_free(mr_name); | |
444 | g_free(as_name); | |
445 | } | |
446 | ||
447 | return iommu; | |
448 | } | |
449 | ||
8cba80c3 FB |
450 | static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn) |
451 | { | |
452 | S390pciState *s = opaque; | |
03805be0 | 453 | S390PCIIOMMU *iommu = s390_pci_get_iommu(s, bus, devfn); |
8cba80c3 | 454 | |
03805be0 | 455 | return &iommu->as; |
8cba80c3 FB |
456 | } |
457 | ||
458 | static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set) | |
459 | { | |
460 | uint8_t ind_old, ind_new; | |
461 | hwaddr len = 1; | |
462 | uint8_t *ind_addr; | |
463 | ||
464 | ind_addr = cpu_physical_memory_map(ind_loc, &len, 1); | |
465 | if (!ind_addr) { | |
466 | s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0); | |
467 | return -1; | |
468 | } | |
469 | do { | |
470 | ind_old = *ind_addr; | |
471 | ind_new = ind_old | to_be_set; | |
472 | } while (atomic_cmpxchg(ind_addr, ind_old, ind_new) != ind_old); | |
473 | cpu_physical_memory_unmap(ind_addr, len, 1, len); | |
474 | ||
475 | return ind_old; | |
476 | } | |
477 | ||
478 | static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data, | |
479 | unsigned int size) | |
480 | { | |
8f955950 | 481 | S390PCIBusDevice *pbdev = opaque; |
cdd85eb2 | 482 | uint32_t idx = data >> ZPCI_MSI_VEC_BITS; |
8cba80c3 FB |
483 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; |
484 | uint64_t ind_bit; | |
485 | uint32_t sum_bit; | |
486 | uint32_t e = 0; | |
487 | ||
cdd85eb2 | 488 | DPRINTF("write_msix data 0x%" PRIx64 " idx %d vec 0x%x\n", data, idx, vec); |
8cba80c3 | 489 | |
8cba80c3 FB |
490 | if (!pbdev) { |
491 | e |= (vec << ERR_EVENT_MVN_OFFSET); | |
cdd85eb2 | 492 | s390_pci_generate_error_event(ERR_EVENT_NOMSI, idx, 0, addr, e); |
8cba80c3 FB |
493 | return; |
494 | } | |
495 | ||
5d1abf23 | 496 | if (pbdev->state != ZPCI_FS_ENABLED) { |
3be5c207 YMZ |
497 | return; |
498 | } | |
499 | ||
8cba80c3 FB |
500 | ind_bit = pbdev->routes.adapter.ind_offset; |
501 | sum_bit = pbdev->routes.adapter.summary_offset; | |
502 | ||
503 | set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8, | |
504 | 0x80 >> ((ind_bit + vec) % 8)); | |
505 | if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8, | |
506 | 0x80 >> (sum_bit % 8))) { | |
45bbcd35 | 507 | css_adapter_interrupt(pbdev->isc); |
8cba80c3 | 508 | } |
8cba80c3 FB |
509 | } |
510 | ||
511 | static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size) | |
512 | { | |
513 | return 0xffffffff; | |
514 | } | |
515 | ||
516 | static const MemoryRegionOps s390_msi_ctrl_ops = { | |
517 | .write = s390_msi_ctrl_write, | |
518 | .read = s390_msi_ctrl_read, | |
519 | .endianness = DEVICE_LITTLE_ENDIAN, | |
520 | }; | |
521 | ||
de91ea92 | 522 | void s390_pci_iommu_enable(S390PCIIOMMU *iommu) |
f0a399db | 523 | { |
de91ea92 YMZ |
524 | char *name = g_strdup_printf("iommu-s390-%04x", iommu->pbdev->uid); |
525 | memory_region_init_iommu(&iommu->iommu_mr, OBJECT(&iommu->mr), | |
526 | &s390_iommu_ops, name, iommu->pal + 1); | |
527 | iommu->enabled = true; | |
528 | memory_region_add_subregion(&iommu->mr, 0, &iommu->iommu_mr); | |
529 | g_free(name); | |
71583888 | 530 | } |
f0a399db | 531 | |
de91ea92 | 532 | void s390_pci_iommu_disable(S390PCIIOMMU *iommu) |
71583888 | 533 | { |
de91ea92 YMZ |
534 | iommu->enabled = false; |
535 | memory_region_del_subregion(&iommu->mr, &iommu->iommu_mr); | |
536 | object_unparent(OBJECT(&iommu->iommu_mr)); | |
f0a399db YMZ |
537 | } |
538 | ||
a975a24a | 539 | static void s390_pci_iommu_free(S390pciState *s, PCIBus *bus, int32_t devfn) |
8cba80c3 | 540 | { |
03805be0 YMZ |
541 | uint64_t key = (uintptr_t)bus; |
542 | S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key); | |
543 | S390PCIIOMMU *iommu = table ? table->iommu[PCI_SLOT(devfn)] : NULL; | |
8cba80c3 | 544 | |
03805be0 YMZ |
545 | if (!table || !iommu) { |
546 | return; | |
8cba80c3 | 547 | } |
03805be0 YMZ |
548 | |
549 | table->iommu[PCI_SLOT(devfn)] = NULL; | |
550 | address_space_destroy(&iommu->as); | |
551 | object_unparent(OBJECT(&iommu->mr)); | |
552 | object_unparent(OBJECT(iommu)); | |
553 | object_unref(OBJECT(iommu)); | |
8cba80c3 FB |
554 | } |
555 | ||
556 | static int s390_pcihost_init(SysBusDevice *dev) | |
557 | { | |
558 | PCIBus *b; | |
559 | BusState *bus; | |
560 | PCIHostState *phb = PCI_HOST_BRIDGE(dev); | |
561 | S390pciState *s = S390_PCI_HOST_BRIDGE(dev); | |
562 | ||
563 | DPRINTF("host_init\n"); | |
564 | ||
565 | b = pci_register_bus(DEVICE(dev), NULL, | |
566 | s390_pci_set_irq, s390_pci_map_irq, NULL, | |
567 | get_system_memory(), get_system_io(), 0, 64, | |
568 | TYPE_PCI_BUS); | |
8cba80c3 FB |
569 | pci_setup_iommu(b, s390_pci_dma_iommu, s); |
570 | ||
571 | bus = BUS(b); | |
572 | qbus_set_hotplug_handler(bus, DEVICE(dev), NULL); | |
573 | phb->bus = b; | |
90a0f9af YMZ |
574 | |
575 | s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, DEVICE(s), NULL)); | |
af9ed379 | 576 | qbus_set_hotplug_handler(BUS(s->bus), DEVICE(s), NULL); |
90a0f9af | 577 | |
03805be0 YMZ |
578 | s->iommu_table = g_hash_table_new_full(g_int64_hash, g_int64_equal, |
579 | NULL, g_free); | |
df8dd91b | 580 | s->zpci_table = g_hash_table_new_full(g_int_hash, g_int_equal, NULL, NULL); |
d2f07120 | 581 | s->bus_no = 0; |
8cba80c3 | 582 | QTAILQ_INIT(&s->pending_sei); |
e70377df | 583 | QTAILQ_INIT(&s->zpci_devs); |
dde522bb FL |
584 | |
585 | css_register_io_adapters(CSS_IO_ADAPTER_PCI, true, false, &error_abort); | |
586 | ||
8cba80c3 FB |
587 | return 0; |
588 | } | |
589 | ||
857cc719 | 590 | static int s390_pci_msix_init(S390PCIBusDevice *pbdev) |
8cba80c3 | 591 | { |
857cc719 | 592 | char *name; |
8cba80c3 FB |
593 | uint8_t pos; |
594 | uint16_t ctrl; | |
595 | uint32_t table, pba; | |
596 | ||
597 | pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX); | |
598 | if (!pos) { | |
599 | pbdev->msix.available = false; | |
857cc719 | 600 | return -1; |
8cba80c3 FB |
601 | } |
602 | ||
ce1307e1 | 603 | ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS, |
8cba80c3 FB |
604 | pci_config_size(pbdev->pdev), sizeof(ctrl)); |
605 | table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE, | |
606 | pci_config_size(pbdev->pdev), sizeof(table)); | |
607 | pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA, | |
608 | pci_config_size(pbdev->pdev), sizeof(pba)); | |
609 | ||
610 | pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK; | |
611 | pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK; | |
612 | pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK; | |
613 | pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK; | |
614 | pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1; | |
615 | pbdev->msix.available = true; | |
8f955950 YMZ |
616 | |
617 | name = g_strdup_printf("msix-s390-%04x", pbdev->uid); | |
8f955950 YMZ |
618 | memory_region_init_io(&pbdev->msix_notify_mr, OBJECT(pbdev), |
619 | &s390_msi_ctrl_ops, pbdev, name, PAGE_SIZE); | |
620 | memory_region_add_subregion(&pbdev->iommu->mr, ZPCI_MSI_ADDR, | |
621 | &pbdev->msix_notify_mr); | |
8f955950 | 622 | g_free(name); |
857cc719 YMZ |
623 | |
624 | return 0; | |
8f955950 YMZ |
625 | } |
626 | ||
627 | static void s390_pci_msix_free(S390PCIBusDevice *pbdev) | |
628 | { | |
629 | memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr); | |
630 | object_unparent(OBJECT(&pbdev->msix_notify_mr)); | |
631 | } | |
632 | ||
a975a24a YMZ |
633 | static S390PCIBusDevice *s390_pci_device_new(S390pciState *s, |
634 | const char *target) | |
3e5cfba3 YMZ |
635 | { |
636 | DeviceState *dev = NULL; | |
3e5cfba3 YMZ |
637 | |
638 | dev = qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE); | |
639 | if (!dev) { | |
640 | return NULL; | |
641 | } | |
642 | ||
643 | qdev_prop_set_string(dev, "target", target); | |
644 | qdev_init_nofail(dev); | |
645 | ||
646 | return S390_PCI_DEVICE(dev); | |
647 | } | |
648 | ||
a975a24a | 649 | static bool s390_pci_alloc_idx(S390pciState *s, S390PCIBusDevice *pbdev) |
e70377df PM |
650 | { |
651 | uint32_t idx; | |
e70377df PM |
652 | |
653 | idx = s->next_idx; | |
a975a24a | 654 | while (s390_pci_find_dev_by_idx(s, idx)) { |
e70377df PM |
655 | idx = (idx + 1) & FH_MASK_INDEX; |
656 | if (idx == s->next_idx) { | |
657 | return false; | |
658 | } | |
659 | } | |
660 | ||
661 | pbdev->idx = idx; | |
662 | s->next_idx = (idx + 1) & FH_MASK_INDEX; | |
663 | ||
664 | return true; | |
665 | } | |
666 | ||
8cba80c3 FB |
667 | static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev, |
668 | DeviceState *dev, Error **errp) | |
669 | { | |
af9ed379 YMZ |
670 | PCIDevice *pdev = NULL; |
671 | S390PCIBusDevice *pbdev = NULL; | |
672 | S390pciState *s = s390_get_phb(); | |
3e5cfba3 | 673 | |
3fc92a24 PM |
674 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) { |
675 | BusState *bus; | |
676 | PCIBridge *pb = PCI_BRIDGE(dev); | |
d2f07120 | 677 | PCIDevice *pdev = PCI_DEVICE(dev); |
3fc92a24 PM |
678 | |
679 | pci_bridge_map_irq(pb, dev->id, s390_pci_map_irq); | |
680 | pci_setup_iommu(&pb->sec_bus, s390_pci_dma_iommu, s); | |
681 | ||
682 | bus = BUS(&pb->sec_bus); | |
683 | qbus_set_hotplug_handler(bus, DEVICE(s), errp); | |
d2f07120 PM |
684 | |
685 | if (dev->hotplugged) { | |
686 | pci_default_write_config(pdev, PCI_PRIMARY_BUS, s->bus_no, 1); | |
687 | s->bus_no += 1; | |
688 | pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1); | |
689 | do { | |
690 | pdev = pdev->bus->parent_dev; | |
691 | pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, | |
692 | s->bus_no, 1); | |
693 | } while (pdev->bus && pci_bus_num(pdev->bus)); | |
694 | } | |
3fc92a24 | 695 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { |
af9ed379 YMZ |
696 | pdev = PCI_DEVICE(dev); |
697 | ||
698 | if (!dev->id) { | |
699 | /* In the case the PCI device does not define an id */ | |
700 | /* we generate one based on the PCI address */ | |
701 | dev->id = g_strdup_printf("auto_%02x:%02x.%01x", | |
702 | pci_bus_num(pdev->bus), | |
703 | PCI_SLOT(pdev->devfn), | |
704 | PCI_FUNC(pdev->devfn)); | |
705 | } | |
706 | ||
a975a24a | 707 | pbdev = s390_pci_find_dev_by_target(s, dev->id); |
3e5cfba3 | 708 | if (!pbdev) { |
a975a24a | 709 | pbdev = s390_pci_device_new(s, dev->id); |
af9ed379 YMZ |
710 | if (!pbdev) { |
711 | error_setg(errp, "create zpci device failed"); | |
0d36d791 | 712 | return; |
af9ed379 | 713 | } |
3e5cfba3 | 714 | } |
8cba80c3 | 715 | |
af9ed379 YMZ |
716 | if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) { |
717 | pbdev->fh |= FH_SHM_VFIO; | |
718 | } else { | |
719 | pbdev->fh |= FH_SHM_EMUL; | |
720 | } | |
8cba80c3 | 721 | |
af9ed379 | 722 | pbdev->pdev = pdev; |
03805be0 | 723 | pbdev->iommu = s390_pci_get_iommu(s, pdev->bus, pdev->devfn); |
de91ea92 | 724 | pbdev->iommu->pbdev = pbdev; |
af9ed379 | 725 | pbdev->state = ZPCI_FS_STANDBY; |
8f955950 | 726 | |
857cc719 YMZ |
727 | if (s390_pci_msix_init(pbdev)) { |
728 | error_setg(errp, "MSI-X support is mandatory " | |
729 | "in the S390 architecture"); | |
730 | return; | |
731 | } | |
8cba80c3 | 732 | |
af9ed379 YMZ |
733 | if (dev->hotplugged) { |
734 | s390_pci_generate_plug_event(HP_EVENT_RESERVED_TO_STANDBY, | |
735 | pbdev->fh, pbdev->fid); | |
736 | } | |
737 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { | |
af9ed379 | 738 | pbdev = S390_PCI_DEVICE(dev); |
af9ed379 | 739 | |
a975a24a | 740 | if (!s390_pci_alloc_idx(s, pbdev)) { |
e70377df PM |
741 | error_setg(errp, "no slot for plugging zpci device"); |
742 | return; | |
743 | } | |
744 | pbdev->fh = pbdev->idx; | |
745 | QTAILQ_INSERT_TAIL(&s->zpci_devs, pbdev, link); | |
df8dd91b | 746 | g_hash_table_insert(s->zpci_table, &pbdev->idx, pbdev); |
8cba80c3 | 747 | } |
8cba80c3 FB |
748 | } |
749 | ||
93d16d81 YMZ |
750 | static void s390_pcihost_timer_cb(void *opaque) |
751 | { | |
752 | S390PCIBusDevice *pbdev = opaque; | |
753 | ||
754 | if (pbdev->summary_ind) { | |
755 | pci_dereg_irqs(pbdev); | |
756 | } | |
de91ea92 YMZ |
757 | if (pbdev->iommu->enabled) { |
758 | pci_dereg_ioat(pbdev->iommu); | |
93d16d81 YMZ |
759 | } |
760 | ||
761 | pbdev->state = ZPCI_FS_STANDBY; | |
762 | s390_pci_generate_plug_event(HP_EVENT_CONFIGURED_TO_STBRES, | |
763 | pbdev->fh, pbdev->fid); | |
764 | qdev_unplug(DEVICE(pbdev), NULL); | |
765 | } | |
766 | ||
8cba80c3 FB |
767 | static void s390_pcihost_hot_unplug(HotplugHandler *hotplug_dev, |
768 | DeviceState *dev, Error **errp) | |
769 | { | |
af9ed379 | 770 | PCIDevice *pci_dev = NULL; |
03805be0 | 771 | PCIBus *bus; |
e70377df | 772 | int32_t devfn; |
af9ed379 YMZ |
773 | S390PCIBusDevice *pbdev = NULL; |
774 | S390pciState *s = s390_get_phb(); | |
775 | ||
3fc92a24 PM |
776 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) { |
777 | error_setg(errp, "PCI bridge hot unplug currently not supported"); | |
778 | return; | |
779 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { | |
af9ed379 YMZ |
780 | pci_dev = PCI_DEVICE(dev); |
781 | ||
e70377df PM |
782 | QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { |
783 | if (pbdev->pdev == pci_dev) { | |
af9ed379 YMZ |
784 | break; |
785 | } | |
786 | } | |
0c2a16a4 | 787 | assert(pbdev != NULL); |
af9ed379 YMZ |
788 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { |
789 | pbdev = S390_PCI_DEVICE(dev); | |
790 | pci_dev = pbdev->pdev; | |
791 | } | |
8cba80c3 | 792 | |
5d1abf23 YMZ |
793 | switch (pbdev->state) { |
794 | case ZPCI_FS_RESERVED: | |
795 | goto out; | |
796 | case ZPCI_FS_STANDBY: | |
797 | break; | |
798 | default: | |
93d16d81 | 799 | s390_pci_generate_plug_event(HP_EVENT_DECONFIGURE_REQUEST, |
8cba80c3 | 800 | pbdev->fh, pbdev->fid); |
93d16d81 YMZ |
801 | pbdev->release_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, |
802 | s390_pcihost_timer_cb, | |
803 | pbdev); | |
804 | timer_mod(pbdev->release_timer, | |
805 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + HOT_UNPLUG_TIMEOUT); | |
806 | return; | |
807 | } | |
808 | ||
809 | if (pbdev->release_timer && timer_pending(pbdev->release_timer)) { | |
810 | timer_del(pbdev->release_timer); | |
811 | timer_free(pbdev->release_timer); | |
812 | pbdev->release_timer = NULL; | |
8cba80c3 FB |
813 | } |
814 | ||
815 | s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED, | |
816 | pbdev->fh, pbdev->fid); | |
03805be0 YMZ |
817 | bus = pci_dev->bus; |
818 | devfn = pci_dev->devfn; | |
af9ed379 | 819 | object_unparent(OBJECT(pci_dev)); |
8f955950 | 820 | s390_pci_msix_free(pbdev); |
a975a24a | 821 | s390_pci_iommu_free(s, bus, devfn); |
8cba80c3 | 822 | pbdev->pdev = NULL; |
5d1abf23 YMZ |
823 | pbdev->state = ZPCI_FS_RESERVED; |
824 | out: | |
af9ed379 | 825 | pbdev->fid = 0; |
e70377df | 826 | QTAILQ_REMOVE(&s->zpci_devs, pbdev, link); |
df8dd91b | 827 | g_hash_table_remove(s->zpci_table, &pbdev->idx); |
af9ed379 | 828 | object_unparent(OBJECT(pbdev)); |
8cba80c3 FB |
829 | } |
830 | ||
d2f07120 PM |
831 | static void s390_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev, |
832 | void *opaque) | |
833 | { | |
834 | S390pciState *s = opaque; | |
835 | unsigned int primary = s->bus_no; | |
836 | unsigned int subordinate = 0xff; | |
837 | PCIBus *sec_bus = NULL; | |
838 | ||
839 | if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) != | |
840 | PCI_HEADER_TYPE_BRIDGE)) { | |
841 | return; | |
842 | } | |
843 | ||
844 | (s->bus_no)++; | |
845 | pci_default_write_config(pdev, PCI_PRIMARY_BUS, primary, 1); | |
846 | pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1); | |
847 | pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1); | |
848 | ||
849 | sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev)); | |
850 | if (!sec_bus) { | |
851 | return; | |
852 | } | |
853 | ||
854 | pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, subordinate, 1); | |
855 | pci_for_each_device(sec_bus, pci_bus_num(sec_bus), | |
856 | s390_pci_enumerate_bridge, s); | |
857 | pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1); | |
858 | } | |
859 | ||
860 | static void s390_pcihost_reset(DeviceState *dev) | |
861 | { | |
862 | S390pciState *s = S390_PCI_HOST_BRIDGE(dev); | |
863 | PCIBus *bus = s->parent_obj.bus; | |
864 | ||
865 | s->bus_no = 0; | |
866 | pci_for_each_device(bus, pci_bus_num(bus), s390_pci_enumerate_bridge, s); | |
867 | } | |
868 | ||
8cba80c3 FB |
869 | static void s390_pcihost_class_init(ObjectClass *klass, void *data) |
870 | { | |
871 | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); | |
872 | DeviceClass *dc = DEVICE_CLASS(klass); | |
873 | HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); | |
874 | ||
d2f07120 | 875 | dc->reset = s390_pcihost_reset; |
8cba80c3 FB |
876 | k->init = s390_pcihost_init; |
877 | hc->plug = s390_pcihost_hot_plug; | |
878 | hc->unplug = s390_pcihost_hot_unplug; | |
226419d6 | 879 | msi_nonbroken = true; |
8cba80c3 FB |
880 | } |
881 | ||
882 | static const TypeInfo s390_pcihost_info = { | |
883 | .name = TYPE_S390_PCI_HOST_BRIDGE, | |
884 | .parent = TYPE_PCI_HOST_BRIDGE, | |
885 | .instance_size = sizeof(S390pciState), | |
886 | .class_init = s390_pcihost_class_init, | |
887 | .interfaces = (InterfaceInfo[]) { | |
888 | { TYPE_HOTPLUG_HANDLER }, | |
889 | { } | |
890 | } | |
891 | }; | |
892 | ||
90a0f9af YMZ |
893 | static const TypeInfo s390_pcibus_info = { |
894 | .name = TYPE_S390_PCI_BUS, | |
895 | .parent = TYPE_BUS, | |
896 | .instance_size = sizeof(S390PCIBus), | |
897 | }; | |
898 | ||
a975a24a | 899 | static uint16_t s390_pci_generate_uid(S390pciState *s) |
3e5cfba3 YMZ |
900 | { |
901 | uint16_t uid = 0; | |
902 | ||
903 | do { | |
904 | uid++; | |
a975a24a | 905 | if (!s390_pci_find_dev_by_uid(s, uid)) { |
3e5cfba3 YMZ |
906 | return uid; |
907 | } | |
908 | } while (uid < ZPCI_MAX_UID); | |
909 | ||
910 | return UID_UNDEFINED; | |
911 | } | |
912 | ||
a975a24a | 913 | static uint32_t s390_pci_generate_fid(S390pciState *s, Error **errp) |
3e5cfba3 YMZ |
914 | { |
915 | uint32_t fid = 0; | |
916 | ||
35b6e94b | 917 | do { |
a975a24a | 918 | if (!s390_pci_find_dev_by_fid(s, fid)) { |
3e5cfba3 YMZ |
919 | return fid; |
920 | } | |
35b6e94b | 921 | } while (fid++ != ZPCI_MAX_FID); |
3e5cfba3 YMZ |
922 | |
923 | error_setg(errp, "no free fid could be found"); | |
924 | return 0; | |
925 | } | |
926 | ||
927 | static void s390_pci_device_realize(DeviceState *dev, Error **errp) | |
928 | { | |
929 | S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev); | |
a975a24a | 930 | S390pciState *s = s390_get_phb(); |
3e5cfba3 YMZ |
931 | |
932 | if (!zpci->target) { | |
933 | error_setg(errp, "target must be defined"); | |
934 | return; | |
935 | } | |
936 | ||
a975a24a | 937 | if (s390_pci_find_dev_by_target(s, zpci->target)) { |
3e5cfba3 YMZ |
938 | error_setg(errp, "target %s already has an associated zpci device", |
939 | zpci->target); | |
940 | return; | |
941 | } | |
942 | ||
943 | if (zpci->uid == UID_UNDEFINED) { | |
a975a24a | 944 | zpci->uid = s390_pci_generate_uid(s); |
3e5cfba3 YMZ |
945 | if (!zpci->uid) { |
946 | error_setg(errp, "no free uid could be found"); | |
947 | return; | |
948 | } | |
a975a24a | 949 | } else if (s390_pci_find_dev_by_uid(s, zpci->uid)) { |
3e5cfba3 YMZ |
950 | error_setg(errp, "uid %u already in use", zpci->uid); |
951 | return; | |
952 | } | |
953 | ||
954 | if (!zpci->fid_defined) { | |
955 | Error *local_error = NULL; | |
956 | ||
a975a24a | 957 | zpci->fid = s390_pci_generate_fid(s, &local_error); |
3e5cfba3 YMZ |
958 | if (local_error) { |
959 | error_propagate(errp, local_error); | |
960 | return; | |
961 | } | |
a975a24a | 962 | } else if (s390_pci_find_dev_by_fid(s, zpci->fid)) { |
3e5cfba3 YMZ |
963 | error_setg(errp, "fid %u already in use", zpci->fid); |
964 | return; | |
965 | } | |
966 | ||
967 | zpci->state = ZPCI_FS_RESERVED; | |
968 | } | |
969 | ||
970 | static void s390_pci_device_reset(DeviceState *dev) | |
971 | { | |
972 | S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev); | |
973 | ||
974 | switch (pbdev->state) { | |
975 | case ZPCI_FS_RESERVED: | |
976 | return; | |
977 | case ZPCI_FS_STANDBY: | |
978 | break; | |
979 | default: | |
980 | pbdev->fh &= ~FH_MASK_ENABLE; | |
981 | pbdev->state = ZPCI_FS_DISABLED; | |
982 | break; | |
983 | } | |
984 | ||
985 | if (pbdev->summary_ind) { | |
986 | pci_dereg_irqs(pbdev); | |
987 | } | |
de91ea92 YMZ |
988 | if (pbdev->iommu->enabled) { |
989 | pci_dereg_ioat(pbdev->iommu); | |
3e5cfba3 YMZ |
990 | } |
991 | ||
992 | pbdev->fmb_addr = 0; | |
993 | } | |
994 | ||
995 | static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name, | |
996 | void *opaque, Error **errp) | |
997 | { | |
998 | Property *prop = opaque; | |
999 | uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop); | |
1000 | ||
1001 | visit_type_uint32(v, name, ptr, errp); | |
1002 | } | |
1003 | ||
1004 | static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name, | |
1005 | void *opaque, Error **errp) | |
1006 | { | |
1007 | DeviceState *dev = DEVICE(obj); | |
1008 | S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj); | |
1009 | Property *prop = opaque; | |
1010 | uint32_t *ptr = qdev_get_prop_ptr(dev, prop); | |
1011 | ||
1012 | if (dev->realized) { | |
1013 | qdev_prop_set_after_realize(dev, name, errp); | |
1014 | return; | |
1015 | } | |
1016 | ||
1017 | visit_type_uint32(v, name, ptr, errp); | |
1018 | zpci->fid_defined = true; | |
1019 | } | |
1020 | ||
1021 | static PropertyInfo s390_pci_fid_propinfo = { | |
1022 | .name = "zpci_fid", | |
1023 | .get = s390_pci_get_fid, | |
1024 | .set = s390_pci_set_fid, | |
1025 | }; | |
1026 | ||
1027 | #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \ | |
1028 | DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t) | |
1029 | ||
1030 | static Property s390_pci_device_properties[] = { | |
1031 | DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED), | |
1032 | DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid), | |
1033 | DEFINE_PROP_STRING("target", S390PCIBusDevice, target), | |
1034 | DEFINE_PROP_END_OF_LIST(), | |
1035 | }; | |
1036 | ||
1037 | static void s390_pci_device_class_init(ObjectClass *klass, void *data) | |
1038 | { | |
1039 | DeviceClass *dc = DEVICE_CLASS(klass); | |
1040 | ||
1041 | dc->desc = "zpci device"; | |
1042 | dc->reset = s390_pci_device_reset; | |
1043 | dc->bus_type = TYPE_S390_PCI_BUS; | |
1044 | dc->realize = s390_pci_device_realize; | |
1045 | dc->props = s390_pci_device_properties; | |
1046 | } | |
1047 | ||
1048 | static const TypeInfo s390_pci_device_info = { | |
1049 | .name = TYPE_S390_PCI_DEVICE, | |
1050 | .parent = TYPE_DEVICE, | |
1051 | .instance_size = sizeof(S390PCIBusDevice), | |
1052 | .class_init = s390_pci_device_class_init, | |
1053 | }; | |
1054 | ||
de91ea92 YMZ |
1055 | static TypeInfo s390_pci_iommu_info = { |
1056 | .name = TYPE_S390_PCI_IOMMU, | |
1057 | .parent = TYPE_OBJECT, | |
1058 | .instance_size = sizeof(S390PCIIOMMU), | |
1059 | }; | |
1060 | ||
8cba80c3 FB |
1061 | static void s390_pci_register_types(void) |
1062 | { | |
1063 | type_register_static(&s390_pcihost_info); | |
90a0f9af | 1064 | type_register_static(&s390_pcibus_info); |
3e5cfba3 | 1065 | type_register_static(&s390_pci_device_info); |
de91ea92 | 1066 | type_register_static(&s390_pci_iommu_info); |
8cba80c3 FB |
1067 | } |
1068 | ||
1069 | type_init(s390_pci_register_types) |