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Commit | Line | Data |
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8cba80c3 FB |
1 | /* |
2 | * s390 PCI BUS | |
3 | * | |
4 | * Copyright 2014 IBM Corp. | |
5 | * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com> | |
6 | * Hong Bo Li <lihbbj@cn.ibm.com> | |
7 | * Yi Min Zhao <zyimin@cn.ibm.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or (at | |
10 | * your option) any later version. See the COPYING file in the top-level | |
11 | * directory. | |
12 | */ | |
13 | ||
9615495a | 14 | #include "qemu/osdep.h" |
3e5cfba3 YMZ |
15 | #include "qapi/error.h" |
16 | #include "qapi/visitor.h" | |
4771d756 PB |
17 | #include "qemu-common.h" |
18 | #include "cpu.h" | |
8cba80c3 | 19 | #include "s390-pci-bus.h" |
259a4f0a | 20 | #include "s390-pci-inst.h" |
a9c94277 MA |
21 | #include "hw/pci/pci_bus.h" |
22 | #include "hw/pci/msi.h" | |
23 | #include "qemu/error-report.h" | |
8cba80c3 FB |
24 | |
25 | /* #define DEBUG_S390PCI_BUS */ | |
26 | #ifdef DEBUG_S390PCI_BUS | |
27 | #define DPRINTF(fmt, ...) \ | |
28 | do { fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); } while (0) | |
29 | #else | |
30 | #define DPRINTF(fmt, ...) \ | |
31 | do { } while (0) | |
32 | #endif | |
33 | ||
e7d33695 YMZ |
34 | static S390pciState *s390_get_phb(void) |
35 | { | |
36 | static S390pciState *phb; | |
37 | ||
38 | if (!phb) { | |
39 | phb = S390_PCI_HOST_BRIDGE( | |
40 | object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL)); | |
41 | assert(phb != NULL); | |
42 | } | |
43 | ||
44 | return phb; | |
45 | } | |
46 | ||
8cba80c3 FB |
47 | int chsc_sei_nt2_get_event(void *res) |
48 | { | |
49 | ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res; | |
50 | PciCcdfAvail *accdf; | |
51 | PciCcdfErr *eccdf; | |
52 | int rc = 1; | |
53 | SeiContainer *sei_cont; | |
e7d33695 | 54 | S390pciState *s = s390_get_phb(); |
8cba80c3 FB |
55 | |
56 | sei_cont = QTAILQ_FIRST(&s->pending_sei); | |
57 | if (sei_cont) { | |
58 | QTAILQ_REMOVE(&s->pending_sei, sei_cont, link); | |
59 | nt2_res->nt = 2; | |
60 | nt2_res->cc = sei_cont->cc; | |
d3321fc7 | 61 | nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res)); |
8cba80c3 FB |
62 | switch (sei_cont->cc) { |
63 | case 1: /* error event */ | |
64 | eccdf = (PciCcdfErr *)nt2_res->ccdf; | |
65 | eccdf->fid = cpu_to_be32(sei_cont->fid); | |
66 | eccdf->fh = cpu_to_be32(sei_cont->fh); | |
67 | eccdf->e = cpu_to_be32(sei_cont->e); | |
68 | eccdf->faddr = cpu_to_be64(sei_cont->faddr); | |
69 | eccdf->pec = cpu_to_be16(sei_cont->pec); | |
70 | break; | |
71 | case 2: /* availability event */ | |
72 | accdf = (PciCcdfAvail *)nt2_res->ccdf; | |
73 | accdf->fid = cpu_to_be32(sei_cont->fid); | |
74 | accdf->fh = cpu_to_be32(sei_cont->fh); | |
75 | accdf->pec = cpu_to_be16(sei_cont->pec); | |
76 | break; | |
77 | default: | |
78 | abort(); | |
79 | } | |
80 | g_free(sei_cont); | |
81 | rc = 0; | |
82 | } | |
83 | ||
84 | return rc; | |
85 | } | |
86 | ||
87 | int chsc_sei_nt2_have_event(void) | |
88 | { | |
e7d33695 | 89 | S390pciState *s = s390_get_phb(); |
8cba80c3 FB |
90 | |
91 | return !QTAILQ_EMPTY(&s->pending_sei); | |
92 | } | |
93 | ||
4e3bfc16 YMZ |
94 | S390PCIBusDevice *s390_pci_find_next_avail_dev(S390PCIBusDevice *pbdev) |
95 | { | |
96 | int idx = 0; | |
97 | S390PCIBusDevice *dev = NULL; | |
98 | S390pciState *s = s390_get_phb(); | |
99 | ||
100 | if (pbdev) { | |
101 | idx = (pbdev->fh & FH_MASK_INDEX) + 1; | |
102 | } | |
103 | ||
104 | for (; idx < PCI_SLOT_MAX; idx++) { | |
105 | dev = s->pbdev[idx]; | |
106 | if (dev && dev->state != ZPCI_FS_RESERVED) { | |
107 | return dev; | |
108 | } | |
109 | } | |
110 | ||
111 | return NULL; | |
112 | } | |
113 | ||
8cba80c3 FB |
114 | S390PCIBusDevice *s390_pci_find_dev_by_fid(uint32_t fid) |
115 | { | |
116 | S390PCIBusDevice *pbdev; | |
117 | int i; | |
e7d33695 | 118 | S390pciState *s = s390_get_phb(); |
8cba80c3 FB |
119 | |
120 | for (i = 0; i < PCI_SLOT_MAX; i++) { | |
3e5cfba3 YMZ |
121 | pbdev = s->pbdev[i]; |
122 | if (pbdev && pbdev->fid == fid) { | |
8cba80c3 FB |
123 | return pbdev; |
124 | } | |
125 | } | |
126 | ||
127 | return NULL; | |
128 | } | |
129 | ||
8f5cb693 | 130 | void s390_pci_sclp_configure(SCCB *sccb) |
8cba80c3 FB |
131 | { |
132 | PciCfgSccb *psccb = (PciCfgSccb *)sccb; | |
133 | S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(be32_to_cpu(psccb->aid)); | |
134 | uint16_t rc; | |
135 | ||
3b40ea29 YMZ |
136 | if (be16_to_cpu(sccb->h.length) < 16) { |
137 | rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH; | |
138 | goto out; | |
139 | } | |
140 | ||
5d1abf23 | 141 | if (!pbdev) { |
8f5cb693 YMZ |
142 | DPRINTF("sclp config no dev found\n"); |
143 | rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; | |
5d1abf23 YMZ |
144 | goto out; |
145 | } | |
146 | ||
147 | switch (pbdev->state) { | |
148 | case ZPCI_FS_RESERVED: | |
149 | rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; | |
150 | break; | |
151 | case ZPCI_FS_STANDBY: | |
152 | pbdev->state = ZPCI_FS_DISABLED; | |
153 | rc = SCLP_RC_NORMAL_COMPLETION; | |
154 | break; | |
155 | default: | |
156 | rc = SCLP_RC_NO_ACTION_REQUIRED; | |
8f5cb693 | 157 | } |
3b40ea29 | 158 | out: |
8f5cb693 YMZ |
159 | psccb->header.response_code = cpu_to_be16(rc); |
160 | } | |
161 | ||
162 | void s390_pci_sclp_deconfigure(SCCB *sccb) | |
163 | { | |
164 | PciCfgSccb *psccb = (PciCfgSccb *)sccb; | |
165 | S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(be32_to_cpu(psccb->aid)); | |
166 | uint16_t rc; | |
167 | ||
3b40ea29 YMZ |
168 | if (be16_to_cpu(sccb->h.length) < 16) { |
169 | rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH; | |
170 | goto out; | |
171 | } | |
172 | ||
5d1abf23 | 173 | if (!pbdev) { |
8f5cb693 | 174 | DPRINTF("sclp deconfig no dev found\n"); |
8cba80c3 | 175 | rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; |
5d1abf23 YMZ |
176 | goto out; |
177 | } | |
178 | ||
179 | switch (pbdev->state) { | |
180 | case ZPCI_FS_RESERVED: | |
181 | rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; | |
182 | break; | |
183 | case ZPCI_FS_STANDBY: | |
184 | rc = SCLP_RC_NO_ACTION_REQUIRED; | |
185 | break; | |
186 | default: | |
187 | if (pbdev->summary_ind) { | |
188 | pci_dereg_irqs(pbdev); | |
189 | } | |
de91ea92 YMZ |
190 | if (pbdev->iommu->enabled) { |
191 | pci_dereg_ioat(pbdev->iommu); | |
5d1abf23 YMZ |
192 | } |
193 | pbdev->state = ZPCI_FS_STANDBY; | |
194 | rc = SCLP_RC_NORMAL_COMPLETION; | |
93d16d81 YMZ |
195 | |
196 | if (pbdev->release_timer) { | |
197 | qdev_unplug(DEVICE(pbdev->pdev), NULL); | |
198 | } | |
8cba80c3 | 199 | } |
3b40ea29 | 200 | out: |
8cba80c3 | 201 | psccb->header.response_code = cpu_to_be16(rc); |
8cba80c3 FB |
202 | } |
203 | ||
3e5cfba3 YMZ |
204 | static S390PCIBusDevice *s390_pci_find_dev_by_uid(uint16_t uid) |
205 | { | |
206 | int i; | |
207 | S390PCIBusDevice *pbdev; | |
208 | S390pciState *s = s390_get_phb(); | |
209 | ||
210 | for (i = 0; i < PCI_SLOT_MAX; i++) { | |
211 | pbdev = s->pbdev[i]; | |
212 | if (!pbdev) { | |
213 | continue; | |
214 | } | |
215 | ||
216 | if (pbdev->uid == uid) { | |
217 | return pbdev; | |
218 | } | |
219 | } | |
220 | ||
221 | return NULL; | |
222 | } | |
223 | ||
224 | static S390PCIBusDevice *s390_pci_find_dev_by_target(const char *target) | |
225 | { | |
226 | int i; | |
227 | S390PCIBusDevice *pbdev; | |
228 | S390pciState *s = s390_get_phb(); | |
229 | ||
230 | if (!target) { | |
231 | return NULL; | |
232 | } | |
233 | ||
234 | for (i = 0; i < PCI_SLOT_MAX; i++) { | |
235 | pbdev = s->pbdev[i]; | |
236 | if (!pbdev) { | |
237 | continue; | |
238 | } | |
239 | ||
240 | if (!strcmp(pbdev->target, target)) { | |
241 | return pbdev; | |
242 | } | |
243 | } | |
244 | ||
245 | return NULL; | |
246 | } | |
247 | ||
8cba80c3 FB |
248 | S390PCIBusDevice *s390_pci_find_dev_by_idx(uint32_t idx) |
249 | { | |
e7d33695 | 250 | S390pciState *s = s390_get_phb(); |
8cba80c3 | 251 | |
ab974657 | 252 | return s->pbdev[idx & FH_MASK_INDEX]; |
8cba80c3 FB |
253 | } |
254 | ||
255 | S390PCIBusDevice *s390_pci_find_dev_by_fh(uint32_t fh) | |
256 | { | |
e7d33695 | 257 | S390pciState *s = s390_get_phb(); |
06a96dae | 258 | S390PCIBusDevice *pbdev; |
8cba80c3 | 259 | |
3e5cfba3 YMZ |
260 | pbdev = s->pbdev[fh & FH_MASK_INDEX]; |
261 | if (pbdev && pbdev->fh == fh) { | |
06a96dae | 262 | return pbdev; |
8cba80c3 FB |
263 | } |
264 | ||
265 | return NULL; | |
266 | } | |
267 | ||
268 | static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh, | |
269 | uint32_t fid, uint64_t faddr, uint32_t e) | |
270 | { | |
b7022d9a | 271 | SeiContainer *sei_cont; |
e7d33695 | 272 | S390pciState *s = s390_get_phb(); |
8cba80c3 | 273 | |
b7022d9a | 274 | sei_cont = g_malloc0(sizeof(SeiContainer)); |
8cba80c3 FB |
275 | sei_cont->fh = fh; |
276 | sei_cont->fid = fid; | |
277 | sei_cont->cc = cc; | |
278 | sei_cont->pec = pec; | |
279 | sei_cont->faddr = faddr; | |
280 | sei_cont->e = e; | |
281 | ||
282 | QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link); | |
283 | css_generate_css_crws(0); | |
284 | } | |
285 | ||
286 | static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh, | |
287 | uint32_t fid) | |
288 | { | |
289 | s390_pci_generate_event(2, pec, fh, fid, 0, 0); | |
290 | } | |
291 | ||
5d1abf23 YMZ |
292 | void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid, |
293 | uint64_t faddr, uint32_t e) | |
8cba80c3 FB |
294 | { |
295 | s390_pci_generate_event(1, pec, fh, fid, faddr, e); | |
296 | } | |
297 | ||
298 | static void s390_pci_set_irq(void *opaque, int irq, int level) | |
299 | { | |
300 | /* nothing to do */ | |
301 | } | |
302 | ||
303 | static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num) | |
304 | { | |
305 | /* nothing to do */ | |
306 | return 0; | |
307 | } | |
308 | ||
309 | static uint64_t s390_pci_get_table_origin(uint64_t iota) | |
310 | { | |
311 | return iota & ~ZPCI_IOTA_RTTO_FLAG; | |
312 | } | |
313 | ||
314 | static unsigned int calc_rtx(dma_addr_t ptr) | |
315 | { | |
316 | return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK; | |
317 | } | |
318 | ||
319 | static unsigned int calc_sx(dma_addr_t ptr) | |
320 | { | |
321 | return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK; | |
322 | } | |
323 | ||
324 | static unsigned int calc_px(dma_addr_t ptr) | |
325 | { | |
326 | return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK; | |
327 | } | |
328 | ||
329 | static uint64_t get_rt_sto(uint64_t entry) | |
330 | { | |
331 | return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX) | |
332 | ? (entry & ZPCI_RTE_ADDR_MASK) | |
333 | : 0; | |
334 | } | |
335 | ||
336 | static uint64_t get_st_pto(uint64_t entry) | |
337 | { | |
338 | return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX) | |
339 | ? (entry & ZPCI_STE_ADDR_MASK) | |
340 | : 0; | |
341 | } | |
342 | ||
343 | static uint64_t s390_guest_io_table_walk(uint64_t guest_iota, | |
344 | uint64_t guest_dma_address) | |
345 | { | |
346 | uint64_t sto_a, pto_a, px_a; | |
347 | uint64_t sto, pto, pte; | |
348 | uint32_t rtx, sx, px; | |
349 | ||
350 | rtx = calc_rtx(guest_dma_address); | |
351 | sx = calc_sx(guest_dma_address); | |
352 | px = calc_px(guest_dma_address); | |
353 | ||
354 | sto_a = guest_iota + rtx * sizeof(uint64_t); | |
42874d3a PM |
355 | sto = address_space_ldq(&address_space_memory, sto_a, |
356 | MEMTXATTRS_UNSPECIFIED, NULL); | |
8cba80c3 FB |
357 | sto = get_rt_sto(sto); |
358 | if (!sto) { | |
359 | pte = 0; | |
360 | goto out; | |
361 | } | |
362 | ||
363 | pto_a = sto + sx * sizeof(uint64_t); | |
42874d3a PM |
364 | pto = address_space_ldq(&address_space_memory, pto_a, |
365 | MEMTXATTRS_UNSPECIFIED, NULL); | |
8cba80c3 FB |
366 | pto = get_st_pto(pto); |
367 | if (!pto) { | |
368 | pte = 0; | |
369 | goto out; | |
370 | } | |
371 | ||
372 | px_a = pto + px * sizeof(uint64_t); | |
42874d3a PM |
373 | pte = address_space_ldq(&address_space_memory, px_a, |
374 | MEMTXATTRS_UNSPECIFIED, NULL); | |
8cba80c3 FB |
375 | |
376 | out: | |
377 | return pte; | |
378 | } | |
379 | ||
de91ea92 | 380 | static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *mr, hwaddr addr, |
8cba80c3 FB |
381 | bool is_write) |
382 | { | |
383 | uint64_t pte; | |
384 | uint32_t flags; | |
de91ea92 | 385 | S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr); |
8cba80c3 FB |
386 | IOMMUTLBEntry ret = { |
387 | .target_as = &address_space_memory, | |
388 | .iova = 0, | |
389 | .translated_addr = 0, | |
390 | .addr_mask = ~(hwaddr)0, | |
391 | .perm = IOMMU_NONE, | |
392 | }; | |
393 | ||
de91ea92 | 394 | switch (iommu->pbdev->state) { |
5d1abf23 YMZ |
395 | case ZPCI_FS_ENABLED: |
396 | case ZPCI_FS_BLOCKED: | |
de91ea92 | 397 | if (!iommu->enabled) { |
5d1abf23 YMZ |
398 | return ret; |
399 | } | |
400 | break; | |
401 | default: | |
dce1b089 YMZ |
402 | return ret; |
403 | } | |
404 | ||
8cba80c3 FB |
405 | DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr); |
406 | ||
de91ea92 | 407 | if (addr < iommu->pba || addr > iommu->pal) { |
8cba80c3 FB |
408 | return ret; |
409 | } | |
410 | ||
de91ea92 | 411 | pte = s390_guest_io_table_walk(s390_pci_get_table_origin(iommu->g_iota), |
8cba80c3 | 412 | addr); |
8cba80c3 | 413 | if (!pte) { |
8cba80c3 FB |
414 | return ret; |
415 | } | |
416 | ||
417 | flags = pte & ZPCI_PTE_FLAG_MASK; | |
418 | ret.iova = addr; | |
419 | ret.translated_addr = pte & ZPCI_PTE_ADDR_MASK; | |
420 | ret.addr_mask = 0xfff; | |
421 | ||
422 | if (flags & ZPCI_PTE_INVALID) { | |
423 | ret.perm = IOMMU_NONE; | |
424 | } else { | |
425 | ret.perm = IOMMU_RW; | |
426 | } | |
427 | ||
428 | return ret; | |
429 | } | |
430 | ||
431 | static const MemoryRegionIOMMUOps s390_iommu_ops = { | |
432 | .translate = s390_translate_iommu, | |
433 | }; | |
434 | ||
03805be0 YMZ |
435 | static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s, PCIBus *bus, |
436 | int devfn) | |
437 | { | |
438 | uint64_t key = (uintptr_t)bus; | |
439 | S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key); | |
440 | S390PCIIOMMU *iommu; | |
441 | ||
442 | if (!table) { | |
443 | table = g_malloc0(sizeof(S390PCIIOMMUTable)); | |
444 | table->key = key; | |
445 | g_hash_table_insert(s->iommu_table, &table->key, table); | |
446 | } | |
447 | ||
448 | iommu = table->iommu[PCI_SLOT(devfn)]; | |
449 | if (!iommu) { | |
450 | iommu = S390_PCI_IOMMU(object_new(TYPE_S390_PCI_IOMMU)); | |
451 | ||
452 | char *mr_name = g_strdup_printf("iommu-root-%02x:%02x.%01x", | |
453 | pci_bus_num(bus), | |
454 | PCI_SLOT(devfn), | |
455 | PCI_FUNC(devfn)); | |
456 | char *as_name = g_strdup_printf("iommu-pci-%02x:%02x.%01x", | |
457 | pci_bus_num(bus), | |
458 | PCI_SLOT(devfn), | |
459 | PCI_FUNC(devfn)); | |
460 | memory_region_init(&iommu->mr, OBJECT(iommu), mr_name, UINT64_MAX); | |
461 | address_space_init(&iommu->as, &iommu->mr, as_name); | |
462 | table->iommu[PCI_SLOT(devfn)] = iommu; | |
463 | ||
464 | g_free(mr_name); | |
465 | g_free(as_name); | |
466 | } | |
467 | ||
468 | return iommu; | |
469 | } | |
470 | ||
8cba80c3 FB |
471 | static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn) |
472 | { | |
473 | S390pciState *s = opaque; | |
03805be0 | 474 | S390PCIIOMMU *iommu = s390_pci_get_iommu(s, bus, devfn); |
8cba80c3 | 475 | |
03805be0 | 476 | return &iommu->as; |
8cba80c3 FB |
477 | } |
478 | ||
479 | static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set) | |
480 | { | |
481 | uint8_t ind_old, ind_new; | |
482 | hwaddr len = 1; | |
483 | uint8_t *ind_addr; | |
484 | ||
485 | ind_addr = cpu_physical_memory_map(ind_loc, &len, 1); | |
486 | if (!ind_addr) { | |
487 | s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0); | |
488 | return -1; | |
489 | } | |
490 | do { | |
491 | ind_old = *ind_addr; | |
492 | ind_new = ind_old | to_be_set; | |
493 | } while (atomic_cmpxchg(ind_addr, ind_old, ind_new) != ind_old); | |
494 | cpu_physical_memory_unmap(ind_addr, len, 1, len); | |
495 | ||
496 | return ind_old; | |
497 | } | |
498 | ||
499 | static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data, | |
500 | unsigned int size) | |
501 | { | |
8f955950 | 502 | S390PCIBusDevice *pbdev = opaque; |
cdd85eb2 | 503 | uint32_t idx = data >> ZPCI_MSI_VEC_BITS; |
8cba80c3 FB |
504 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; |
505 | uint64_t ind_bit; | |
506 | uint32_t sum_bit; | |
507 | uint32_t e = 0; | |
508 | ||
cdd85eb2 | 509 | DPRINTF("write_msix data 0x%" PRIx64 " idx %d vec 0x%x\n", data, idx, vec); |
8cba80c3 | 510 | |
8cba80c3 FB |
511 | if (!pbdev) { |
512 | e |= (vec << ERR_EVENT_MVN_OFFSET); | |
cdd85eb2 | 513 | s390_pci_generate_error_event(ERR_EVENT_NOMSI, idx, 0, addr, e); |
8cba80c3 FB |
514 | return; |
515 | } | |
516 | ||
5d1abf23 | 517 | if (pbdev->state != ZPCI_FS_ENABLED) { |
3be5c207 YMZ |
518 | return; |
519 | } | |
520 | ||
8cba80c3 FB |
521 | ind_bit = pbdev->routes.adapter.ind_offset; |
522 | sum_bit = pbdev->routes.adapter.summary_offset; | |
523 | ||
524 | set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8, | |
525 | 0x80 >> ((ind_bit + vec) % 8)); | |
526 | if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8, | |
527 | 0x80 >> (sum_bit % 8))) { | |
45bbcd35 | 528 | css_adapter_interrupt(pbdev->isc); |
8cba80c3 | 529 | } |
8cba80c3 FB |
530 | } |
531 | ||
532 | static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size) | |
533 | { | |
534 | return 0xffffffff; | |
535 | } | |
536 | ||
537 | static const MemoryRegionOps s390_msi_ctrl_ops = { | |
538 | .write = s390_msi_ctrl_write, | |
539 | .read = s390_msi_ctrl_read, | |
540 | .endianness = DEVICE_LITTLE_ENDIAN, | |
541 | }; | |
542 | ||
de91ea92 | 543 | void s390_pci_iommu_enable(S390PCIIOMMU *iommu) |
f0a399db | 544 | { |
de91ea92 YMZ |
545 | char *name = g_strdup_printf("iommu-s390-%04x", iommu->pbdev->uid); |
546 | memory_region_init_iommu(&iommu->iommu_mr, OBJECT(&iommu->mr), | |
547 | &s390_iommu_ops, name, iommu->pal + 1); | |
548 | iommu->enabled = true; | |
549 | memory_region_add_subregion(&iommu->mr, 0, &iommu->iommu_mr); | |
550 | g_free(name); | |
71583888 | 551 | } |
f0a399db | 552 | |
de91ea92 | 553 | void s390_pci_iommu_disable(S390PCIIOMMU *iommu) |
71583888 | 554 | { |
de91ea92 YMZ |
555 | iommu->enabled = false; |
556 | memory_region_del_subregion(&iommu->mr, &iommu->iommu_mr); | |
557 | object_unparent(OBJECT(&iommu->iommu_mr)); | |
f0a399db YMZ |
558 | } |
559 | ||
03805be0 | 560 | static void s390_pci_iommu_free(PCIBus *bus, int32_t devfn) |
8cba80c3 | 561 | { |
03805be0 YMZ |
562 | uint64_t key = (uintptr_t)bus; |
563 | S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key); | |
564 | S390PCIIOMMU *iommu = table ? table->iommu[PCI_SLOT(devfn)] : NULL; | |
8cba80c3 | 565 | |
03805be0 YMZ |
566 | if (!table || !iommu) { |
567 | return; | |
8cba80c3 | 568 | } |
03805be0 YMZ |
569 | |
570 | table->iommu[PCI_SLOT(devfn)] = NULL; | |
571 | address_space_destroy(&iommu->as); | |
572 | object_unparent(OBJECT(&iommu->mr)); | |
573 | object_unparent(OBJECT(iommu)); | |
574 | object_unref(OBJECT(iommu)); | |
8cba80c3 FB |
575 | } |
576 | ||
577 | static int s390_pcihost_init(SysBusDevice *dev) | |
578 | { | |
579 | PCIBus *b; | |
580 | BusState *bus; | |
581 | PCIHostState *phb = PCI_HOST_BRIDGE(dev); | |
582 | S390pciState *s = S390_PCI_HOST_BRIDGE(dev); | |
583 | ||
584 | DPRINTF("host_init\n"); | |
585 | ||
586 | b = pci_register_bus(DEVICE(dev), NULL, | |
587 | s390_pci_set_irq, s390_pci_map_irq, NULL, | |
588 | get_system_memory(), get_system_io(), 0, 64, | |
589 | TYPE_PCI_BUS); | |
8cba80c3 FB |
590 | pci_setup_iommu(b, s390_pci_dma_iommu, s); |
591 | ||
592 | bus = BUS(b); | |
593 | qbus_set_hotplug_handler(bus, DEVICE(dev), NULL); | |
594 | phb->bus = b; | |
90a0f9af YMZ |
595 | |
596 | s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, DEVICE(s), NULL)); | |
af9ed379 | 597 | qbus_set_hotplug_handler(BUS(s->bus), DEVICE(s), NULL); |
90a0f9af | 598 | |
03805be0 YMZ |
599 | s->iommu_table = g_hash_table_new_full(g_int64_hash, g_int64_equal, |
600 | NULL, g_free); | |
8cba80c3 FB |
601 | QTAILQ_INIT(&s->pending_sei); |
602 | return 0; | |
603 | } | |
604 | ||
8f955950 | 605 | static int s390_pci_setup_msix(S390PCIBusDevice *pbdev) |
8cba80c3 FB |
606 | { |
607 | uint8_t pos; | |
608 | uint16_t ctrl; | |
609 | uint32_t table, pba; | |
610 | ||
611 | pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX); | |
612 | if (!pos) { | |
613 | pbdev->msix.available = false; | |
614 | return 0; | |
615 | } | |
616 | ||
ce1307e1 | 617 | ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS, |
8cba80c3 FB |
618 | pci_config_size(pbdev->pdev), sizeof(ctrl)); |
619 | table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE, | |
620 | pci_config_size(pbdev->pdev), sizeof(table)); | |
621 | pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA, | |
622 | pci_config_size(pbdev->pdev), sizeof(pba)); | |
623 | ||
624 | pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK; | |
625 | pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK; | |
626 | pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK; | |
627 | pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK; | |
628 | pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1; | |
629 | pbdev->msix.available = true; | |
630 | return 0; | |
631 | } | |
632 | ||
8f955950 YMZ |
633 | static void s390_pci_msix_init(S390PCIBusDevice *pbdev) |
634 | { | |
635 | char *name; | |
636 | ||
637 | name = g_strdup_printf("msix-s390-%04x", pbdev->uid); | |
638 | ||
639 | memory_region_init_io(&pbdev->msix_notify_mr, OBJECT(pbdev), | |
640 | &s390_msi_ctrl_ops, pbdev, name, PAGE_SIZE); | |
641 | memory_region_add_subregion(&pbdev->iommu->mr, ZPCI_MSI_ADDR, | |
642 | &pbdev->msix_notify_mr); | |
643 | ||
644 | g_free(name); | |
645 | } | |
646 | ||
647 | static void s390_pci_msix_free(S390PCIBusDevice *pbdev) | |
648 | { | |
649 | memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr); | |
650 | object_unparent(OBJECT(&pbdev->msix_notify_mr)); | |
651 | } | |
652 | ||
3e5cfba3 YMZ |
653 | static S390PCIBusDevice *s390_pci_device_new(const char *target) |
654 | { | |
655 | DeviceState *dev = NULL; | |
656 | S390pciState *s = s390_get_phb(); | |
657 | ||
658 | dev = qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE); | |
659 | if (!dev) { | |
660 | return NULL; | |
661 | } | |
662 | ||
663 | qdev_prop_set_string(dev, "target", target); | |
664 | qdev_init_nofail(dev); | |
665 | ||
666 | return S390_PCI_DEVICE(dev); | |
667 | } | |
668 | ||
8cba80c3 FB |
669 | static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev, |
670 | DeviceState *dev, Error **errp) | |
671 | { | |
af9ed379 YMZ |
672 | PCIDevice *pdev = NULL; |
673 | S390PCIBusDevice *pbdev = NULL; | |
674 | S390pciState *s = s390_get_phb(); | |
3e5cfba3 | 675 | |
af9ed379 YMZ |
676 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { |
677 | pdev = PCI_DEVICE(dev); | |
678 | ||
679 | if (!dev->id) { | |
680 | /* In the case the PCI device does not define an id */ | |
681 | /* we generate one based on the PCI address */ | |
682 | dev->id = g_strdup_printf("auto_%02x:%02x.%01x", | |
683 | pci_bus_num(pdev->bus), | |
684 | PCI_SLOT(pdev->devfn), | |
685 | PCI_FUNC(pdev->devfn)); | |
686 | } | |
687 | ||
688 | pbdev = s390_pci_find_dev_by_target(dev->id); | |
3e5cfba3 | 689 | if (!pbdev) { |
af9ed379 YMZ |
690 | pbdev = s390_pci_device_new(dev->id); |
691 | if (!pbdev) { | |
692 | error_setg(errp, "create zpci device failed"); | |
0d36d791 | 693 | return; |
af9ed379 | 694 | } |
3e5cfba3 | 695 | } |
8cba80c3 | 696 | |
af9ed379 YMZ |
697 | if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) { |
698 | pbdev->fh |= FH_SHM_VFIO; | |
699 | } else { | |
700 | pbdev->fh |= FH_SHM_EMUL; | |
701 | } | |
8cba80c3 | 702 | |
af9ed379 | 703 | pbdev->pdev = pdev; |
03805be0 | 704 | pbdev->iommu = s390_pci_get_iommu(s, pdev->bus, pdev->devfn); |
de91ea92 | 705 | pbdev->iommu->pbdev = pbdev; |
af9ed379 | 706 | pbdev->state = ZPCI_FS_STANDBY; |
8f955950 YMZ |
707 | |
708 | s390_pci_msix_init(pbdev); | |
709 | s390_pci_setup_msix(pbdev); | |
8cba80c3 | 710 | |
af9ed379 YMZ |
711 | if (dev->hotplugged) { |
712 | s390_pci_generate_plug_event(HP_EVENT_RESERVED_TO_STANDBY, | |
713 | pbdev->fh, pbdev->fid); | |
714 | } | |
715 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { | |
716 | int idx; | |
717 | ||
718 | pbdev = S390_PCI_DEVICE(dev); | |
719 | for (idx = 0; idx < PCI_SLOT_MAX; idx++) { | |
720 | if (!s->pbdev[idx]) { | |
721 | s->pbdev[idx] = pbdev; | |
722 | pbdev->fh = idx; | |
723 | return; | |
724 | } | |
725 | } | |
726 | ||
727 | error_setg(errp, "no slot for plugging zpci device"); | |
8cba80c3 | 728 | } |
8cba80c3 FB |
729 | } |
730 | ||
93d16d81 YMZ |
731 | static void s390_pcihost_timer_cb(void *opaque) |
732 | { | |
733 | S390PCIBusDevice *pbdev = opaque; | |
734 | ||
735 | if (pbdev->summary_ind) { | |
736 | pci_dereg_irqs(pbdev); | |
737 | } | |
de91ea92 YMZ |
738 | if (pbdev->iommu->enabled) { |
739 | pci_dereg_ioat(pbdev->iommu); | |
93d16d81 YMZ |
740 | } |
741 | ||
742 | pbdev->state = ZPCI_FS_STANDBY; | |
743 | s390_pci_generate_plug_event(HP_EVENT_CONFIGURED_TO_STBRES, | |
744 | pbdev->fh, pbdev->fid); | |
745 | qdev_unplug(DEVICE(pbdev), NULL); | |
746 | } | |
747 | ||
8cba80c3 FB |
748 | static void s390_pcihost_hot_unplug(HotplugHandler *hotplug_dev, |
749 | DeviceState *dev, Error **errp) | |
750 | { | |
af9ed379 | 751 | PCIDevice *pci_dev = NULL; |
03805be0 YMZ |
752 | PCIBus *bus; |
753 | int32_t devfn, i; | |
af9ed379 YMZ |
754 | S390PCIBusDevice *pbdev = NULL; |
755 | S390pciState *s = s390_get_phb(); | |
756 | ||
757 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { | |
758 | pci_dev = PCI_DEVICE(dev); | |
759 | ||
760 | for (i = 0 ; i < PCI_SLOT_MAX; i++) { | |
7fc0abf4 | 761 | if (s->pbdev[i] && s->pbdev[i]->pdev == pci_dev) { |
af9ed379 YMZ |
762 | pbdev = s->pbdev[i]; |
763 | break; | |
764 | } | |
765 | } | |
0c2a16a4 | 766 | assert(pbdev != NULL); |
af9ed379 YMZ |
767 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { |
768 | pbdev = S390_PCI_DEVICE(dev); | |
769 | pci_dev = pbdev->pdev; | |
770 | } | |
8cba80c3 | 771 | |
5d1abf23 YMZ |
772 | switch (pbdev->state) { |
773 | case ZPCI_FS_RESERVED: | |
774 | goto out; | |
775 | case ZPCI_FS_STANDBY: | |
776 | break; | |
777 | default: | |
93d16d81 | 778 | s390_pci_generate_plug_event(HP_EVENT_DECONFIGURE_REQUEST, |
8cba80c3 | 779 | pbdev->fh, pbdev->fid); |
93d16d81 YMZ |
780 | pbdev->release_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, |
781 | s390_pcihost_timer_cb, | |
782 | pbdev); | |
783 | timer_mod(pbdev->release_timer, | |
784 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + HOT_UNPLUG_TIMEOUT); | |
785 | return; | |
786 | } | |
787 | ||
788 | if (pbdev->release_timer && timer_pending(pbdev->release_timer)) { | |
789 | timer_del(pbdev->release_timer); | |
790 | timer_free(pbdev->release_timer); | |
791 | pbdev->release_timer = NULL; | |
8cba80c3 FB |
792 | } |
793 | ||
794 | s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED, | |
795 | pbdev->fh, pbdev->fid); | |
03805be0 YMZ |
796 | bus = pci_dev->bus; |
797 | devfn = pci_dev->devfn; | |
af9ed379 | 798 | object_unparent(OBJECT(pci_dev)); |
8f955950 | 799 | s390_pci_msix_free(pbdev); |
03805be0 | 800 | s390_pci_iommu_free(bus, devfn); |
8cba80c3 | 801 | pbdev->pdev = NULL; |
5d1abf23 YMZ |
802 | pbdev->state = ZPCI_FS_RESERVED; |
803 | out: | |
af9ed379 YMZ |
804 | pbdev->fid = 0; |
805 | s->pbdev[pbdev->fh & FH_MASK_INDEX] = NULL; | |
806 | object_unparent(OBJECT(pbdev)); | |
8cba80c3 FB |
807 | } |
808 | ||
809 | static void s390_pcihost_class_init(ObjectClass *klass, void *data) | |
810 | { | |
811 | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); | |
812 | DeviceClass *dc = DEVICE_CLASS(klass); | |
813 | HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); | |
814 | ||
815 | dc->cannot_instantiate_with_device_add_yet = true; | |
816 | k->init = s390_pcihost_init; | |
817 | hc->plug = s390_pcihost_hot_plug; | |
818 | hc->unplug = s390_pcihost_hot_unplug; | |
226419d6 | 819 | msi_nonbroken = true; |
8cba80c3 FB |
820 | } |
821 | ||
822 | static const TypeInfo s390_pcihost_info = { | |
823 | .name = TYPE_S390_PCI_HOST_BRIDGE, | |
824 | .parent = TYPE_PCI_HOST_BRIDGE, | |
825 | .instance_size = sizeof(S390pciState), | |
826 | .class_init = s390_pcihost_class_init, | |
827 | .interfaces = (InterfaceInfo[]) { | |
828 | { TYPE_HOTPLUG_HANDLER }, | |
829 | { } | |
830 | } | |
831 | }; | |
832 | ||
90a0f9af YMZ |
833 | static const TypeInfo s390_pcibus_info = { |
834 | .name = TYPE_S390_PCI_BUS, | |
835 | .parent = TYPE_BUS, | |
836 | .instance_size = sizeof(S390PCIBus), | |
837 | }; | |
838 | ||
3e5cfba3 YMZ |
839 | static uint16_t s390_pci_generate_uid(void) |
840 | { | |
841 | uint16_t uid = 0; | |
842 | ||
843 | do { | |
844 | uid++; | |
845 | if (!s390_pci_find_dev_by_uid(uid)) { | |
846 | return uid; | |
847 | } | |
848 | } while (uid < ZPCI_MAX_UID); | |
849 | ||
850 | return UID_UNDEFINED; | |
851 | } | |
852 | ||
853 | static uint32_t s390_pci_generate_fid(Error **errp) | |
854 | { | |
855 | uint32_t fid = 0; | |
856 | ||
35b6e94b | 857 | do { |
3e5cfba3 YMZ |
858 | if (!s390_pci_find_dev_by_fid(fid)) { |
859 | return fid; | |
860 | } | |
35b6e94b | 861 | } while (fid++ != ZPCI_MAX_FID); |
3e5cfba3 YMZ |
862 | |
863 | error_setg(errp, "no free fid could be found"); | |
864 | return 0; | |
865 | } | |
866 | ||
867 | static void s390_pci_device_realize(DeviceState *dev, Error **errp) | |
868 | { | |
869 | S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev); | |
870 | ||
871 | if (!zpci->target) { | |
872 | error_setg(errp, "target must be defined"); | |
873 | return; | |
874 | } | |
875 | ||
876 | if (s390_pci_find_dev_by_target(zpci->target)) { | |
877 | error_setg(errp, "target %s already has an associated zpci device", | |
878 | zpci->target); | |
879 | return; | |
880 | } | |
881 | ||
882 | if (zpci->uid == UID_UNDEFINED) { | |
883 | zpci->uid = s390_pci_generate_uid(); | |
884 | if (!zpci->uid) { | |
885 | error_setg(errp, "no free uid could be found"); | |
886 | return; | |
887 | } | |
888 | } else if (s390_pci_find_dev_by_uid(zpci->uid)) { | |
889 | error_setg(errp, "uid %u already in use", zpci->uid); | |
890 | return; | |
891 | } | |
892 | ||
893 | if (!zpci->fid_defined) { | |
894 | Error *local_error = NULL; | |
895 | ||
896 | zpci->fid = s390_pci_generate_fid(&local_error); | |
897 | if (local_error) { | |
898 | error_propagate(errp, local_error); | |
899 | return; | |
900 | } | |
901 | } else if (s390_pci_find_dev_by_fid(zpci->fid)) { | |
902 | error_setg(errp, "fid %u already in use", zpci->fid); | |
903 | return; | |
904 | } | |
905 | ||
906 | zpci->state = ZPCI_FS_RESERVED; | |
907 | } | |
908 | ||
909 | static void s390_pci_device_reset(DeviceState *dev) | |
910 | { | |
911 | S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev); | |
912 | ||
913 | switch (pbdev->state) { | |
914 | case ZPCI_FS_RESERVED: | |
915 | return; | |
916 | case ZPCI_FS_STANDBY: | |
917 | break; | |
918 | default: | |
919 | pbdev->fh &= ~FH_MASK_ENABLE; | |
920 | pbdev->state = ZPCI_FS_DISABLED; | |
921 | break; | |
922 | } | |
923 | ||
924 | if (pbdev->summary_ind) { | |
925 | pci_dereg_irqs(pbdev); | |
926 | } | |
de91ea92 YMZ |
927 | if (pbdev->iommu->enabled) { |
928 | pci_dereg_ioat(pbdev->iommu); | |
3e5cfba3 YMZ |
929 | } |
930 | ||
931 | pbdev->fmb_addr = 0; | |
932 | } | |
933 | ||
934 | static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name, | |
935 | void *opaque, Error **errp) | |
936 | { | |
937 | Property *prop = opaque; | |
938 | uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop); | |
939 | ||
940 | visit_type_uint32(v, name, ptr, errp); | |
941 | } | |
942 | ||
943 | static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name, | |
944 | void *opaque, Error **errp) | |
945 | { | |
946 | DeviceState *dev = DEVICE(obj); | |
947 | S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj); | |
948 | Property *prop = opaque; | |
949 | uint32_t *ptr = qdev_get_prop_ptr(dev, prop); | |
950 | ||
951 | if (dev->realized) { | |
952 | qdev_prop_set_after_realize(dev, name, errp); | |
953 | return; | |
954 | } | |
955 | ||
956 | visit_type_uint32(v, name, ptr, errp); | |
957 | zpci->fid_defined = true; | |
958 | } | |
959 | ||
960 | static PropertyInfo s390_pci_fid_propinfo = { | |
961 | .name = "zpci_fid", | |
962 | .get = s390_pci_get_fid, | |
963 | .set = s390_pci_set_fid, | |
964 | }; | |
965 | ||
966 | #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \ | |
967 | DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t) | |
968 | ||
969 | static Property s390_pci_device_properties[] = { | |
970 | DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED), | |
971 | DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid), | |
972 | DEFINE_PROP_STRING("target", S390PCIBusDevice, target), | |
973 | DEFINE_PROP_END_OF_LIST(), | |
974 | }; | |
975 | ||
976 | static void s390_pci_device_class_init(ObjectClass *klass, void *data) | |
977 | { | |
978 | DeviceClass *dc = DEVICE_CLASS(klass); | |
979 | ||
980 | dc->desc = "zpci device"; | |
981 | dc->reset = s390_pci_device_reset; | |
982 | dc->bus_type = TYPE_S390_PCI_BUS; | |
983 | dc->realize = s390_pci_device_realize; | |
984 | dc->props = s390_pci_device_properties; | |
985 | } | |
986 | ||
987 | static const TypeInfo s390_pci_device_info = { | |
988 | .name = TYPE_S390_PCI_DEVICE, | |
989 | .parent = TYPE_DEVICE, | |
990 | .instance_size = sizeof(S390PCIBusDevice), | |
991 | .class_init = s390_pci_device_class_init, | |
992 | }; | |
993 | ||
de91ea92 YMZ |
994 | static TypeInfo s390_pci_iommu_info = { |
995 | .name = TYPE_S390_PCI_IOMMU, | |
996 | .parent = TYPE_OBJECT, | |
997 | .instance_size = sizeof(S390PCIIOMMU), | |
998 | }; | |
999 | ||
8cba80c3 FB |
1000 | static void s390_pci_register_types(void) |
1001 | { | |
1002 | type_register_static(&s390_pcihost_info); | |
90a0f9af | 1003 | type_register_static(&s390_pcibus_info); |
3e5cfba3 | 1004 | type_register_static(&s390_pci_device_info); |
de91ea92 | 1005 | type_register_static(&s390_pci_iommu_info); |
8cba80c3 FB |
1006 | } |
1007 | ||
1008 | type_init(s390_pci_register_types) |