]>
Commit | Line | Data |
---|---|---|
8cba80c3 FB |
1 | /* |
2 | * s390 PCI BUS | |
3 | * | |
4 | * Copyright 2014 IBM Corp. | |
5 | * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com> | |
6 | * Hong Bo Li <lihbbj@cn.ibm.com> | |
7 | * Yi Min Zhao <zyimin@cn.ibm.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or (at | |
10 | * your option) any later version. See the COPYING file in the top-level | |
11 | * directory. | |
12 | */ | |
13 | ||
9615495a | 14 | #include "qemu/osdep.h" |
3e5cfba3 YMZ |
15 | #include "qapi/error.h" |
16 | #include "qapi/visitor.h" | |
4771d756 PB |
17 | #include "qemu-common.h" |
18 | #include "cpu.h" | |
8cba80c3 | 19 | #include "s390-pci-bus.h" |
259a4f0a | 20 | #include "s390-pci-inst.h" |
8cba80c3 FB |
21 | #include <hw/pci/pci_bus.h> |
22 | #include <hw/pci/msi.h> | |
23 | #include <qemu/error-report.h> | |
24 | ||
25 | /* #define DEBUG_S390PCI_BUS */ | |
26 | #ifdef DEBUG_S390PCI_BUS | |
27 | #define DPRINTF(fmt, ...) \ | |
28 | do { fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); } while (0) | |
29 | #else | |
30 | #define DPRINTF(fmt, ...) \ | |
31 | do { } while (0) | |
32 | #endif | |
33 | ||
e7d33695 YMZ |
34 | static S390pciState *s390_get_phb(void) |
35 | { | |
36 | static S390pciState *phb; | |
37 | ||
38 | if (!phb) { | |
39 | phb = S390_PCI_HOST_BRIDGE( | |
40 | object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL)); | |
41 | assert(phb != NULL); | |
42 | } | |
43 | ||
44 | return phb; | |
45 | } | |
46 | ||
8cba80c3 FB |
47 | int chsc_sei_nt2_get_event(void *res) |
48 | { | |
49 | ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res; | |
50 | PciCcdfAvail *accdf; | |
51 | PciCcdfErr *eccdf; | |
52 | int rc = 1; | |
53 | SeiContainer *sei_cont; | |
e7d33695 | 54 | S390pciState *s = s390_get_phb(); |
8cba80c3 FB |
55 | |
56 | sei_cont = QTAILQ_FIRST(&s->pending_sei); | |
57 | if (sei_cont) { | |
58 | QTAILQ_REMOVE(&s->pending_sei, sei_cont, link); | |
59 | nt2_res->nt = 2; | |
60 | nt2_res->cc = sei_cont->cc; | |
d3321fc7 | 61 | nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res)); |
8cba80c3 FB |
62 | switch (sei_cont->cc) { |
63 | case 1: /* error event */ | |
64 | eccdf = (PciCcdfErr *)nt2_res->ccdf; | |
65 | eccdf->fid = cpu_to_be32(sei_cont->fid); | |
66 | eccdf->fh = cpu_to_be32(sei_cont->fh); | |
67 | eccdf->e = cpu_to_be32(sei_cont->e); | |
68 | eccdf->faddr = cpu_to_be64(sei_cont->faddr); | |
69 | eccdf->pec = cpu_to_be16(sei_cont->pec); | |
70 | break; | |
71 | case 2: /* availability event */ | |
72 | accdf = (PciCcdfAvail *)nt2_res->ccdf; | |
73 | accdf->fid = cpu_to_be32(sei_cont->fid); | |
74 | accdf->fh = cpu_to_be32(sei_cont->fh); | |
75 | accdf->pec = cpu_to_be16(sei_cont->pec); | |
76 | break; | |
77 | default: | |
78 | abort(); | |
79 | } | |
80 | g_free(sei_cont); | |
81 | rc = 0; | |
82 | } | |
83 | ||
84 | return rc; | |
85 | } | |
86 | ||
87 | int chsc_sei_nt2_have_event(void) | |
88 | { | |
e7d33695 | 89 | S390pciState *s = s390_get_phb(); |
8cba80c3 FB |
90 | |
91 | return !QTAILQ_EMPTY(&s->pending_sei); | |
92 | } | |
93 | ||
94 | S390PCIBusDevice *s390_pci_find_dev_by_fid(uint32_t fid) | |
95 | { | |
96 | S390PCIBusDevice *pbdev; | |
97 | int i; | |
e7d33695 | 98 | S390pciState *s = s390_get_phb(); |
8cba80c3 FB |
99 | |
100 | for (i = 0; i < PCI_SLOT_MAX; i++) { | |
3e5cfba3 YMZ |
101 | pbdev = s->pbdev[i]; |
102 | if (pbdev && pbdev->fid == fid) { | |
8cba80c3 FB |
103 | return pbdev; |
104 | } | |
105 | } | |
106 | ||
107 | return NULL; | |
108 | } | |
109 | ||
8f5cb693 | 110 | void s390_pci_sclp_configure(SCCB *sccb) |
8cba80c3 FB |
111 | { |
112 | PciCfgSccb *psccb = (PciCfgSccb *)sccb; | |
113 | S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(be32_to_cpu(psccb->aid)); | |
114 | uint16_t rc; | |
115 | ||
3b40ea29 YMZ |
116 | if (be16_to_cpu(sccb->h.length) < 16) { |
117 | rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH; | |
118 | goto out; | |
119 | } | |
120 | ||
5d1abf23 | 121 | if (!pbdev) { |
8f5cb693 YMZ |
122 | DPRINTF("sclp config no dev found\n"); |
123 | rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; | |
5d1abf23 YMZ |
124 | goto out; |
125 | } | |
126 | ||
127 | switch (pbdev->state) { | |
128 | case ZPCI_FS_RESERVED: | |
129 | rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; | |
130 | break; | |
131 | case ZPCI_FS_STANDBY: | |
132 | pbdev->state = ZPCI_FS_DISABLED; | |
133 | rc = SCLP_RC_NORMAL_COMPLETION; | |
134 | break; | |
135 | default: | |
136 | rc = SCLP_RC_NO_ACTION_REQUIRED; | |
8f5cb693 | 137 | } |
3b40ea29 | 138 | out: |
8f5cb693 YMZ |
139 | psccb->header.response_code = cpu_to_be16(rc); |
140 | } | |
141 | ||
142 | void s390_pci_sclp_deconfigure(SCCB *sccb) | |
143 | { | |
144 | PciCfgSccb *psccb = (PciCfgSccb *)sccb; | |
145 | S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(be32_to_cpu(psccb->aid)); | |
146 | uint16_t rc; | |
147 | ||
3b40ea29 YMZ |
148 | if (be16_to_cpu(sccb->h.length) < 16) { |
149 | rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH; | |
150 | goto out; | |
151 | } | |
152 | ||
5d1abf23 | 153 | if (!pbdev) { |
8f5cb693 | 154 | DPRINTF("sclp deconfig no dev found\n"); |
8cba80c3 | 155 | rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; |
5d1abf23 YMZ |
156 | goto out; |
157 | } | |
158 | ||
159 | switch (pbdev->state) { | |
160 | case ZPCI_FS_RESERVED: | |
161 | rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; | |
162 | break; | |
163 | case ZPCI_FS_STANDBY: | |
164 | rc = SCLP_RC_NO_ACTION_REQUIRED; | |
165 | break; | |
166 | default: | |
167 | if (pbdev->summary_ind) { | |
168 | pci_dereg_irqs(pbdev); | |
169 | } | |
170 | if (pbdev->iommu_enabled) { | |
171 | pci_dereg_ioat(pbdev); | |
172 | } | |
173 | pbdev->state = ZPCI_FS_STANDBY; | |
174 | rc = SCLP_RC_NORMAL_COMPLETION; | |
8cba80c3 | 175 | } |
3b40ea29 | 176 | out: |
8cba80c3 | 177 | psccb->header.response_code = cpu_to_be16(rc); |
8cba80c3 FB |
178 | } |
179 | ||
180 | static uint32_t s390_pci_get_pfid(PCIDevice *pdev) | |
181 | { | |
182 | return PCI_SLOT(pdev->devfn); | |
183 | } | |
184 | ||
185 | static uint32_t s390_pci_get_pfh(PCIDevice *pdev) | |
186 | { | |
c188e303 | 187 | return PCI_SLOT(pdev->devfn) | FH_SHM_VFIO; |
8cba80c3 FB |
188 | } |
189 | ||
3e5cfba3 YMZ |
190 | static S390PCIBusDevice *s390_pci_find_dev_by_uid(uint16_t uid) |
191 | { | |
192 | int i; | |
193 | S390PCIBusDevice *pbdev; | |
194 | S390pciState *s = s390_get_phb(); | |
195 | ||
196 | for (i = 0; i < PCI_SLOT_MAX; i++) { | |
197 | pbdev = s->pbdev[i]; | |
198 | if (!pbdev) { | |
199 | continue; | |
200 | } | |
201 | ||
202 | if (pbdev->uid == uid) { | |
203 | return pbdev; | |
204 | } | |
205 | } | |
206 | ||
207 | return NULL; | |
208 | } | |
209 | ||
210 | static S390PCIBusDevice *s390_pci_find_dev_by_target(const char *target) | |
211 | { | |
212 | int i; | |
213 | S390PCIBusDevice *pbdev; | |
214 | S390pciState *s = s390_get_phb(); | |
215 | ||
216 | if (!target) { | |
217 | return NULL; | |
218 | } | |
219 | ||
220 | for (i = 0; i < PCI_SLOT_MAX; i++) { | |
221 | pbdev = s->pbdev[i]; | |
222 | if (!pbdev) { | |
223 | continue; | |
224 | } | |
225 | ||
226 | if (!strcmp(pbdev->target, target)) { | |
227 | return pbdev; | |
228 | } | |
229 | } | |
230 | ||
231 | return NULL; | |
232 | } | |
233 | ||
8cba80c3 FB |
234 | S390PCIBusDevice *s390_pci_find_dev_by_idx(uint32_t idx) |
235 | { | |
236 | S390PCIBusDevice *pbdev; | |
237 | int i; | |
238 | int j = 0; | |
e7d33695 | 239 | S390pciState *s = s390_get_phb(); |
8cba80c3 FB |
240 | |
241 | for (i = 0; i < PCI_SLOT_MAX; i++) { | |
3e5cfba3 YMZ |
242 | pbdev = s->pbdev[i]; |
243 | if (!pbdev) { | |
244 | continue; | |
245 | } | |
8cba80c3 | 246 | |
5d1abf23 | 247 | if (pbdev->state == ZPCI_FS_RESERVED) { |
8cba80c3 FB |
248 | continue; |
249 | } | |
250 | ||
251 | if (j == idx) { | |
252 | return pbdev; | |
253 | } | |
254 | j++; | |
255 | } | |
256 | ||
257 | return NULL; | |
258 | } | |
259 | ||
260 | S390PCIBusDevice *s390_pci_find_dev_by_fh(uint32_t fh) | |
261 | { | |
e7d33695 | 262 | S390pciState *s = s390_get_phb(); |
06a96dae | 263 | S390PCIBusDevice *pbdev; |
8cba80c3 | 264 | |
3e5cfba3 YMZ |
265 | pbdev = s->pbdev[fh & FH_MASK_INDEX]; |
266 | if (pbdev && pbdev->fh == fh) { | |
06a96dae | 267 | return pbdev; |
8cba80c3 FB |
268 | } |
269 | ||
270 | return NULL; | |
271 | } | |
272 | ||
273 | static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh, | |
274 | uint32_t fid, uint64_t faddr, uint32_t e) | |
275 | { | |
b7022d9a | 276 | SeiContainer *sei_cont; |
e7d33695 | 277 | S390pciState *s = s390_get_phb(); |
8cba80c3 | 278 | |
b7022d9a | 279 | sei_cont = g_malloc0(sizeof(SeiContainer)); |
8cba80c3 FB |
280 | sei_cont->fh = fh; |
281 | sei_cont->fid = fid; | |
282 | sei_cont->cc = cc; | |
283 | sei_cont->pec = pec; | |
284 | sei_cont->faddr = faddr; | |
285 | sei_cont->e = e; | |
286 | ||
287 | QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link); | |
288 | css_generate_css_crws(0); | |
289 | } | |
290 | ||
291 | static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh, | |
292 | uint32_t fid) | |
293 | { | |
294 | s390_pci_generate_event(2, pec, fh, fid, 0, 0); | |
295 | } | |
296 | ||
5d1abf23 YMZ |
297 | void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid, |
298 | uint64_t faddr, uint32_t e) | |
8cba80c3 FB |
299 | { |
300 | s390_pci_generate_event(1, pec, fh, fid, faddr, e); | |
301 | } | |
302 | ||
303 | static void s390_pci_set_irq(void *opaque, int irq, int level) | |
304 | { | |
305 | /* nothing to do */ | |
306 | } | |
307 | ||
308 | static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num) | |
309 | { | |
310 | /* nothing to do */ | |
311 | return 0; | |
312 | } | |
313 | ||
314 | static uint64_t s390_pci_get_table_origin(uint64_t iota) | |
315 | { | |
316 | return iota & ~ZPCI_IOTA_RTTO_FLAG; | |
317 | } | |
318 | ||
319 | static unsigned int calc_rtx(dma_addr_t ptr) | |
320 | { | |
321 | return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK; | |
322 | } | |
323 | ||
324 | static unsigned int calc_sx(dma_addr_t ptr) | |
325 | { | |
326 | return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK; | |
327 | } | |
328 | ||
329 | static unsigned int calc_px(dma_addr_t ptr) | |
330 | { | |
331 | return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK; | |
332 | } | |
333 | ||
334 | static uint64_t get_rt_sto(uint64_t entry) | |
335 | { | |
336 | return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX) | |
337 | ? (entry & ZPCI_RTE_ADDR_MASK) | |
338 | : 0; | |
339 | } | |
340 | ||
341 | static uint64_t get_st_pto(uint64_t entry) | |
342 | { | |
343 | return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX) | |
344 | ? (entry & ZPCI_STE_ADDR_MASK) | |
345 | : 0; | |
346 | } | |
347 | ||
348 | static uint64_t s390_guest_io_table_walk(uint64_t guest_iota, | |
349 | uint64_t guest_dma_address) | |
350 | { | |
351 | uint64_t sto_a, pto_a, px_a; | |
352 | uint64_t sto, pto, pte; | |
353 | uint32_t rtx, sx, px; | |
354 | ||
355 | rtx = calc_rtx(guest_dma_address); | |
356 | sx = calc_sx(guest_dma_address); | |
357 | px = calc_px(guest_dma_address); | |
358 | ||
359 | sto_a = guest_iota + rtx * sizeof(uint64_t); | |
42874d3a PM |
360 | sto = address_space_ldq(&address_space_memory, sto_a, |
361 | MEMTXATTRS_UNSPECIFIED, NULL); | |
8cba80c3 FB |
362 | sto = get_rt_sto(sto); |
363 | if (!sto) { | |
364 | pte = 0; | |
365 | goto out; | |
366 | } | |
367 | ||
368 | pto_a = sto + sx * sizeof(uint64_t); | |
42874d3a PM |
369 | pto = address_space_ldq(&address_space_memory, pto_a, |
370 | MEMTXATTRS_UNSPECIFIED, NULL); | |
8cba80c3 FB |
371 | pto = get_st_pto(pto); |
372 | if (!pto) { | |
373 | pte = 0; | |
374 | goto out; | |
375 | } | |
376 | ||
377 | px_a = pto + px * sizeof(uint64_t); | |
42874d3a PM |
378 | pte = address_space_ldq(&address_space_memory, px_a, |
379 | MEMTXATTRS_UNSPECIFIED, NULL); | |
8cba80c3 FB |
380 | |
381 | out: | |
382 | return pte; | |
383 | } | |
384 | ||
385 | static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *iommu, hwaddr addr, | |
386 | bool is_write) | |
387 | { | |
388 | uint64_t pte; | |
389 | uint32_t flags; | |
f0a399db | 390 | S390PCIBusDevice *pbdev = container_of(iommu, S390PCIBusDevice, iommu_mr); |
dce1b089 | 391 | S390pciState *s; |
8cba80c3 FB |
392 | IOMMUTLBEntry ret = { |
393 | .target_as = &address_space_memory, | |
394 | .iova = 0, | |
395 | .translated_addr = 0, | |
396 | .addr_mask = ~(hwaddr)0, | |
397 | .perm = IOMMU_NONE, | |
398 | }; | |
399 | ||
5d1abf23 YMZ |
400 | switch (pbdev->state) { |
401 | case ZPCI_FS_ENABLED: | |
402 | case ZPCI_FS_BLOCKED: | |
403 | if (!pbdev->iommu_enabled) { | |
404 | return ret; | |
405 | } | |
406 | break; | |
407 | default: | |
dce1b089 YMZ |
408 | return ret; |
409 | } | |
410 | ||
8cba80c3 FB |
411 | DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr); |
412 | ||
dce1b089 | 413 | s = S390_PCI_HOST_BRIDGE(pci_device_root_bus(pbdev->pdev)->qbus.parent); |
8cba80c3 FB |
414 | /* s390 does not have an APIC mapped to main storage so we use |
415 | * a separate AddressSpace only for msix notifications | |
416 | */ | |
417 | if (addr == ZPCI_MSI_ADDR) { | |
418 | ret.target_as = &s->msix_notify_as; | |
419 | ret.iova = addr; | |
420 | ret.translated_addr = addr; | |
421 | ret.addr_mask = 0xfff; | |
422 | ret.perm = IOMMU_RW; | |
423 | return ret; | |
424 | } | |
425 | ||
8cba80c3 | 426 | if (addr < pbdev->pba || addr > pbdev->pal) { |
8cba80c3 FB |
427 | return ret; |
428 | } | |
429 | ||
430 | pte = s390_guest_io_table_walk(s390_pci_get_table_origin(pbdev->g_iota), | |
431 | addr); | |
8cba80c3 | 432 | if (!pte) { |
8cba80c3 FB |
433 | return ret; |
434 | } | |
435 | ||
436 | flags = pte & ZPCI_PTE_FLAG_MASK; | |
437 | ret.iova = addr; | |
438 | ret.translated_addr = pte & ZPCI_PTE_ADDR_MASK; | |
439 | ret.addr_mask = 0xfff; | |
440 | ||
441 | if (flags & ZPCI_PTE_INVALID) { | |
442 | ret.perm = IOMMU_NONE; | |
443 | } else { | |
444 | ret.perm = IOMMU_RW; | |
445 | } | |
446 | ||
447 | return ret; | |
448 | } | |
449 | ||
450 | static const MemoryRegionIOMMUOps s390_iommu_ops = { | |
451 | .translate = s390_translate_iommu, | |
452 | }; | |
453 | ||
454 | static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn) | |
455 | { | |
456 | S390pciState *s = opaque; | |
457 | ||
67d5cd97 | 458 | return &s->iommu[PCI_SLOT(devfn)]->as; |
8cba80c3 FB |
459 | } |
460 | ||
461 | static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set) | |
462 | { | |
463 | uint8_t ind_old, ind_new; | |
464 | hwaddr len = 1; | |
465 | uint8_t *ind_addr; | |
466 | ||
467 | ind_addr = cpu_physical_memory_map(ind_loc, &len, 1); | |
468 | if (!ind_addr) { | |
469 | s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0); | |
470 | return -1; | |
471 | } | |
472 | do { | |
473 | ind_old = *ind_addr; | |
474 | ind_new = ind_old | to_be_set; | |
475 | } while (atomic_cmpxchg(ind_addr, ind_old, ind_new) != ind_old); | |
476 | cpu_physical_memory_unmap(ind_addr, len, 1, len); | |
477 | ||
478 | return ind_old; | |
479 | } | |
480 | ||
481 | static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data, | |
482 | unsigned int size) | |
483 | { | |
484 | S390PCIBusDevice *pbdev; | |
485 | uint32_t io_int_word; | |
486 | uint32_t fid = data >> ZPCI_MSI_VEC_BITS; | |
487 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; | |
488 | uint64_t ind_bit; | |
489 | uint32_t sum_bit; | |
490 | uint32_t e = 0; | |
491 | ||
492 | DPRINTF("write_msix data 0x%" PRIx64 " fid %d vec 0x%x\n", data, fid, vec); | |
493 | ||
494 | pbdev = s390_pci_find_dev_by_fid(fid); | |
495 | if (!pbdev) { | |
496 | e |= (vec << ERR_EVENT_MVN_OFFSET); | |
497 | s390_pci_generate_error_event(ERR_EVENT_NOMSI, 0, fid, addr, e); | |
498 | return; | |
499 | } | |
500 | ||
5d1abf23 | 501 | if (pbdev->state != ZPCI_FS_ENABLED) { |
3be5c207 YMZ |
502 | return; |
503 | } | |
504 | ||
8cba80c3 FB |
505 | ind_bit = pbdev->routes.adapter.ind_offset; |
506 | sum_bit = pbdev->routes.adapter.summary_offset; | |
507 | ||
508 | set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8, | |
509 | 0x80 >> ((ind_bit + vec) % 8)); | |
510 | if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8, | |
511 | 0x80 >> (sum_bit % 8))) { | |
512 | io_int_word = (pbdev->isc << 27) | IO_INT_WORD_AI; | |
513 | s390_io_interrupt(0, 0, 0, io_int_word); | |
514 | } | |
8cba80c3 FB |
515 | } |
516 | ||
517 | static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size) | |
518 | { | |
519 | return 0xffffffff; | |
520 | } | |
521 | ||
522 | static const MemoryRegionOps s390_msi_ctrl_ops = { | |
523 | .write = s390_msi_ctrl_write, | |
524 | .read = s390_msi_ctrl_read, | |
525 | .endianness = DEVICE_LITTLE_ENDIAN, | |
526 | }; | |
527 | ||
71583888 | 528 | void s390_pci_iommu_enable(S390PCIBusDevice *pbdev) |
f0a399db | 529 | { |
67d5cd97 | 530 | memory_region_init_iommu(&pbdev->iommu_mr, OBJECT(&pbdev->iommu->mr), |
f7c40aa1 | 531 | &s390_iommu_ops, "iommu-s390", pbdev->pal + 1); |
67d5cd97 | 532 | memory_region_add_subregion(&pbdev->iommu->mr, 0, &pbdev->iommu_mr); |
df6a050c | 533 | pbdev->iommu_enabled = true; |
71583888 | 534 | } |
f0a399db | 535 | |
71583888 YMZ |
536 | void s390_pci_iommu_disable(S390PCIBusDevice *pbdev) |
537 | { | |
67d5cd97 | 538 | memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->iommu_mr); |
71583888 | 539 | object_unparent(OBJECT(&pbdev->iommu_mr)); |
df6a050c | 540 | pbdev->iommu_enabled = false; |
f0a399db YMZ |
541 | } |
542 | ||
8cba80c3 FB |
543 | static void s390_pcihost_init_as(S390pciState *s) |
544 | { | |
545 | int i; | |
67d5cd97 | 546 | S390PCIIOMMU *iommu; |
8cba80c3 FB |
547 | |
548 | for (i = 0; i < PCI_SLOT_MAX; i++) { | |
67d5cd97 YMZ |
549 | iommu = g_malloc0(sizeof(S390PCIIOMMU)); |
550 | memory_region_init(&iommu->mr, OBJECT(s), | |
f0a399db | 551 | "iommu-root-s390", UINT64_MAX); |
67d5cd97 YMZ |
552 | address_space_init(&iommu->as, &iommu->mr, "iommu-pci"); |
553 | ||
554 | s->iommu[i] = iommu; | |
8cba80c3 FB |
555 | } |
556 | ||
557 | memory_region_init_io(&s->msix_notify_mr, OBJECT(s), | |
558 | &s390_msi_ctrl_ops, s, "msix-s390", UINT64_MAX); | |
559 | address_space_init(&s->msix_notify_as, &s->msix_notify_mr, "msix-pci"); | |
560 | } | |
561 | ||
562 | static int s390_pcihost_init(SysBusDevice *dev) | |
563 | { | |
564 | PCIBus *b; | |
565 | BusState *bus; | |
566 | PCIHostState *phb = PCI_HOST_BRIDGE(dev); | |
567 | S390pciState *s = S390_PCI_HOST_BRIDGE(dev); | |
568 | ||
569 | DPRINTF("host_init\n"); | |
570 | ||
571 | b = pci_register_bus(DEVICE(dev), NULL, | |
572 | s390_pci_set_irq, s390_pci_map_irq, NULL, | |
573 | get_system_memory(), get_system_io(), 0, 64, | |
574 | TYPE_PCI_BUS); | |
575 | s390_pcihost_init_as(s); | |
576 | pci_setup_iommu(b, s390_pci_dma_iommu, s); | |
577 | ||
578 | bus = BUS(b); | |
579 | qbus_set_hotplug_handler(bus, DEVICE(dev), NULL); | |
580 | phb->bus = b; | |
90a0f9af YMZ |
581 | |
582 | s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, DEVICE(s), NULL)); | |
583 | ||
8cba80c3 FB |
584 | QTAILQ_INIT(&s->pending_sei); |
585 | return 0; | |
586 | } | |
587 | ||
588 | static int s390_pcihost_setup_msix(S390PCIBusDevice *pbdev) | |
589 | { | |
590 | uint8_t pos; | |
591 | uint16_t ctrl; | |
592 | uint32_t table, pba; | |
593 | ||
594 | pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX); | |
595 | if (!pos) { | |
596 | pbdev->msix.available = false; | |
597 | return 0; | |
598 | } | |
599 | ||
ce1307e1 | 600 | ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS, |
8cba80c3 FB |
601 | pci_config_size(pbdev->pdev), sizeof(ctrl)); |
602 | table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE, | |
603 | pci_config_size(pbdev->pdev), sizeof(table)); | |
604 | pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA, | |
605 | pci_config_size(pbdev->pdev), sizeof(pba)); | |
606 | ||
607 | pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK; | |
608 | pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK; | |
609 | pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK; | |
610 | pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK; | |
611 | pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1; | |
612 | pbdev->msix.available = true; | |
613 | return 0; | |
614 | } | |
615 | ||
3e5cfba3 YMZ |
616 | static S390PCIBusDevice *s390_pci_device_new(const char *target) |
617 | { | |
618 | DeviceState *dev = NULL; | |
619 | S390pciState *s = s390_get_phb(); | |
620 | ||
621 | dev = qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE); | |
622 | if (!dev) { | |
623 | return NULL; | |
624 | } | |
625 | ||
626 | qdev_prop_set_string(dev, "target", target); | |
627 | qdev_init_nofail(dev); | |
628 | ||
629 | return S390_PCI_DEVICE(dev); | |
630 | } | |
631 | ||
8cba80c3 FB |
632 | static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev, |
633 | DeviceState *dev, Error **errp) | |
634 | { | |
635 | PCIDevice *pci_dev = PCI_DEVICE(dev); | |
636 | S390PCIBusDevice *pbdev; | |
637 | S390pciState *s = S390_PCI_HOST_BRIDGE(pci_device_root_bus(pci_dev) | |
638 | ->qbus.parent); | |
639 | ||
3e5cfba3 YMZ |
640 | if (!dev->id) { |
641 | /* In the case the PCI device does not define an id */ | |
642 | /* we generate one based on the PCI address */ | |
643 | dev->id = g_strdup_printf("auto_%02x:%02x.%01x", | |
644 | pci_bus_num(pci_dev->bus), | |
645 | PCI_SLOT(pci_dev->devfn), | |
646 | PCI_FUNC(pci_dev->devfn)); | |
647 | } | |
648 | ||
649 | pbdev = s390_pci_find_dev_by_target(dev->id); | |
650 | if (!pbdev) { | |
651 | pbdev = s390_pci_device_new(dev->id); | |
652 | if (!pbdev) { | |
653 | error_setg(errp, "create zpci device failed"); | |
654 | } | |
655 | } | |
8cba80c3 | 656 | |
3e5cfba3 | 657 | s->pbdev[PCI_SLOT(pci_dev->devfn)] = pbdev; |
8cba80c3 FB |
658 | pbdev->fid = s390_pci_get_pfid(pci_dev); |
659 | pbdev->pdev = pci_dev; | |
5d1abf23 | 660 | pbdev->state = ZPCI_FS_DISABLED; |
8cba80c3 | 661 | pbdev->fh = s390_pci_get_pfh(pci_dev); |
67d5cd97 | 662 | pbdev->iommu = s->iommu[PCI_SLOT(pci_dev->devfn)]; |
8cba80c3 FB |
663 | |
664 | s390_pcihost_setup_msix(pbdev); | |
665 | ||
666 | if (dev->hotplugged) { | |
667 | s390_pci_generate_plug_event(HP_EVENT_RESERVED_TO_STANDBY, | |
668 | pbdev->fh, pbdev->fid); | |
669 | s390_pci_generate_plug_event(HP_EVENT_TO_CONFIGURED, | |
670 | pbdev->fh, pbdev->fid); | |
671 | } | |
8cba80c3 FB |
672 | } |
673 | ||
674 | static void s390_pcihost_hot_unplug(HotplugHandler *hotplug_dev, | |
675 | DeviceState *dev, Error **errp) | |
676 | { | |
677 | PCIDevice *pci_dev = PCI_DEVICE(dev); | |
678 | S390pciState *s = S390_PCI_HOST_BRIDGE(pci_device_root_bus(pci_dev) | |
679 | ->qbus.parent); | |
3e5cfba3 | 680 | S390PCIBusDevice *pbdev = s->pbdev[PCI_SLOT(pci_dev->devfn)]; |
8cba80c3 | 681 | |
5d1abf23 YMZ |
682 | switch (pbdev->state) { |
683 | case ZPCI_FS_RESERVED: | |
684 | goto out; | |
685 | case ZPCI_FS_STANDBY: | |
686 | break; | |
687 | default: | |
8cba80c3 FB |
688 | s390_pci_generate_plug_event(HP_EVENT_CONFIGURED_TO_STBRES, |
689 | pbdev->fh, pbdev->fid); | |
690 | } | |
691 | ||
692 | s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED, | |
693 | pbdev->fh, pbdev->fid); | |
694 | pbdev->fh = 0; | |
695 | pbdev->fid = 0; | |
696 | pbdev->pdev = NULL; | |
5d1abf23 YMZ |
697 | pbdev->state = ZPCI_FS_RESERVED; |
698 | out: | |
8cba80c3 FB |
699 | object_unparent(OBJECT(pci_dev)); |
700 | } | |
701 | ||
702 | static void s390_pcihost_class_init(ObjectClass *klass, void *data) | |
703 | { | |
704 | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); | |
705 | DeviceClass *dc = DEVICE_CLASS(klass); | |
706 | HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); | |
707 | ||
708 | dc->cannot_instantiate_with_device_add_yet = true; | |
709 | k->init = s390_pcihost_init; | |
710 | hc->plug = s390_pcihost_hot_plug; | |
711 | hc->unplug = s390_pcihost_hot_unplug; | |
226419d6 | 712 | msi_nonbroken = true; |
8cba80c3 FB |
713 | } |
714 | ||
715 | static const TypeInfo s390_pcihost_info = { | |
716 | .name = TYPE_S390_PCI_HOST_BRIDGE, | |
717 | .parent = TYPE_PCI_HOST_BRIDGE, | |
718 | .instance_size = sizeof(S390pciState), | |
719 | .class_init = s390_pcihost_class_init, | |
720 | .interfaces = (InterfaceInfo[]) { | |
721 | { TYPE_HOTPLUG_HANDLER }, | |
722 | { } | |
723 | } | |
724 | }; | |
725 | ||
90a0f9af YMZ |
726 | static const TypeInfo s390_pcibus_info = { |
727 | .name = TYPE_S390_PCI_BUS, | |
728 | .parent = TYPE_BUS, | |
729 | .instance_size = sizeof(S390PCIBus), | |
730 | }; | |
731 | ||
3e5cfba3 YMZ |
732 | static uint16_t s390_pci_generate_uid(void) |
733 | { | |
734 | uint16_t uid = 0; | |
735 | ||
736 | do { | |
737 | uid++; | |
738 | if (!s390_pci_find_dev_by_uid(uid)) { | |
739 | return uid; | |
740 | } | |
741 | } while (uid < ZPCI_MAX_UID); | |
742 | ||
743 | return UID_UNDEFINED; | |
744 | } | |
745 | ||
746 | static uint32_t s390_pci_generate_fid(Error **errp) | |
747 | { | |
748 | uint32_t fid = 0; | |
749 | ||
750 | while (fid <= ZPCI_MAX_FID) { | |
751 | if (!s390_pci_find_dev_by_fid(fid)) { | |
752 | return fid; | |
753 | } | |
754 | ||
755 | if (fid == ZPCI_MAX_FID) { | |
756 | break; | |
757 | } | |
758 | ||
759 | fid++; | |
760 | } | |
761 | ||
762 | error_setg(errp, "no free fid could be found"); | |
763 | return 0; | |
764 | } | |
765 | ||
766 | static void s390_pci_device_realize(DeviceState *dev, Error **errp) | |
767 | { | |
768 | S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev); | |
769 | ||
770 | if (!zpci->target) { | |
771 | error_setg(errp, "target must be defined"); | |
772 | return; | |
773 | } | |
774 | ||
775 | if (s390_pci_find_dev_by_target(zpci->target)) { | |
776 | error_setg(errp, "target %s already has an associated zpci device", | |
777 | zpci->target); | |
778 | return; | |
779 | } | |
780 | ||
781 | if (zpci->uid == UID_UNDEFINED) { | |
782 | zpci->uid = s390_pci_generate_uid(); | |
783 | if (!zpci->uid) { | |
784 | error_setg(errp, "no free uid could be found"); | |
785 | return; | |
786 | } | |
787 | } else if (s390_pci_find_dev_by_uid(zpci->uid)) { | |
788 | error_setg(errp, "uid %u already in use", zpci->uid); | |
789 | return; | |
790 | } | |
791 | ||
792 | if (!zpci->fid_defined) { | |
793 | Error *local_error = NULL; | |
794 | ||
795 | zpci->fid = s390_pci_generate_fid(&local_error); | |
796 | if (local_error) { | |
797 | error_propagate(errp, local_error); | |
798 | return; | |
799 | } | |
800 | } else if (s390_pci_find_dev_by_fid(zpci->fid)) { | |
801 | error_setg(errp, "fid %u already in use", zpci->fid); | |
802 | return; | |
803 | } | |
804 | ||
805 | zpci->state = ZPCI_FS_RESERVED; | |
806 | } | |
807 | ||
808 | static void s390_pci_device_reset(DeviceState *dev) | |
809 | { | |
810 | S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev); | |
811 | ||
812 | switch (pbdev->state) { | |
813 | case ZPCI_FS_RESERVED: | |
814 | return; | |
815 | case ZPCI_FS_STANDBY: | |
816 | break; | |
817 | default: | |
818 | pbdev->fh &= ~FH_MASK_ENABLE; | |
819 | pbdev->state = ZPCI_FS_DISABLED; | |
820 | break; | |
821 | } | |
822 | ||
823 | if (pbdev->summary_ind) { | |
824 | pci_dereg_irqs(pbdev); | |
825 | } | |
826 | if (pbdev->iommu_enabled) { | |
827 | pci_dereg_ioat(pbdev); | |
828 | } | |
829 | ||
830 | pbdev->fmb_addr = 0; | |
831 | } | |
832 | ||
833 | static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name, | |
834 | void *opaque, Error **errp) | |
835 | { | |
836 | Property *prop = opaque; | |
837 | uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop); | |
838 | ||
839 | visit_type_uint32(v, name, ptr, errp); | |
840 | } | |
841 | ||
842 | static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name, | |
843 | void *opaque, Error **errp) | |
844 | { | |
845 | DeviceState *dev = DEVICE(obj); | |
846 | S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj); | |
847 | Property *prop = opaque; | |
848 | uint32_t *ptr = qdev_get_prop_ptr(dev, prop); | |
849 | ||
850 | if (dev->realized) { | |
851 | qdev_prop_set_after_realize(dev, name, errp); | |
852 | return; | |
853 | } | |
854 | ||
855 | visit_type_uint32(v, name, ptr, errp); | |
856 | zpci->fid_defined = true; | |
857 | } | |
858 | ||
859 | static PropertyInfo s390_pci_fid_propinfo = { | |
860 | .name = "zpci_fid", | |
861 | .get = s390_pci_get_fid, | |
862 | .set = s390_pci_set_fid, | |
863 | }; | |
864 | ||
865 | #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \ | |
866 | DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t) | |
867 | ||
868 | static Property s390_pci_device_properties[] = { | |
869 | DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED), | |
870 | DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid), | |
871 | DEFINE_PROP_STRING("target", S390PCIBusDevice, target), | |
872 | DEFINE_PROP_END_OF_LIST(), | |
873 | }; | |
874 | ||
875 | static void s390_pci_device_class_init(ObjectClass *klass, void *data) | |
876 | { | |
877 | DeviceClass *dc = DEVICE_CLASS(klass); | |
878 | ||
879 | dc->desc = "zpci device"; | |
880 | dc->reset = s390_pci_device_reset; | |
881 | dc->bus_type = TYPE_S390_PCI_BUS; | |
882 | dc->realize = s390_pci_device_realize; | |
883 | dc->props = s390_pci_device_properties; | |
884 | } | |
885 | ||
886 | static const TypeInfo s390_pci_device_info = { | |
887 | .name = TYPE_S390_PCI_DEVICE, | |
888 | .parent = TYPE_DEVICE, | |
889 | .instance_size = sizeof(S390PCIBusDevice), | |
890 | .class_init = s390_pci_device_class_init, | |
891 | }; | |
892 | ||
8cba80c3 FB |
893 | static void s390_pci_register_types(void) |
894 | { | |
895 | type_register_static(&s390_pcihost_info); | |
90a0f9af | 896 | type_register_static(&s390_pcibus_info); |
3e5cfba3 | 897 | type_register_static(&s390_pci_device_info); |
8cba80c3 FB |
898 | } |
899 | ||
900 | type_init(s390_pci_register_types) |