]> git.proxmox.com Git - mirror_qemu.git/blame - hw/shix.c
isa: always use provided ISA bus when creating an isa device
[mirror_qemu.git] / hw / shix.c
CommitLineData
27c7ca7e
FB
1/*
2 * SHIX 2.0 board description
5fafdf24 3 *
27c7ca7e 4 * Copyright (c) 2005 Samuel Tardieu
5fafdf24 5 *
27c7ca7e
FB
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
5fafdf24 24/*
27c7ca7e
FB
25 Shix 2.0 board by Alexis Polti, described at
26 http://perso.enst.fr/~polti/realisations/shix20/
27
28 More information in target-sh4/README.sh4
29*/
87ecb68b
PB
30#include "hw.h"
31#include "sh.h"
32#include "sysemu.h"
33#include "boards.h"
ca20cf32 34#include "loader.h"
0af58e58 35#include "exec-memory.h"
27c7ca7e
FB
36
37#define BIOS_FILENAME "shix_bios.bin"
38#define BIOS_ADDRESS 0xA0000000
39
c227f099 40static void shix_init(ram_addr_t ram_size,
3023f332 41 const char *boot_device,
27c7ca7e 42 const char *kernel_filename, const char *kernel_cmdline,
94fc95cd 43 const char *initrd_filename, const char *cpu_model)
27c7ca7e
FB
44{
45 int ret;
46 CPUState *env;
47 struct SH7750State *s;
0af58e58
AK
48 MemoryRegion *sysmem = get_system_memory();
49 MemoryRegion *rom = g_new(MemoryRegion, 1);
50 MemoryRegion *sdram = g_new(MemoryRegion, 2);
aaed909a
FB
51
52 if (!cpu_model)
53 cpu_model = "any";
27c7ca7e
FB
54
55 printf("Initializing CPU\n");
aaed909a 56 env = cpu_init(cpu_model);
27c7ca7e
FB
57
58 /* Allocate memory space */
59 printf("Allocating ROM\n");
0af58e58
AK
60 memory_region_init_ram(rom, NULL, "shix.rom", 0x4000);
61 memory_region_set_readonly(rom, true);
62 memory_region_add_subregion(sysmem, 0x00000000, rom);
27c7ca7e 63 printf("Allocating SDRAM 1\n");
0af58e58
AK
64 memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000);
65 memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
27c7ca7e 66 printf("Allocating SDRAM 2\n");
0af58e58
AK
67 memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000);
68 memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
27c7ca7e
FB
69
70 /* Load BIOS in 0 (and access it through P2, 0xA0000000) */
1192dad8
JM
71 if (bios_name == NULL)
72 bios_name = BIOS_FILENAME;
73 printf("%s: load BIOS '%s'\n", __func__, bios_name);
dcac9679 74 ret = load_image_targphys(bios_name, 0, 0x4000);
27c7ca7e
FB
75 if (ret < 0) { /* Check bios size */
76 fprintf(stderr, "ret=%d\n", ret);
77 fprintf(stderr, "qemu: could not load SHIX bios '%s'\n",
1192dad8 78 bios_name);
27c7ca7e
FB
79 exit(1);
80 }
81
82 /* Register peripherals */
382863e2 83 s = sh7750_init(env, sysmem);
27c7ca7e
FB
84 /* XXXXX Check success */
85 tc58128_init(s, "shix_linux_nand.bin", NULL);
86 fprintf(stderr, "initialization terminated\n");
87}
88
f80f9ec9 89static QEMUMachine shix_machine = {
4b32e168
AL
90 .name = "shix",
91 .desc = "shix card",
92 .init = shix_init,
0c257437 93 .is_default = 1,
27c7ca7e 94};
f80f9ec9
AL
95
96static void shix_machine_init(void)
97{
98 qemu_register_machine(&shix_machine);
99}
100
101machine_init(shix_machine_init);