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1/*
2 * QEMU sPAPR VIO code
3 *
4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
5 * Based on the s390 virtio bus code:
6 * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
7 *
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include "hw.h"
23#include "sysemu.h"
24#include "boards.h"
25#include "monitor.h"
26#include "loader.h"
27#include "elf.h"
28#include "hw/sysbus.h"
29#include "kvm.h"
30#include "device_tree.h"
b45d63b6 31#include "kvm_ppc.h"
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32
33#include "hw/spapr.h"
34#include "hw/spapr_vio.h"
277f9acf 35#include "hw/xics.h"
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36
37#ifdef CONFIG_FDT
38#include <libfdt.h>
39#endif /* CONFIG_FDT */
40
41/* #define DEBUG_SPAPR */
ee86dfee 42/* #define DEBUG_TCE */
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43
44#ifdef DEBUG_SPAPR
45#define dprintf(fmt, ...) \
46 do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
47#else
48#define dprintf(fmt, ...) \
49 do { } while (0)
50#endif
51
52static struct BusInfo spapr_vio_bus_info = {
53 .name = "spapr-vio",
54 .size = sizeof(VIOsPAPRBus),
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55 .props = (Property[]) {
56 DEFINE_PROP_UINT32("irq", VIOsPAPRDevice, vio_irq_num, 0), \
57 DEFINE_PROP_END_OF_LIST(),
58 },
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59};
60
61VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg)
62{
63 DeviceState *qdev;
64 VIOsPAPRDevice *dev = NULL;
65
d8bb00d6 66 QTAILQ_FOREACH(qdev, &bus->bus.children, sibling) {
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67 dev = (VIOsPAPRDevice *)qdev;
68 if (dev->reg == reg) {
69 break;
70 }
71 }
72
73 return dev;
74}
75
76#ifdef CONFIG_FDT
77static int vio_make_devnode(VIOsPAPRDevice *dev,
78 void *fdt)
79{
80 VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)dev->qdev.info;
81 int vdevice_off, node_off;
82 int ret;
83
84 vdevice_off = fdt_path_offset(fdt, "/vdevice");
85 if (vdevice_off < 0) {
86 return vdevice_off;
87 }
88
89 node_off = fdt_add_subnode(fdt, vdevice_off, dev->qdev.id);
90 if (node_off < 0) {
91 return node_off;
92 }
93
94 ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg);
95 if (ret < 0) {
96 return ret;
97 }
98
99 if (info->dt_type) {
100 ret = fdt_setprop_string(fdt, node_off, "device_type",
101 info->dt_type);
102 if (ret < 0) {
103 return ret;
104 }
105 }
106
107 if (info->dt_compatible) {
108 ret = fdt_setprop_string(fdt, node_off, "compatible",
109 info->dt_compatible);
110 if (ret < 0) {
111 return ret;
112 }
113 }
114
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115 if (dev->qirq) {
116 uint32_t ints_prop[] = {cpu_to_be32(dev->vio_irq_num), 0};
117
118 ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop,
119 sizeof(ints_prop));
120 if (ret < 0) {
121 return ret;
122 }
123 }
124
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125 if (dev->rtce_window_size) {
126 uint32_t dma_prop[] = {cpu_to_be32(dev->reg),
127 0, 0,
128 0, cpu_to_be32(dev->rtce_window_size)};
129
130 ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2);
131 if (ret < 0) {
132 return ret;
133 }
134
135 ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2);
136 if (ret < 0) {
137 return ret;
138 }
139
140 ret = fdt_setprop(fdt, node_off, "ibm,my-dma-window", dma_prop,
141 sizeof(dma_prop));
142 if (ret < 0) {
143 return ret;
144 }
145 }
146
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147 if (info->devnode) {
148 ret = (info->devnode)(dev, fdt, node_off);
149 if (ret < 0) {
150 return ret;
151 }
152 }
153
154 return node_off;
155}
156#endif /* CONFIG_FDT */
157
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158/*
159 * RTCE handling
160 */
161
162static void rtce_init(VIOsPAPRDevice *dev)
163{
164 size_t size = (dev->rtce_window_size >> SPAPR_VIO_TCE_PAGE_SHIFT)
165 * sizeof(VIOsPAPR_RTCE);
166
167 if (size) {
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168 dev->rtce_table = kvmppc_create_spapr_tce(dev->reg,
169 dev->rtce_window_size,
170 &dev->kvmtce_fd);
171
172 if (!dev->rtce_table) {
173 dev->rtce_table = g_malloc0(size);
174 }
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175 }
176}
177
178static target_ulong h_put_tce(CPUState *env, sPAPREnvironment *spapr,
179 target_ulong opcode, target_ulong *args)
180{
181 target_ulong liobn = args[0];
182 target_ulong ioba = args[1];
183 target_ulong tce = args[2];
184 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, liobn);
185 VIOsPAPR_RTCE *rtce;
186
187 if (!dev) {
188 hcall_dprintf("spapr_vio_put_tce on non-existent LIOBN "
189 TARGET_FMT_lx "\n", liobn);
190 return H_PARAMETER;
191 }
192
193 ioba &= ~(SPAPR_VIO_TCE_PAGE_SIZE - 1);
194
195#ifdef DEBUG_TCE
196 fprintf(stderr, "spapr_vio_put_tce on %s ioba 0x" TARGET_FMT_lx
197 " TCE 0x" TARGET_FMT_lx "\n", dev->qdev.id, ioba, tce);
198#endif
199
200 if (ioba >= dev->rtce_window_size) {
201 hcall_dprintf("spapr_vio_put_tce on out-of-boards IOBA 0x"
202 TARGET_FMT_lx "\n", ioba);
203 return H_PARAMETER;
204 }
205
206 rtce = dev->rtce_table + (ioba >> SPAPR_VIO_TCE_PAGE_SHIFT);
207 rtce->tce = tce;
208
209 return H_SUCCESS;
210}
211
212int spapr_vio_check_tces(VIOsPAPRDevice *dev, target_ulong ioba,
213 target_ulong len, enum VIOsPAPR_TCEAccess access)
214{
215 int start, end, i;
216
217 start = ioba >> SPAPR_VIO_TCE_PAGE_SHIFT;
218 end = (ioba + len - 1) >> SPAPR_VIO_TCE_PAGE_SHIFT;
219
220 for (i = start; i <= end; i++) {
221 if ((dev->rtce_table[i].tce & access) != access) {
222#ifdef DEBUG_TCE
223 fprintf(stderr, "FAIL on %d\n", i);
224#endif
225 return -1;
226 }
227 }
228
229 return 0;
230}
231
232int spapr_tce_dma_write(VIOsPAPRDevice *dev, uint64_t taddr, const void *buf,
233 uint32_t size)
234{
235#ifdef DEBUG_TCE
236 fprintf(stderr, "spapr_tce_dma_write taddr=0x%llx size=0x%x\n",
237 (unsigned long long)taddr, size);
238#endif
239
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240 /* Check for bypass */
241 if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) {
242 cpu_physical_memory_write(taddr, buf, size);
243 return 0;
244 }
245
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246 while (size) {
247 uint64_t tce;
248 uint32_t lsize;
249 uint64_t txaddr;
250
251 /* Check if we are in bound */
252 if (taddr >= dev->rtce_window_size) {
253#ifdef DEBUG_TCE
254 fprintf(stderr, "spapr_tce_dma_write out of bounds\n");
255#endif
256 return H_DEST_PARM;
257 }
258 tce = dev->rtce_table[taddr >> SPAPR_VIO_TCE_PAGE_SHIFT].tce;
259
260 /* How much til end of page ? */
261 lsize = MIN(size, ((~taddr) & SPAPR_VIO_TCE_PAGE_MASK) + 1);
262
263 /* Check TCE */
264 if (!(tce & 2)) {
265 return H_DEST_PARM;
266 }
267
268 /* Translate */
269 txaddr = (tce & ~SPAPR_VIO_TCE_PAGE_MASK) |
270 (taddr & SPAPR_VIO_TCE_PAGE_MASK);
271
272#ifdef DEBUG_TCE
273 fprintf(stderr, " -> write to txaddr=0x%llx, size=0x%x\n",
274 (unsigned long long)txaddr, lsize);
275#endif
276
277 /* Do it */
278 cpu_physical_memory_write(txaddr, buf, lsize);
279 buf += lsize;
280 taddr += lsize;
281 size -= lsize;
282 }
283 return 0;
284}
285
286int spapr_tce_dma_zero(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t size)
287{
288 /* FIXME: allocating a temp buffer is nasty, but just stepping
289 * through writing zeroes is awkward. This will do for now. */
290 uint8_t zeroes[size];
291
292#ifdef DEBUG_TCE
293 fprintf(stderr, "spapr_tce_dma_zero taddr=0x%llx size=0x%x\n",
294 (unsigned long long)taddr, size);
295#endif
296
297 memset(zeroes, 0, size);
298 return spapr_tce_dma_write(dev, taddr, zeroes, size);
299}
300
301void stb_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint8_t val)
302{
303 spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
304}
305
306void sth_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint16_t val)
307{
308 val = tswap16(val);
309 spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
310}
311
312
313void stw_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t val)
314{
315 val = tswap32(val);
316 spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
317}
318
319void stq_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint64_t val)
320{
321 val = tswap64(val);
322 spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
323}
324
325int spapr_tce_dma_read(VIOsPAPRDevice *dev, uint64_t taddr, void *buf,
326 uint32_t size)
327{
328#ifdef DEBUG_TCE
329 fprintf(stderr, "spapr_tce_dma_write taddr=0x%llx size=0x%x\n",
330 (unsigned long long)taddr, size);
331#endif
332
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333 /* Check for bypass */
334 if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) {
335 cpu_physical_memory_read(taddr, buf, size);
336 return 0;
337 }
338
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339 while (size) {
340 uint64_t tce;
341 uint32_t lsize;
342 uint64_t txaddr;
343
344 /* Check if we are in bound */
345 if (taddr >= dev->rtce_window_size) {
346#ifdef DEBUG_TCE
347 fprintf(stderr, "spapr_tce_dma_read out of bounds\n");
348#endif
349 return H_DEST_PARM;
350 }
351 tce = dev->rtce_table[taddr >> SPAPR_VIO_TCE_PAGE_SHIFT].tce;
352
353 /* How much til end of page ? */
354 lsize = MIN(size, ((~taddr) & SPAPR_VIO_TCE_PAGE_MASK) + 1);
355
356 /* Check TCE */
357 if (!(tce & 1)) {
358 return H_DEST_PARM;
359 }
360
361 /* Translate */
362 txaddr = (tce & ~SPAPR_VIO_TCE_PAGE_MASK) |
363 (taddr & SPAPR_VIO_TCE_PAGE_MASK);
364
365#ifdef DEBUG_TCE
366 fprintf(stderr, " -> write to txaddr=0x%llx, size=0x%x\n",
367 (unsigned long long)txaddr, lsize);
368#endif
369 /* Do it */
370 cpu_physical_memory_read(txaddr, buf, lsize);
371 buf += lsize;
372 taddr += lsize;
373 size -= lsize;
374 }
375 return H_SUCCESS;
376}
377
378uint64_t ldq_tce(VIOsPAPRDevice *dev, uint64_t taddr)
379{
380 uint64_t val;
381
382 spapr_tce_dma_read(dev, taddr, &val, sizeof(val));
383 return tswap64(val);
384}
385
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386/*
387 * CRQ handling
388 */
389static target_ulong h_reg_crq(CPUState *env, sPAPREnvironment *spapr,
390 target_ulong opcode, target_ulong *args)
391{
392 target_ulong reg = args[0];
393 target_ulong queue_addr = args[1];
394 target_ulong queue_len = args[2];
395 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
396
397 if (!dev) {
398 hcall_dprintf("h_reg_crq on non-existent unit 0x"
399 TARGET_FMT_lx "\n", reg);
400 return H_PARAMETER;
401 }
402
403 /* We can't grok a queue size bigger than 256M for now */
404 if (queue_len < 0x1000 || queue_len > 0x10000000) {
405 hcall_dprintf("h_reg_crq, queue size too small or too big (0x%llx)\n",
406 (unsigned long long)queue_len);
407 return H_PARAMETER;
408 }
409
410 /* Check queue alignment */
411 if (queue_addr & 0xfff) {
412 hcall_dprintf("h_reg_crq, queue not aligned (0x%llx)\n",
413 (unsigned long long)queue_addr);
414 return H_PARAMETER;
415 }
416
417 /* Check if device supports CRQs */
418 if (!dev->crq.SendFunc) {
419 return H_NOT_FOUND;
420 }
421
422
423 /* Already a queue ? */
424 if (dev->crq.qsize) {
425 return H_RESOURCE;
426 }
427 dev->crq.qladdr = queue_addr;
428 dev->crq.qsize = queue_len;
429 dev->crq.qnext = 0;
430
431 dprintf("CRQ for dev 0x" TARGET_FMT_lx " registered at 0x"
432 TARGET_FMT_lx "/0x" TARGET_FMT_lx "\n",
433 reg, queue_addr, queue_len);
434 return H_SUCCESS;
435}
436
437static target_ulong h_free_crq(CPUState *env, sPAPREnvironment *spapr,
438 target_ulong opcode, target_ulong *args)
439{
440 target_ulong reg = args[0];
441 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
442
443 if (!dev) {
444 hcall_dprintf("h_free_crq on non-existent unit 0x"
445 TARGET_FMT_lx "\n", reg);
446 return H_PARAMETER;
447 }
448
449 dev->crq.qladdr = 0;
450 dev->crq.qsize = 0;
451 dev->crq.qnext = 0;
452
453 dprintf("CRQ for dev 0x" TARGET_FMT_lx " freed\n", reg);
454
455 return H_SUCCESS;
456}
457
458static target_ulong h_send_crq(CPUState *env, sPAPREnvironment *spapr,
459 target_ulong opcode, target_ulong *args)
460{
461 target_ulong reg = args[0];
462 target_ulong msg_hi = args[1];
463 target_ulong msg_lo = args[2];
464 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
465 uint64_t crq_mangle[2];
466
467 if (!dev) {
468 hcall_dprintf("h_send_crq on non-existent unit 0x"
469 TARGET_FMT_lx "\n", reg);
470 return H_PARAMETER;
471 }
472 crq_mangle[0] = cpu_to_be64(msg_hi);
473 crq_mangle[1] = cpu_to_be64(msg_lo);
474
475 if (dev->crq.SendFunc) {
476 return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle);
477 }
478
479 return H_HARDWARE;
480}
481
482static target_ulong h_enable_crq(CPUState *env, sPAPREnvironment *spapr,
483 target_ulong opcode, target_ulong *args)
484{
485 target_ulong reg = args[0];
486 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
487
488 if (!dev) {
489 hcall_dprintf("h_enable_crq on non-existent unit 0x"
490 TARGET_FMT_lx "\n", reg);
491 return H_PARAMETER;
492 }
493
494 return 0;
495}
496
497/* Returns negative error, 0 success, or positive: queue full */
498int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq)
499{
500 int rc;
501 uint8_t byte;
502
503 if (!dev->crq.qsize) {
504 fprintf(stderr, "spapr_vio_send_creq on uninitialized queue\n");
505 return -1;
506 }
507
508 /* Maybe do a fast path for KVM just writing to the pages */
509 rc = spapr_tce_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1);
510 if (rc) {
511 return rc;
512 }
513 if (byte != 0) {
514 return 1;
515 }
516
517 rc = spapr_tce_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8,
518 &crq[8], 8);
519 if (rc) {
520 return rc;
521 }
522
523 kvmppc_eieio();
524
525 rc = spapr_tce_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8);
526 if (rc) {
527 return rc;
528 }
529
530 dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize;
531
532 if (dev->signal_state & 1) {
533 qemu_irq_pulse(dev->qirq);
534 }
535
536 return 0;
537}
538
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539/* "quiesce" handling */
540
541static void spapr_vio_quiesce_one(VIOsPAPRDevice *dev)
542{
543 dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS;
544
545 if (dev->rtce_table) {
546 size_t size = (dev->rtce_window_size >> SPAPR_VIO_TCE_PAGE_SHIFT)
547 * sizeof(VIOsPAPR_RTCE);
548 memset(dev->rtce_table, 0, size);
549 }
550
551 dev->crq.qladdr = 0;
552 dev->crq.qsize = 0;
553 dev->crq.qnext = 0;
554}
555
556static void rtas_set_tce_bypass(sPAPREnvironment *spapr, uint32_t token,
557 uint32_t nargs, target_ulong args,
558 uint32_t nret, target_ulong rets)
559{
560 VIOsPAPRBus *bus = spapr->vio_bus;
561 VIOsPAPRDevice *dev;
562 uint32_t unit, enable;
563
564 if (nargs != 2) {
565 rtas_st(rets, 0, -3);
566 return;
567 }
568 unit = rtas_ld(args, 0);
569 enable = rtas_ld(args, 1);
570 dev = spapr_vio_find_by_reg(bus, unit);
571 if (!dev) {
572 rtas_st(rets, 0, -3);
573 return;
574 }
575 if (enable) {
576 dev->flags |= VIO_PAPR_FLAG_DMA_BYPASS;
577 } else {
578 dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS;
579 }
580
581 rtas_st(rets, 0, 0);
582}
583
584static void rtas_quiesce(sPAPREnvironment *spapr, uint32_t token,
585 uint32_t nargs, target_ulong args,
586 uint32_t nret, target_ulong rets)
587{
588 VIOsPAPRBus *bus = spapr->vio_bus;
589 DeviceState *qdev;
590 VIOsPAPRDevice *dev = NULL;
591
592 if (nargs != 0) {
593 rtas_st(rets, 0, -3);
594 return;
595 }
596
d8bb00d6 597 QTAILQ_FOREACH(qdev, &bus->bus.children, sibling) {
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598 dev = (VIOsPAPRDevice *)qdev;
599 spapr_vio_quiesce_one(dev);
600 }
601
602 rtas_st(rets, 0, 0);
603}
604
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605static int spapr_vio_busdev_init(DeviceState *qdev, DeviceInfo *qinfo)
606{
607 VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qinfo;
608 VIOsPAPRDevice *dev = (VIOsPAPRDevice *)qdev;
609 char *id;
610
611 if (asprintf(&id, "%s@%x", info->dt_name, dev->reg) < 0) {
612 return -1;
613 }
614
615 dev->qdev.id = id;
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616
617 dev->qirq = spapr_allocate_irq(dev->vio_irq_num, &dev->vio_irq_num);
618 if (!dev->qirq) {
619 return -1;
416343b1 620 }
4040ab72 621
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622 rtce_init(dev);
623
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624 return info->init(dev);
625}
626
627void spapr_vio_bus_register_withprop(VIOsPAPRDeviceInfo *info)
628{
629 info->qdev.init = spapr_vio_busdev_init;
630 info->qdev.bus_info = &spapr_vio_bus_info;
631
632 assert(info->qdev.size >= sizeof(VIOsPAPRDevice));
633 qdev_register(&info->qdev);
634}
635
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636static target_ulong h_vio_signal(CPUState *env, sPAPREnvironment *spapr,
637 target_ulong opcode,
638 target_ulong *args)
639{
640 target_ulong reg = args[0];
641 target_ulong mode = args[1];
642 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
643 VIOsPAPRDeviceInfo *info;
644
645 if (!dev) {
646 return H_PARAMETER;
647 }
648
649 info = (VIOsPAPRDeviceInfo *)dev->qdev.info;
650
651 if (mode & ~info->signal_mask) {
652 return H_PARAMETER;
653 }
654
655 dev->signal_state = mode;
656
657 return H_SUCCESS;
658}
659
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660VIOsPAPRBus *spapr_vio_bus_init(void)
661{
662 VIOsPAPRBus *bus;
663 BusState *qbus;
664 DeviceState *dev;
665 DeviceInfo *qinfo;
666
667 /* Create bridge device */
668 dev = qdev_create(NULL, "spapr-vio-bridge");
669 qdev_init_nofail(dev);
670
671 /* Create bus on bridge device */
672
673 qbus = qbus_create(&spapr_vio_bus_info, dev, "spapr-vio");
674 bus = DO_UPCAST(VIOsPAPRBus, bus, qbus);
675
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676 /* hcall-vio */
677 spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal);
678
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679 /* hcall-tce */
680 spapr_register_hypercall(H_PUT_TCE, h_put_tce);
681
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682 /* hcall-crq */
683 spapr_register_hypercall(H_REG_CRQ, h_reg_crq);
684 spapr_register_hypercall(H_FREE_CRQ, h_free_crq);
685 spapr_register_hypercall(H_SEND_CRQ, h_send_crq);
686 spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq);
687
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688 /* RTAS calls */
689 spapr_rtas_register("ibm,set-tce-bypass", rtas_set_tce_bypass);
690 spapr_rtas_register("quiesce", rtas_quiesce);
691
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692 for (qinfo = device_info_list; qinfo; qinfo = qinfo->next) {
693 VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qinfo;
694
695 if (qinfo->bus_info != &spapr_vio_bus_info) {
696 continue;
697 }
698
699 if (info->hcalls) {
700 info->hcalls(bus);
701 }
702 }
703
704 return bus;
705}
706
707/* Represents sPAPR hcall VIO devices */
708
709static int spapr_vio_bridge_init(SysBusDevice *dev)
710{
711 /* nothing */
712 return 0;
713}
714
715static SysBusDeviceInfo spapr_vio_bridge_info = {
716 .init = spapr_vio_bridge_init,
717 .qdev.name = "spapr-vio-bridge",
718 .qdev.size = sizeof(SysBusDevice),
719 .qdev.no_user = 1,
720};
721
722static void spapr_vio_register_devices(void)
723{
724 sysbus_register_withprop(&spapr_vio_bridge_info);
725}
726
727device_init(spapr_vio_register_devices)
728
729#ifdef CONFIG_FDT
730int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt)
731{
732 DeviceState *qdev;
733 int ret = 0;
734
d8bb00d6 735 QTAILQ_FOREACH(qdev, &bus->bus.children, sibling) {
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736 VIOsPAPRDevice *dev = (VIOsPAPRDevice *)qdev;
737
738 ret = vio_make_devnode(dev, fdt);
739
740 if (ret < 0) {
741 return ret;
742 }
743 }
744
745 return 0;
746}
747#endif /* CONFIG_FDT */