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4040ab72 DG |
1 | /* |
2 | * QEMU sPAPR VIO code | |
3 | * | |
4 | * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com> | |
5 | * Based on the s390 virtio bus code: | |
6 | * Copyright (c) 2009 Alexander Graf <agraf@suse.de> | |
7 | * | |
8 | * This library is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU Lesser General Public | |
10 | * License as published by the Free Software Foundation; either | |
11 | * version 2 of the License, or (at your option) any later version. | |
12 | * | |
13 | * This library is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * Lesser General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU Lesser General Public | |
19 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | #include "hw.h" | |
23 | #include "sysemu.h" | |
24 | #include "boards.h" | |
25 | #include "monitor.h" | |
26 | #include "loader.h" | |
27 | #include "elf.h" | |
28 | #include "hw/sysbus.h" | |
29 | #include "kvm.h" | |
30 | #include "device_tree.h" | |
b45d63b6 | 31 | #include "kvm_ppc.h" |
4040ab72 DG |
32 | |
33 | #include "hw/spapr.h" | |
34 | #include "hw/spapr_vio.h" | |
277f9acf | 35 | #include "hw/xics.h" |
4040ab72 DG |
36 | |
37 | #ifdef CONFIG_FDT | |
38 | #include <libfdt.h> | |
39 | #endif /* CONFIG_FDT */ | |
40 | ||
41 | /* #define DEBUG_SPAPR */ | |
ee86dfee | 42 | /* #define DEBUG_TCE */ |
4040ab72 DG |
43 | |
44 | #ifdef DEBUG_SPAPR | |
45 | #define dprintf(fmt, ...) \ | |
46 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) | |
47 | #else | |
48 | #define dprintf(fmt, ...) \ | |
49 | do { } while (0) | |
50 | #endif | |
51 | ||
52 | static struct BusInfo spapr_vio_bus_info = { | |
53 | .name = "spapr-vio", | |
54 | .size = sizeof(VIOsPAPRBus), | |
416343b1 PB |
55 | .props = (Property[]) { |
56 | DEFINE_PROP_UINT32("irq", VIOsPAPRDevice, vio_irq_num, 0), \ | |
57 | DEFINE_PROP_END_OF_LIST(), | |
58 | }, | |
4040ab72 DG |
59 | }; |
60 | ||
61 | VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg) | |
62 | { | |
63 | DeviceState *qdev; | |
64 | VIOsPAPRDevice *dev = NULL; | |
65 | ||
d8bb00d6 | 66 | QTAILQ_FOREACH(qdev, &bus->bus.children, sibling) { |
4040ab72 DG |
67 | dev = (VIOsPAPRDevice *)qdev; |
68 | if (dev->reg == reg) { | |
5435352c | 69 | return dev; |
4040ab72 DG |
70 | } |
71 | } | |
72 | ||
5435352c | 73 | return NULL; |
4040ab72 DG |
74 | } |
75 | ||
1e34d859 ME |
76 | static char *vio_format_dev_name(VIOsPAPRDevice *dev) |
77 | { | |
3954d33a | 78 | VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
1e34d859 ME |
79 | char *name; |
80 | ||
81 | /* Device tree style name device@reg */ | |
3954d33a | 82 | if (asprintf(&name, "%s@%x", pc->dt_name, dev->reg) < 0) { |
1e34d859 ME |
83 | return NULL; |
84 | } | |
85 | ||
86 | return name; | |
87 | } | |
88 | ||
4040ab72 DG |
89 | #ifdef CONFIG_FDT |
90 | static int vio_make_devnode(VIOsPAPRDevice *dev, | |
91 | void *fdt) | |
92 | { | |
3954d33a | 93 | VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
1e34d859 ME |
94 | int vdevice_off, node_off, ret; |
95 | char *dt_name; | |
4040ab72 DG |
96 | |
97 | vdevice_off = fdt_path_offset(fdt, "/vdevice"); | |
98 | if (vdevice_off < 0) { | |
99 | return vdevice_off; | |
100 | } | |
101 | ||
1e34d859 ME |
102 | dt_name = vio_format_dev_name(dev); |
103 | if (!dt_name) { | |
104 | return -ENOMEM; | |
105 | } | |
106 | ||
107 | node_off = fdt_add_subnode(fdt, vdevice_off, dt_name); | |
108 | free(dt_name); | |
4040ab72 DG |
109 | if (node_off < 0) { |
110 | return node_off; | |
111 | } | |
112 | ||
113 | ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg); | |
114 | if (ret < 0) { | |
115 | return ret; | |
116 | } | |
117 | ||
3954d33a | 118 | if (pc->dt_type) { |
4040ab72 | 119 | ret = fdt_setprop_string(fdt, node_off, "device_type", |
3954d33a | 120 | pc->dt_type); |
4040ab72 DG |
121 | if (ret < 0) { |
122 | return ret; | |
123 | } | |
124 | } | |
125 | ||
3954d33a | 126 | if (pc->dt_compatible) { |
4040ab72 | 127 | ret = fdt_setprop_string(fdt, node_off, "compatible", |
3954d33a | 128 | pc->dt_compatible); |
4040ab72 DG |
129 | if (ret < 0) { |
130 | return ret; | |
131 | } | |
132 | } | |
133 | ||
00dc738d DG |
134 | if (dev->qirq) { |
135 | uint32_t ints_prop[] = {cpu_to_be32(dev->vio_irq_num), 0}; | |
136 | ||
137 | ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop, | |
138 | sizeof(ints_prop)); | |
139 | if (ret < 0) { | |
140 | return ret; | |
141 | } | |
142 | } | |
143 | ||
ee86dfee DG |
144 | if (dev->rtce_window_size) { |
145 | uint32_t dma_prop[] = {cpu_to_be32(dev->reg), | |
146 | 0, 0, | |
147 | 0, cpu_to_be32(dev->rtce_window_size)}; | |
148 | ||
149 | ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2); | |
150 | if (ret < 0) { | |
151 | return ret; | |
152 | } | |
153 | ||
154 | ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2); | |
155 | if (ret < 0) { | |
156 | return ret; | |
157 | } | |
158 | ||
159 | ret = fdt_setprop(fdt, node_off, "ibm,my-dma-window", dma_prop, | |
160 | sizeof(dma_prop)); | |
161 | if (ret < 0) { | |
162 | return ret; | |
163 | } | |
164 | } | |
165 | ||
3954d33a AL |
166 | if (pc->devnode) { |
167 | ret = (pc->devnode)(dev, fdt, node_off); | |
4040ab72 DG |
168 | if (ret < 0) { |
169 | return ret; | |
170 | } | |
171 | } | |
172 | ||
173 | return node_off; | |
174 | } | |
175 | #endif /* CONFIG_FDT */ | |
176 | ||
ee86dfee DG |
177 | /* |
178 | * RTCE handling | |
179 | */ | |
180 | ||
181 | static void rtce_init(VIOsPAPRDevice *dev) | |
182 | { | |
183 | size_t size = (dev->rtce_window_size >> SPAPR_VIO_TCE_PAGE_SHIFT) | |
184 | * sizeof(VIOsPAPR_RTCE); | |
185 | ||
186 | if (size) { | |
0f5cb298 DG |
187 | dev->rtce_table = kvmppc_create_spapr_tce(dev->reg, |
188 | dev->rtce_window_size, | |
189 | &dev->kvmtce_fd); | |
190 | ||
191 | if (!dev->rtce_table) { | |
192 | dev->rtce_table = g_malloc0(size); | |
193 | } | |
ee86dfee DG |
194 | } |
195 | } | |
196 | ||
e2684c0b | 197 | static target_ulong h_put_tce(CPUPPCState *env, sPAPREnvironment *spapr, |
ee86dfee DG |
198 | target_ulong opcode, target_ulong *args) |
199 | { | |
200 | target_ulong liobn = args[0]; | |
201 | target_ulong ioba = args[1]; | |
202 | target_ulong tce = args[2]; | |
203 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, liobn); | |
204 | VIOsPAPR_RTCE *rtce; | |
205 | ||
206 | if (!dev) { | |
d9599c92 | 207 | hcall_dprintf("LIOBN 0x" TARGET_FMT_lx " does not exist\n", liobn); |
ee86dfee DG |
208 | return H_PARAMETER; |
209 | } | |
210 | ||
211 | ioba &= ~(SPAPR_VIO_TCE_PAGE_SIZE - 1); | |
212 | ||
213 | #ifdef DEBUG_TCE | |
214 | fprintf(stderr, "spapr_vio_put_tce on %s ioba 0x" TARGET_FMT_lx | |
215 | " TCE 0x" TARGET_FMT_lx "\n", dev->qdev.id, ioba, tce); | |
216 | #endif | |
217 | ||
218 | if (ioba >= dev->rtce_window_size) { | |
d9599c92 | 219 | hcall_dprintf("Out-of-bounds IOBA 0x" TARGET_FMT_lx "\n", ioba); |
ee86dfee DG |
220 | return H_PARAMETER; |
221 | } | |
222 | ||
223 | rtce = dev->rtce_table + (ioba >> SPAPR_VIO_TCE_PAGE_SHIFT); | |
224 | rtce->tce = tce; | |
225 | ||
226 | return H_SUCCESS; | |
227 | } | |
228 | ||
229 | int spapr_vio_check_tces(VIOsPAPRDevice *dev, target_ulong ioba, | |
230 | target_ulong len, enum VIOsPAPR_TCEAccess access) | |
231 | { | |
232 | int start, end, i; | |
233 | ||
234 | start = ioba >> SPAPR_VIO_TCE_PAGE_SHIFT; | |
235 | end = (ioba + len - 1) >> SPAPR_VIO_TCE_PAGE_SHIFT; | |
236 | ||
237 | for (i = start; i <= end; i++) { | |
238 | if ((dev->rtce_table[i].tce & access) != access) { | |
239 | #ifdef DEBUG_TCE | |
240 | fprintf(stderr, "FAIL on %d\n", i); | |
241 | #endif | |
242 | return -1; | |
243 | } | |
244 | } | |
245 | ||
246 | return 0; | |
247 | } | |
248 | ||
249 | int spapr_tce_dma_write(VIOsPAPRDevice *dev, uint64_t taddr, const void *buf, | |
250 | uint32_t size) | |
251 | { | |
252 | #ifdef DEBUG_TCE | |
253 | fprintf(stderr, "spapr_tce_dma_write taddr=0x%llx size=0x%x\n", | |
254 | (unsigned long long)taddr, size); | |
255 | #endif | |
256 | ||
08942ac1 BH |
257 | /* Check for bypass */ |
258 | if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) { | |
259 | cpu_physical_memory_write(taddr, buf, size); | |
260 | return 0; | |
261 | } | |
262 | ||
ee86dfee DG |
263 | while (size) { |
264 | uint64_t tce; | |
265 | uint32_t lsize; | |
266 | uint64_t txaddr; | |
267 | ||
268 | /* Check if we are in bound */ | |
269 | if (taddr >= dev->rtce_window_size) { | |
270 | #ifdef DEBUG_TCE | |
271 | fprintf(stderr, "spapr_tce_dma_write out of bounds\n"); | |
272 | #endif | |
273 | return H_DEST_PARM; | |
274 | } | |
275 | tce = dev->rtce_table[taddr >> SPAPR_VIO_TCE_PAGE_SHIFT].tce; | |
276 | ||
277 | /* How much til end of page ? */ | |
278 | lsize = MIN(size, ((~taddr) & SPAPR_VIO_TCE_PAGE_MASK) + 1); | |
279 | ||
280 | /* Check TCE */ | |
281 | if (!(tce & 2)) { | |
282 | return H_DEST_PARM; | |
283 | } | |
284 | ||
285 | /* Translate */ | |
286 | txaddr = (tce & ~SPAPR_VIO_TCE_PAGE_MASK) | | |
287 | (taddr & SPAPR_VIO_TCE_PAGE_MASK); | |
288 | ||
289 | #ifdef DEBUG_TCE | |
290 | fprintf(stderr, " -> write to txaddr=0x%llx, size=0x%x\n", | |
291 | (unsigned long long)txaddr, lsize); | |
292 | #endif | |
293 | ||
294 | /* Do it */ | |
295 | cpu_physical_memory_write(txaddr, buf, lsize); | |
296 | buf += lsize; | |
297 | taddr += lsize; | |
298 | size -= lsize; | |
299 | } | |
300 | return 0; | |
301 | } | |
302 | ||
303 | int spapr_tce_dma_zero(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t size) | |
304 | { | |
305 | /* FIXME: allocating a temp buffer is nasty, but just stepping | |
306 | * through writing zeroes is awkward. This will do for now. */ | |
307 | uint8_t zeroes[size]; | |
308 | ||
309 | #ifdef DEBUG_TCE | |
310 | fprintf(stderr, "spapr_tce_dma_zero taddr=0x%llx size=0x%x\n", | |
311 | (unsigned long long)taddr, size); | |
312 | #endif | |
313 | ||
314 | memset(zeroes, 0, size); | |
315 | return spapr_tce_dma_write(dev, taddr, zeroes, size); | |
316 | } | |
317 | ||
318 | void stb_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint8_t val) | |
319 | { | |
320 | spapr_tce_dma_write(dev, taddr, &val, sizeof(val)); | |
321 | } | |
322 | ||
323 | void sth_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint16_t val) | |
324 | { | |
325 | val = tswap16(val); | |
326 | spapr_tce_dma_write(dev, taddr, &val, sizeof(val)); | |
327 | } | |
328 | ||
329 | ||
330 | void stw_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t val) | |
331 | { | |
332 | val = tswap32(val); | |
333 | spapr_tce_dma_write(dev, taddr, &val, sizeof(val)); | |
334 | } | |
335 | ||
336 | void stq_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint64_t val) | |
337 | { | |
338 | val = tswap64(val); | |
339 | spapr_tce_dma_write(dev, taddr, &val, sizeof(val)); | |
340 | } | |
341 | ||
342 | int spapr_tce_dma_read(VIOsPAPRDevice *dev, uint64_t taddr, void *buf, | |
343 | uint32_t size) | |
344 | { | |
345 | #ifdef DEBUG_TCE | |
346 | fprintf(stderr, "spapr_tce_dma_write taddr=0x%llx size=0x%x\n", | |
347 | (unsigned long long)taddr, size); | |
348 | #endif | |
349 | ||
08942ac1 BH |
350 | /* Check for bypass */ |
351 | if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) { | |
352 | cpu_physical_memory_read(taddr, buf, size); | |
353 | return 0; | |
354 | } | |
355 | ||
ee86dfee DG |
356 | while (size) { |
357 | uint64_t tce; | |
358 | uint32_t lsize; | |
359 | uint64_t txaddr; | |
360 | ||
361 | /* Check if we are in bound */ | |
362 | if (taddr >= dev->rtce_window_size) { | |
363 | #ifdef DEBUG_TCE | |
364 | fprintf(stderr, "spapr_tce_dma_read out of bounds\n"); | |
365 | #endif | |
366 | return H_DEST_PARM; | |
367 | } | |
368 | tce = dev->rtce_table[taddr >> SPAPR_VIO_TCE_PAGE_SHIFT].tce; | |
369 | ||
370 | /* How much til end of page ? */ | |
371 | lsize = MIN(size, ((~taddr) & SPAPR_VIO_TCE_PAGE_MASK) + 1); | |
372 | ||
373 | /* Check TCE */ | |
374 | if (!(tce & 1)) { | |
375 | return H_DEST_PARM; | |
376 | } | |
377 | ||
378 | /* Translate */ | |
379 | txaddr = (tce & ~SPAPR_VIO_TCE_PAGE_MASK) | | |
380 | (taddr & SPAPR_VIO_TCE_PAGE_MASK); | |
381 | ||
382 | #ifdef DEBUG_TCE | |
383 | fprintf(stderr, " -> write to txaddr=0x%llx, size=0x%x\n", | |
384 | (unsigned long long)txaddr, lsize); | |
385 | #endif | |
386 | /* Do it */ | |
387 | cpu_physical_memory_read(txaddr, buf, lsize); | |
388 | buf += lsize; | |
389 | taddr += lsize; | |
390 | size -= lsize; | |
391 | } | |
392 | return H_SUCCESS; | |
393 | } | |
394 | ||
395 | uint64_t ldq_tce(VIOsPAPRDevice *dev, uint64_t taddr) | |
396 | { | |
397 | uint64_t val; | |
398 | ||
399 | spapr_tce_dma_read(dev, taddr, &val, sizeof(val)); | |
400 | return tswap64(val); | |
401 | } | |
402 | ||
b45d63b6 BH |
403 | /* |
404 | * CRQ handling | |
405 | */ | |
e2684c0b | 406 | static target_ulong h_reg_crq(CPUPPCState *env, sPAPREnvironment *spapr, |
b45d63b6 BH |
407 | target_ulong opcode, target_ulong *args) |
408 | { | |
409 | target_ulong reg = args[0]; | |
410 | target_ulong queue_addr = args[1]; | |
411 | target_ulong queue_len = args[2]; | |
412 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
413 | ||
414 | if (!dev) { | |
d9599c92 | 415 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
416 | return H_PARAMETER; |
417 | } | |
418 | ||
419 | /* We can't grok a queue size bigger than 256M for now */ | |
420 | if (queue_len < 0x1000 || queue_len > 0x10000000) { | |
d9599c92 DG |
421 | hcall_dprintf("Queue size too small or too big (0x" TARGET_FMT_lx |
422 | ")\n", queue_len); | |
b45d63b6 BH |
423 | return H_PARAMETER; |
424 | } | |
425 | ||
426 | /* Check queue alignment */ | |
427 | if (queue_addr & 0xfff) { | |
d9599c92 | 428 | hcall_dprintf("Queue not aligned (0x" TARGET_FMT_lx ")\n", queue_addr); |
b45d63b6 BH |
429 | return H_PARAMETER; |
430 | } | |
431 | ||
432 | /* Check if device supports CRQs */ | |
433 | if (!dev->crq.SendFunc) { | |
434 | return H_NOT_FOUND; | |
435 | } | |
436 | ||
437 | ||
438 | /* Already a queue ? */ | |
439 | if (dev->crq.qsize) { | |
440 | return H_RESOURCE; | |
441 | } | |
442 | dev->crq.qladdr = queue_addr; | |
443 | dev->crq.qsize = queue_len; | |
444 | dev->crq.qnext = 0; | |
445 | ||
446 | dprintf("CRQ for dev 0x" TARGET_FMT_lx " registered at 0x" | |
447 | TARGET_FMT_lx "/0x" TARGET_FMT_lx "\n", | |
448 | reg, queue_addr, queue_len); | |
449 | return H_SUCCESS; | |
450 | } | |
451 | ||
e2684c0b | 452 | static target_ulong h_free_crq(CPUPPCState *env, sPAPREnvironment *spapr, |
b45d63b6 BH |
453 | target_ulong opcode, target_ulong *args) |
454 | { | |
455 | target_ulong reg = args[0]; | |
456 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
457 | ||
458 | if (!dev) { | |
d9599c92 | 459 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
460 | return H_PARAMETER; |
461 | } | |
462 | ||
463 | dev->crq.qladdr = 0; | |
464 | dev->crq.qsize = 0; | |
465 | dev->crq.qnext = 0; | |
466 | ||
467 | dprintf("CRQ for dev 0x" TARGET_FMT_lx " freed\n", reg); | |
468 | ||
469 | return H_SUCCESS; | |
470 | } | |
471 | ||
e2684c0b | 472 | static target_ulong h_send_crq(CPUPPCState *env, sPAPREnvironment *spapr, |
b45d63b6 BH |
473 | target_ulong opcode, target_ulong *args) |
474 | { | |
475 | target_ulong reg = args[0]; | |
476 | target_ulong msg_hi = args[1]; | |
477 | target_ulong msg_lo = args[2]; | |
478 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
479 | uint64_t crq_mangle[2]; | |
480 | ||
481 | if (!dev) { | |
d9599c92 | 482 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
483 | return H_PARAMETER; |
484 | } | |
485 | crq_mangle[0] = cpu_to_be64(msg_hi); | |
486 | crq_mangle[1] = cpu_to_be64(msg_lo); | |
487 | ||
488 | if (dev->crq.SendFunc) { | |
489 | return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle); | |
490 | } | |
491 | ||
492 | return H_HARDWARE; | |
493 | } | |
494 | ||
e2684c0b | 495 | static target_ulong h_enable_crq(CPUPPCState *env, sPAPREnvironment *spapr, |
b45d63b6 BH |
496 | target_ulong opcode, target_ulong *args) |
497 | { | |
498 | target_ulong reg = args[0]; | |
499 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
500 | ||
501 | if (!dev) { | |
d9599c92 | 502 | hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); |
b45d63b6 BH |
503 | return H_PARAMETER; |
504 | } | |
505 | ||
506 | return 0; | |
507 | } | |
508 | ||
509 | /* Returns negative error, 0 success, or positive: queue full */ | |
510 | int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq) | |
511 | { | |
512 | int rc; | |
513 | uint8_t byte; | |
514 | ||
515 | if (!dev->crq.qsize) { | |
516 | fprintf(stderr, "spapr_vio_send_creq on uninitialized queue\n"); | |
517 | return -1; | |
518 | } | |
519 | ||
520 | /* Maybe do a fast path for KVM just writing to the pages */ | |
521 | rc = spapr_tce_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1); | |
522 | if (rc) { | |
523 | return rc; | |
524 | } | |
525 | if (byte != 0) { | |
526 | return 1; | |
527 | } | |
528 | ||
529 | rc = spapr_tce_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8, | |
530 | &crq[8], 8); | |
531 | if (rc) { | |
532 | return rc; | |
533 | } | |
534 | ||
535 | kvmppc_eieio(); | |
536 | ||
537 | rc = spapr_tce_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8); | |
538 | if (rc) { | |
539 | return rc; | |
540 | } | |
541 | ||
542 | dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize; | |
543 | ||
544 | if (dev->signal_state & 1) { | |
545 | qemu_irq_pulse(dev->qirq); | |
546 | } | |
547 | ||
548 | return 0; | |
549 | } | |
550 | ||
08942ac1 BH |
551 | /* "quiesce" handling */ |
552 | ||
553 | static void spapr_vio_quiesce_one(VIOsPAPRDevice *dev) | |
554 | { | |
555 | dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS; | |
556 | ||
557 | if (dev->rtce_table) { | |
558 | size_t size = (dev->rtce_window_size >> SPAPR_VIO_TCE_PAGE_SHIFT) | |
559 | * sizeof(VIOsPAPR_RTCE); | |
560 | memset(dev->rtce_table, 0, size); | |
561 | } | |
562 | ||
563 | dev->crq.qladdr = 0; | |
564 | dev->crq.qsize = 0; | |
565 | dev->crq.qnext = 0; | |
566 | } | |
567 | ||
568 | static void rtas_set_tce_bypass(sPAPREnvironment *spapr, uint32_t token, | |
569 | uint32_t nargs, target_ulong args, | |
570 | uint32_t nret, target_ulong rets) | |
571 | { | |
572 | VIOsPAPRBus *bus = spapr->vio_bus; | |
573 | VIOsPAPRDevice *dev; | |
574 | uint32_t unit, enable; | |
575 | ||
576 | if (nargs != 2) { | |
577 | rtas_st(rets, 0, -3); | |
578 | return; | |
579 | } | |
580 | unit = rtas_ld(args, 0); | |
581 | enable = rtas_ld(args, 1); | |
582 | dev = spapr_vio_find_by_reg(bus, unit); | |
583 | if (!dev) { | |
584 | rtas_st(rets, 0, -3); | |
585 | return; | |
586 | } | |
587 | if (enable) { | |
588 | dev->flags |= VIO_PAPR_FLAG_DMA_BYPASS; | |
589 | } else { | |
590 | dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS; | |
591 | } | |
592 | ||
593 | rtas_st(rets, 0, 0); | |
594 | } | |
595 | ||
596 | static void rtas_quiesce(sPAPREnvironment *spapr, uint32_t token, | |
597 | uint32_t nargs, target_ulong args, | |
598 | uint32_t nret, target_ulong rets) | |
599 | { | |
600 | VIOsPAPRBus *bus = spapr->vio_bus; | |
601 | DeviceState *qdev; | |
602 | VIOsPAPRDevice *dev = NULL; | |
603 | ||
604 | if (nargs != 0) { | |
605 | rtas_st(rets, 0, -3); | |
606 | return; | |
607 | } | |
608 | ||
d8bb00d6 | 609 | QTAILQ_FOREACH(qdev, &bus->bus.children, sibling) { |
08942ac1 BH |
610 | dev = (VIOsPAPRDevice *)qdev; |
611 | spapr_vio_quiesce_one(dev); | |
612 | } | |
613 | ||
614 | rtas_st(rets, 0, 0); | |
615 | } | |
616 | ||
3954d33a | 617 | static int spapr_vio_check_reg(VIOsPAPRDevice *sdev) |
9fc380d3 ME |
618 | { |
619 | VIOsPAPRDevice *other_sdev; | |
620 | DeviceState *qdev; | |
621 | VIOsPAPRBus *sbus; | |
622 | ||
623 | sbus = DO_UPCAST(VIOsPAPRBus, bus, sdev->qdev.parent_bus); | |
624 | ||
625 | /* | |
626 | * Check two device aren't given clashing addresses by the user (or some | |
627 | * other mechanism). We have to open code this because we have to check | |
628 | * for matches with devices other than us. | |
629 | */ | |
630 | QTAILQ_FOREACH(qdev, &sbus->bus.children, sibling) { | |
631 | other_sdev = DO_UPCAST(VIOsPAPRDevice, qdev, qdev); | |
632 | ||
633 | if (other_sdev != sdev && other_sdev->reg == sdev->reg) { | |
634 | fprintf(stderr, "vio: %s and %s devices conflict at address %#x\n", | |
3954d33a AL |
635 | object_get_typename(OBJECT(sdev)), |
636 | object_get_typename(OBJECT(qdev)), | |
637 | sdev->reg); | |
9fc380d3 ME |
638 | return -EEXIST; |
639 | } | |
640 | } | |
641 | ||
642 | return 0; | |
643 | } | |
644 | ||
d307af79 | 645 | static int spapr_vio_busdev_init(DeviceState *qdev) |
4040ab72 | 646 | { |
4040ab72 | 647 | VIOsPAPRDevice *dev = (VIOsPAPRDevice *)qdev; |
3954d33a | 648 | VIOsPAPRDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
4040ab72 | 649 | char *id; |
9fc380d3 ME |
650 | int ret; |
651 | ||
3954d33a | 652 | ret = spapr_vio_check_reg(dev); |
9fc380d3 ME |
653 | if (ret) { |
654 | return ret; | |
655 | } | |
4040ab72 | 656 | |
1e34d859 ME |
657 | /* Don't overwrite ids assigned on the command line */ |
658 | if (!dev->qdev.id) { | |
659 | id = vio_format_dev_name(dev); | |
660 | if (!id) { | |
661 | return -1; | |
662 | } | |
663 | dev->qdev.id = id; | |
4040ab72 DG |
664 | } |
665 | ||
d07fee7e | 666 | dev->qirq = spapr_allocate_msi(dev->vio_irq_num, &dev->vio_irq_num); |
e6c866d4 DG |
667 | if (!dev->qirq) { |
668 | return -1; | |
416343b1 | 669 | } |
4040ab72 | 670 | |
ee86dfee DG |
671 | rtce_init(dev); |
672 | ||
3954d33a | 673 | return pc->init(dev); |
4040ab72 DG |
674 | } |
675 | ||
e2684c0b | 676 | static target_ulong h_vio_signal(CPUPPCState *env, sPAPREnvironment *spapr, |
00dc738d DG |
677 | target_ulong opcode, |
678 | target_ulong *args) | |
679 | { | |
680 | target_ulong reg = args[0]; | |
681 | target_ulong mode = args[1]; | |
682 | VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); | |
3954d33a | 683 | VIOsPAPRDeviceClass *pc; |
00dc738d DG |
684 | |
685 | if (!dev) { | |
686 | return H_PARAMETER; | |
687 | } | |
688 | ||
3954d33a | 689 | pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); |
00dc738d | 690 | |
3954d33a | 691 | if (mode & ~pc->signal_mask) { |
00dc738d DG |
692 | return H_PARAMETER; |
693 | } | |
694 | ||
695 | dev->signal_state = mode; | |
696 | ||
697 | return H_SUCCESS; | |
698 | } | |
699 | ||
4040ab72 DG |
700 | VIOsPAPRBus *spapr_vio_bus_init(void) |
701 | { | |
702 | VIOsPAPRBus *bus; | |
703 | BusState *qbus; | |
704 | DeviceState *dev; | |
4040ab72 DG |
705 | |
706 | /* Create bridge device */ | |
707 | dev = qdev_create(NULL, "spapr-vio-bridge"); | |
708 | qdev_init_nofail(dev); | |
709 | ||
710 | /* Create bus on bridge device */ | |
711 | ||
712 | qbus = qbus_create(&spapr_vio_bus_info, dev, "spapr-vio"); | |
713 | bus = DO_UPCAST(VIOsPAPRBus, bus, qbus); | |
714 | ||
00dc738d DG |
715 | /* hcall-vio */ |
716 | spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal); | |
717 | ||
ee86dfee DG |
718 | /* hcall-tce */ |
719 | spapr_register_hypercall(H_PUT_TCE, h_put_tce); | |
720 | ||
b45d63b6 BH |
721 | /* hcall-crq */ |
722 | spapr_register_hypercall(H_REG_CRQ, h_reg_crq); | |
723 | spapr_register_hypercall(H_FREE_CRQ, h_free_crq); | |
724 | spapr_register_hypercall(H_SEND_CRQ, h_send_crq); | |
725 | spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq); | |
726 | ||
08942ac1 BH |
727 | /* RTAS calls */ |
728 | spapr_rtas_register("ibm,set-tce-bypass", rtas_set_tce_bypass); | |
729 | spapr_rtas_register("quiesce", rtas_quiesce); | |
730 | ||
4040ab72 DG |
731 | return bus; |
732 | } | |
733 | ||
734 | /* Represents sPAPR hcall VIO devices */ | |
735 | ||
736 | static int spapr_vio_bridge_init(SysBusDevice *dev) | |
737 | { | |
738 | /* nothing */ | |
739 | return 0; | |
740 | } | |
741 | ||
999e12bb AL |
742 | static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data) |
743 | { | |
39bffca2 AL |
744 | DeviceClass *dc = DEVICE_CLASS(klass); |
745 | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); | |
999e12bb | 746 | |
39bffca2 AL |
747 | k->init = spapr_vio_bridge_init; |
748 | dc->no_user = 1; | |
999e12bb AL |
749 | } |
750 | ||
39bffca2 AL |
751 | static TypeInfo spapr_vio_bridge_info = { |
752 | .name = "spapr-vio-bridge", | |
753 | .parent = TYPE_SYS_BUS_DEVICE, | |
754 | .instance_size = sizeof(SysBusDevice), | |
755 | .class_init = spapr_vio_bridge_class_init, | |
4040ab72 DG |
756 | }; |
757 | ||
39bffca2 AL |
758 | static void vio_spapr_device_class_init(ObjectClass *klass, void *data) |
759 | { | |
760 | DeviceClass *k = DEVICE_CLASS(klass); | |
761 | k->init = spapr_vio_busdev_init; | |
762 | k->bus_info = &spapr_vio_bus_info; | |
763 | } | |
764 | ||
3954d33a AL |
765 | static TypeInfo spapr_vio_type_info = { |
766 | .name = TYPE_VIO_SPAPR_DEVICE, | |
767 | .parent = TYPE_DEVICE, | |
768 | .instance_size = sizeof(VIOsPAPRDevice), | |
769 | .abstract = true, | |
770 | .class_size = sizeof(VIOsPAPRDeviceClass), | |
39bffca2 | 771 | .class_init = vio_spapr_device_class_init, |
3954d33a AL |
772 | }; |
773 | ||
83f7d43a | 774 | static void spapr_vio_register_types(void) |
4040ab72 | 775 | { |
39bffca2 | 776 | type_register_static(&spapr_vio_bridge_info); |
3954d33a | 777 | type_register_static(&spapr_vio_type_info); |
4040ab72 DG |
778 | } |
779 | ||
83f7d43a | 780 | type_init(spapr_vio_register_types) |
4040ab72 DG |
781 | |
782 | #ifdef CONFIG_FDT | |
05c19438 DG |
783 | static int compare_reg(const void *p1, const void *p2) |
784 | { | |
785 | VIOsPAPRDevice const *dev1, *dev2; | |
786 | ||
787 | dev1 = (VIOsPAPRDevice *)*(DeviceState **)p1; | |
788 | dev2 = (VIOsPAPRDevice *)*(DeviceState **)p2; | |
789 | ||
790 | if (dev1->reg < dev2->reg) { | |
791 | return -1; | |
792 | } | |
793 | if (dev1->reg == dev2->reg) { | |
794 | return 0; | |
795 | } | |
796 | ||
797 | /* dev1->reg > dev2->reg */ | |
798 | return 1; | |
799 | } | |
800 | ||
4040ab72 DG |
801 | int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt) |
802 | { | |
05c19438 DG |
803 | DeviceState *qdev, **qdevs; |
804 | int i, num, ret = 0; | |
4040ab72 | 805 | |
05c19438 DG |
806 | /* Count qdevs on the bus list */ |
807 | num = 0; | |
d8bb00d6 | 808 | QTAILQ_FOREACH(qdev, &bus->bus.children, sibling) { |
05c19438 DG |
809 | num++; |
810 | } | |
811 | ||
812 | /* Copy out into an array of pointers */ | |
813 | qdevs = g_malloc(sizeof(qdev) * num); | |
814 | num = 0; | |
815 | QTAILQ_FOREACH(qdev, &bus->bus.children, sibling) { | |
816 | qdevs[num++] = qdev; | |
817 | } | |
818 | ||
819 | /* Sort the array */ | |
820 | qsort(qdevs, num, sizeof(qdev), compare_reg); | |
821 | ||
822 | /* Hack alert. Give the devices to libfdt in reverse order, we happen | |
823 | * to know that will mean they are in forward order in the tree. */ | |
824 | for (i = num - 1; i >= 0; i--) { | |
825 | VIOsPAPRDevice *dev = (VIOsPAPRDevice *)(qdevs[i]); | |
4040ab72 DG |
826 | |
827 | ret = vio_make_devnode(dev, fdt); | |
828 | ||
829 | if (ret < 0) { | |
05c19438 | 830 | goto out; |
4040ab72 DG |
831 | } |
832 | } | |
833 | ||
05c19438 DG |
834 | ret = 0; |
835 | out: | |
836 | free(qdevs); | |
837 | ||
838 | return ret; | |
4040ab72 | 839 | } |
68f3a94c DG |
840 | |
841 | int spapr_populate_chosen_stdout(void *fdt, VIOsPAPRBus *bus) | |
842 | { | |
843 | VIOsPAPRDevice *dev; | |
844 | char *name, *path; | |
845 | int ret, offset; | |
846 | ||
847 | dev = spapr_vty_get_default(bus); | |
848 | if (!dev) | |
849 | return 0; | |
850 | ||
851 | offset = fdt_path_offset(fdt, "/chosen"); | |
852 | if (offset < 0) { | |
853 | return offset; | |
854 | } | |
855 | ||
856 | name = vio_format_dev_name(dev); | |
857 | if (!name) { | |
858 | return -ENOMEM; | |
859 | } | |
860 | ||
861 | if (asprintf(&path, "/vdevice/%s", name) < 0) { | |
862 | path = NULL; | |
863 | ret = -ENOMEM; | |
864 | goto out; | |
865 | } | |
866 | ||
867 | ret = fdt_setprop_string(fdt, offset, "linux,stdout-path", path); | |
868 | out: | |
869 | free(name); | |
870 | free(path); | |
871 | ||
872 | return ret; | |
873 | } | |
4040ab72 | 874 | #endif /* CONFIG_FDT */ |