projects / mirror_qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| d0fb9657 | 1 | # See docs/devel/tracing.rst for syntax documentation. |
| 69520948 | 2 | |
| 500016e5 | 3 | # sun4u.c |
| 69520948 | 4 | ebus_isa_irq_handler(int n, int level) "Set ISA IRQ %d level %d" |
| 09ecbb78 | 5 | |
| 500016e5 | 6 | # sun4u_iommu.c |
| 09ecbb78 MCA |
7 | sun4u_iommu_mem_read(uint64_t addr, uint64_t val, int size) "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d" |
| 8 | sun4u_iommu_mem_write(uint64_t addr, uint64_t val, int size) "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d" | |
| 602c993a | 9 | sun4u_iommu_translate(uint64_t addr, uint64_t trans_addr, uint64_t tte) "xlate 0x%"PRIx64" => pa 0x%"PRIx64" tte: 0x%"PRIx64 |
| be75bbe2 | 10 | |
| 500016e5 | 11 | # sparc64.c |
| be75bbe2 MCA |
12 | sparc64_cpu_ivec_raise_irq(int irq) "Raise IVEC IRQ %d" |
| 13 | sparc64_cpu_ivec_lower_irq(int irq) "Lower IVEC IRQ %d" | |
| 14 | sparc64_cpu_tick_irq_disabled(void) "tick_irq: softint disabled" | |
| 15 | sparc64_cpu_tick_irq_fire(void) "tick_irq: fire" | |
| 16 | sparc64_cpu_stick_irq_disabled(void) "stick_irq: softint disabled" | |
| 17 | sparc64_cpu_stick_irq_fire(void) "stick_irq: fire" | |
| 18 | sparc64_cpu_hstick_irq_disabled(void) "hstick_irq: softint disabled" | |
| 19 | sparc64_cpu_hstick_irq_fire(void) "hstick_irq: fire" | |
| 20 | sparc64_cpu_tick_set_count(const char *name, uint64_t real_count, const char *npt, void *p) "%s set_count count=0x%"PRIx64" (npt %s) p=%p" | |
| 21 | sparc64_cpu_tick_get_count(const char *name, uint64_t real_count, const char *npt, void *p) "%s get_count count=0x%"PRIx64" (npt %s) p=%p" | |
| 22 | sparc64_cpu_tick_set_limit(const char *name, uint64_t real_limit, const char *dis, void *p, uint64_t limit, uint64_t t, uint64_t dt) "%s set_limit limit=0x%"PRIx64 " (%s) p=%p called with limit=0x%"PRIx64" at 0x%"PRIx64" (delta=0x%"PRIx64")" | |
| 23 | sparc64_cpu_tick_set_limit_zero(const char *name) "%s set_limit limit=ZERO - not starting timer" |