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1dfe3943
PB
1/*
2 * MAXIM DS1338 I2C RTC+NVRAM
3 *
4 * Copyright (c) 2009 CodeSourcery.
5 * Written by Paul Brook
6 *
8e31bf38 7 * This code is licensed under the GNU GPL v2.
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8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
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11 */
12
282bc81e 13#include "qemu/osdep.h"
4771d756 14#include "qemu-common.h"
0d09e41a 15#include "hw/i2c/i2c.h"
d6454270 16#include "migration/vmstate.h"
f348b6d1 17#include "qemu/bcd.h"
0b8fa32f 18#include "qemu/module.h"
1dfe3943 19
ba4906a9
PM
20/* Size of NVRAM including both the user-accessible area and the
21 * secondary register area.
22 */
23#define NVRAM_SIZE 64
24
95c93615
AM
25/* Flags definitions */
26#define SECONDS_CH 0x80
27#define HOURS_12 0x40
28#define HOURS_PM 0x20
29#define CTRL_OSF 0x20
30
59ab56b9
AF
31#define TYPE_DS1338 "ds1338"
32#define DS1338(obj) OBJECT_CHECK(DS1338State, (obj), TYPE_DS1338)
33
34typedef struct DS1338State {
35 I2CSlave parent_obj;
36
f4741402 37 int64_t offset;
871edc5f 38 uint8_t wday_offset;
ba4906a9 39 uint8_t nvram[NVRAM_SIZE];
f4741402
PM
40 int32_t ptr;
41 bool addr_byte;
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42} DS1338State;
43
f4741402
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44static const VMStateDescription vmstate_ds1338 = {
45 .name = "ds1338",
871edc5f 46 .version_id = 2,
f4741402 47 .minimum_version_id = 1,
f4741402 48 .fields = (VMStateField[]) {
59ab56b9 49 VMSTATE_I2C_SLAVE(parent_obj, DS1338State),
f4741402 50 VMSTATE_INT64(offset, DS1338State),
871edc5f 51 VMSTATE_UINT8_V(wday_offset, DS1338State, 2),
f4741402
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52 VMSTATE_UINT8_ARRAY(nvram, DS1338State, NVRAM_SIZE),
53 VMSTATE_INT32(ptr, DS1338State),
54 VMSTATE_BOOL(addr_byte, DS1338State),
55 VMSTATE_END_OF_LIST()
56 }
57};
58
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59static void capture_current_time(DS1338State *s)
60{
61 /* Capture the current time into the secondary registers
62 * which will be actually read by the data transfer operation.
63 */
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64 struct tm now;
65 qemu_get_timedate(&now, s->offset);
66 s->nvram[0] = to_bcd(now.tm_sec);
67 s->nvram[1] = to_bcd(now.tm_min);
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68 if (s->nvram[2] & HOURS_12) {
69 int tmp = now.tm_hour;
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70 if (tmp % 12 == 0) {
71 tmp += 12;
59dda8e0
AM
72 }
73 if (tmp <= 12) {
74 s->nvram[2] = HOURS_12 | to_bcd(tmp);
75 } else {
76 s->nvram[2] = HOURS_12 | HOURS_PM | to_bcd(tmp - 12);
35b87a86
PM
77 }
78 } else {
7f7fd0f2 79 s->nvram[2] = to_bcd(now.tm_hour);
35b87a86 80 }
871edc5f 81 s->nvram[3] = (now.tm_wday + s->wday_offset) % 7 + 1;
7f7fd0f2 82 s->nvram[4] = to_bcd(now.tm_mday);
580f5c00 83 s->nvram[5] = to_bcd(now.tm_mon + 1);
7f7fd0f2 84 s->nvram[6] = to_bcd(now.tm_year - 100);
35b87a86
PM
85}
86
87static void inc_regptr(DS1338State *s)
88{
89 /* The register pointer wraps around after 0x3F; wraparound
90 * causes the current time/date to be retransferred into
91 * the secondary registers.
92 */
93 s->ptr = (s->ptr + 1) & (NVRAM_SIZE - 1);
94 if (!s->ptr) {
95 capture_current_time(s);
96 }
97}
98
d307c28c 99static int ds1338_event(I2CSlave *i2c, enum i2c_event event)
1dfe3943 100{
59ab56b9 101 DS1338State *s = DS1338(i2c);
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102
103 switch (event) {
104 case I2C_START_RECV:
35b87a86
PM
105 /* In h/w, capture happens on any START condition, not just a
106 * START_RECV, but there is no need to actually capture on
107 * START_SEND, because the guest can't get at that data
108 * without going through a START_RECV which would overwrite it.
109 */
110 capture_current_time(s);
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111 break;
112 case I2C_START_SEND:
f4741402 113 s->addr_byte = true;
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114 break;
115 default:
116 break;
117 }
d307c28c
CM
118
119 return 0;
1dfe3943
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120}
121
2ac4c5f4 122static uint8_t ds1338_recv(I2CSlave *i2c)
1dfe3943 123{
59ab56b9 124 DS1338State *s = DS1338(i2c);
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125 uint8_t res;
126
127 res = s->nvram[s->ptr];
35b87a86 128 inc_regptr(s);
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129 return res;
130}
131
9e07bdf8 132static int ds1338_send(I2CSlave *i2c, uint8_t data)
1dfe3943 133{
59ab56b9
AF
134 DS1338State *s = DS1338(i2c);
135
1dfe3943 136 if (s->addr_byte) {
ba4906a9 137 s->ptr = data & (NVRAM_SIZE - 1);
f4741402 138 s->addr_byte = false;
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139 return 0;
140 }
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141 if (s->ptr < 7) {
142 /* Time register. */
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143 struct tm now;
144 qemu_get_timedate(&now, s->offset);
ba4906a9 145 switch(s->ptr) {
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146 case 0:
147 /* TODO: Implement CH (stop) bit. */
7f7fd0f2 148 now.tm_sec = from_bcd(data & 0x7f);
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149 break;
150 case 1:
7f7fd0f2 151 now.tm_min = from_bcd(data & 0x7f);
1dfe3943
PB
152 break;
153 case 2:
59dda8e0
AM
154 if (data & HOURS_12) {
155 int tmp = from_bcd(data & (HOURS_PM - 1));
156 if (data & HOURS_PM) {
157 tmp += 12;
158 }
5c78d6a8
AM
159 if (tmp % 12 == 0) {
160 tmp -= 12;
1dfe3943 161 }
59dda8e0 162 now.tm_hour = tmp;
1dfe3943 163 } else {
59dda8e0 164 now.tm_hour = from_bcd(data & (HOURS_12 - 1));
1dfe3943 165 }
1dfe3943
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166 break;
167 case 3:
871edc5f
AM
168 {
169 /* The day field is supposed to contain a value in
170 the range 1-7. Otherwise behavior is undefined.
171 */
172 int user_wday = (data & 7) - 1;
173 s->wday_offset = (user_wday - now.tm_wday + 7) % 7;
174 }
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175 break;
176 case 4:
7f7fd0f2 177 now.tm_mday = from_bcd(data & 0x3f);
1dfe3943
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178 break;
179 case 5:
7f7fd0f2 180 now.tm_mon = from_bcd(data & 0x1f) - 1;
fbac6a7d 181 break;
1dfe3943 182 case 6:
7f7fd0f2 183 now.tm_year = from_bcd(data) + 100;
1dfe3943 184 break;
1dfe3943 185 }
7f7fd0f2 186 s->offset = qemu_timedate_diff(&now);
996e91f0
AM
187 } else if (s->ptr == 7) {
188 /* Control register. */
189
190 /* Ensure bits 2, 3 and 6 will read back as zero. */
191 data &= 0xB3;
192
193 /* Attempting to write the OSF flag to logic 1 leaves the
194 value unchanged. */
195 data = (data & ~CTRL_OSF) | (data & s->nvram[s->ptr] & CTRL_OSF);
196
197 s->nvram[s->ptr] = data;
ba4906a9
PM
198 } else {
199 s->nvram[s->ptr] = data;
1dfe3943 200 }
35b87a86 201 inc_regptr(s);
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202 return 0;
203}
204
ed3d37d2
AM
205static void ds1338_reset(DeviceState *dev)
206{
59ab56b9 207 DS1338State *s = DS1338(dev);
ed3d37d2
AM
208
209 /* The clock is running and synchronized with the host */
210 s->offset = 0;
871edc5f 211 s->wday_offset = 0;
ed3d37d2
AM
212 memset(s->nvram, 0, NVRAM_SIZE);
213 s->ptr = 0;
214 s->addr_byte = false;
215}
216
b5ea9327
AL
217static void ds1338_class_init(ObjectClass *klass, void *data)
218{
f4741402 219 DeviceClass *dc = DEVICE_CLASS(klass);
b5ea9327
AL
220 I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
221
b5ea9327
AL
222 k->event = ds1338_event;
223 k->recv = ds1338_recv;
224 k->send = ds1338_send;
ed3d37d2 225 dc->reset = ds1338_reset;
f4741402 226 dc->vmsd = &vmstate_ds1338;
b5ea9327
AL
227}
228
8c43a6f0 229static const TypeInfo ds1338_info = {
59ab56b9 230 .name = TYPE_DS1338,
39bffca2
AL
231 .parent = TYPE_I2C_SLAVE,
232 .instance_size = sizeof(DS1338State),
233 .class_init = ds1338_class_init,
1dfe3943
PB
234};
235
83f7d43a 236static void ds1338_register_types(void)
1dfe3943 237{
39bffca2 238 type_register_static(&ds1338_info);
1dfe3943
PB
239}
240
83f7d43a 241type_init(ds1338_register_types)