projects / mirror_qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| c124c4d1 DG |
1 | /* |
| 2 | * QEMU M48T59 and M48T08 NVRAM emulation (common header) | |
| 3 | * | |
| 4 | * Copyright (c) 2003-2005, 2007 Jocelyn Mayer | |
| 5 | * Copyright (c) 2013 Hervé Poussineau | |
| 6 | * | |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
| 8 | * of this software and associated documentation files (the "Software"), to deal | |
| 9 | * in the Software without restriction, including without limitation the rights | |
| 10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
| 11 | * copies of the Software, and to permit persons to whom the Software is | |
| 12 | * furnished to do so, subject to the following conditions: | |
| 13 | * | |
| 14 | * The above copyright notice and this permission notice shall be included in | |
| 15 | * all copies or substantial portions of the Software. | |
| 16 | * | |
| 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
| 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
| 19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
| 20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
| 21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
| 22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
| 23 | * THE SOFTWARE. | |
| 24 | */ | |
| 25 | #ifndef HW_M48T59_INTERNAL_H | |
| 26 | #define HW_M48T59_INTERNAL_H 1 | |
| 27 | ||
| 28 | //#define DEBUG_NVRAM | |
| 29 | ||
| 30 | #if defined(DEBUG_NVRAM) | |
| 31 | #define NVRAM_PRINTF(fmt, ...) do { printf(fmt , ## __VA_ARGS__); } while (0) | |
| 32 | #else | |
| 33 | #define NVRAM_PRINTF(fmt, ...) do { } while (0) | |
| 34 | #endif | |
| 35 | ||
| 36 | /* | |
| 37 | * The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has | |
| 38 | * alarm and a watchdog timer and related control registers. In the | |
| 39 | * PPC platform there is also a nvram lock function. | |
| 40 | */ | |
| 41 | ||
| 42 | typedef struct M48txxInfo { | |
| 43 | const char *bus_name; | |
| 44 | uint32_t model; /* 2 = m48t02, 8 = m48t08, 59 = m48t59 */ | |
| 45 | uint32_t size; | |
| 46 | } M48txxInfo; | |
| 47 | ||
| 48 | typedef struct M48t59State { | |
| 49 | /* Hardware parameters */ | |
| 50 | qemu_irq IRQ; | |
| 51 | MemoryRegion iomem; | |
| 52 | uint32_t size; | |
| 53 | int32_t base_year; | |
| 54 | /* RTC management */ | |
| 55 | time_t time_offset; | |
| 56 | time_t stop_time; | |
| 57 | /* Alarm & watchdog */ | |
| 58 | struct tm alarm; | |
| 59 | QEMUTimer *alrm_timer; | |
| 60 | QEMUTimer *wd_timer; | |
| 61 | /* NVRAM storage */ | |
| 62 | uint8_t *buffer; | |
| 63 | /* Model parameters */ | |
| 64 | uint32_t model; /* 2 = m48t02, 8 = m48t08, 59 = m48t59 */ | |
| 65 | /* NVRAM storage */ | |
| 66 | uint16_t addr; | |
| 67 | uint8_t lock; | |
| 68 | } M48t59State; | |
| 69 | ||
| 70 | uint32_t m48t59_read(M48t59State *NVRAM, uint32_t addr); | |
| 71 | void m48t59_write(M48t59State *NVRAM, uint32_t addr, uint32_t val); | |
| 72 | void m48t59_reset_common(M48t59State *NVRAM); | |
| 73 | void m48t59_realize_common(M48t59State *s, Error **errp); | |
| 74 | ||
| 75 | static inline void m48t59_toggle_lock(M48t59State *NVRAM, int lock) | |
| 76 | { | |
| 77 | NVRAM->lock ^= 1 << lock; | |
| 78 | } | |
| 79 | ||
| 80 | extern const MemoryRegionOps m48t59_io_ops; | |
| 81 | ||
| 82 | #endif /* HW_M48T59_INTERNAL_H */ |