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[mirror_qemu.git] / hw / usb / hcd-ehci-pci.c
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1/*
2 * QEMU USB EHCI Emulation
3 *
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or(at your option) any later version.
8 *
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17
18#include "hw/usb/hcd-ehci.h"
1de7afc9 19#include "qemu/range.h"
0bf96f94 20
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21typedef struct EHCIPCIInfo {
22 const char *name;
23 uint16_t vendor_id;
24 uint16_t device_id;
25 uint8_t revision;
ec56214f 26 bool companion;
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27} EHCIPCIInfo;
28
9af21dbe 29static void usb_ehci_pci_realize(PCIDevice *dev, Error **errp)
0bf96f94 30{
5aa3ca9f 31 EHCIPCIState *i = PCI_EHCI(dev);
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32 EHCIState *s = &i->ehci;
33 uint8_t *pci_conf = dev->config;
34
35 pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);
36
37 /* capabilities pointer */
38 pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
39 /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */
40
41 pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */
42 pci_set_byte(&pci_conf[PCI_MIN_GNT], 0);
43 pci_set_byte(&pci_conf[PCI_MAX_LAT], 0);
44
45 /* pci_conf[0x50] = 0x01; *//* power management caps */
46
47 pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */
48 pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */
49 pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */
50
51 pci_conf[0x64] = 0x00;
52 pci_conf[0x65] = 0x00;
53 pci_conf[0x66] = 0x00;
54 pci_conf[0x67] = 0x00;
55 pci_conf[0x68] = 0x01;
56 pci_conf[0x69] = 0x00;
57 pci_conf[0x6a] = 0x00;
58 pci_conf[0x6b] = 0x00; /* USBLEGSUP */
59 pci_conf[0x6c] = 0x00;
60 pci_conf[0x6d] = 0x00;
61 pci_conf[0x6e] = 0x00;
62 pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */
63
9e64f8a3 64 s->irq = pci_allocate_irq(dev);
df32fd1c 65 s->as = pci_get_address_space(dev);
0bf96f94 66
08f4c90b 67 usb_ehci_realize(s, DEVICE(dev), NULL);
0bf96f94 68 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
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69}
70
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71static void usb_ehci_pci_init(Object *obj)
72{
ec56214f 73 DeviceClass *dc = OBJECT_GET_CLASS(DeviceClass, obj, TYPE_DEVICE);
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74 EHCIPCIState *i = PCI_EHCI(obj);
75 EHCIState *s = &i->ehci;
76
77 s->caps[0x09] = 0x68; /* EECP */
78
79 s->capsbase = 0x00;
80 s->opregbase = 0x20;
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81 s->portscbase = 0x44;
82 s->portnr = NB_PORTS;
d4614cc3 83
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84 if (!dc->hotpluggable) {
85 s->companion_enable = true;
86 }
87
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88 usb_ehci_init(s, DEVICE(obj));
89}
90
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91static void usb_ehci_pci_exit(PCIDevice *dev)
92{
93 EHCIPCIState *i = PCI_EHCI(dev);
94 EHCIState *s = &i->ehci;
95
96 usb_ehci_unrealize(s, DEVICE(dev), NULL);
97
98 if (s->irq) {
99 g_free(s->irq);
100 s->irq = NULL;
101 }
102}
103
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104static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr,
105 uint32_t val, int l)
106{
5aa3ca9f 107 EHCIPCIState *i = PCI_EHCI(dev);
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108 bool busmaster;
109
110 pci_default_write_config(dev, addr, val, l);
111
112 if (!range_covers_byte(addr, l, PCI_COMMAND)) {
113 return;
114 }
115 busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER;
df32fd1c 116 i->ehci.as = busmaster ? pci_get_address_space(dev) : &address_space_memory;
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117}
118
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119static Property ehci_pci_properties[] = {
120 DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128),
121 DEFINE_PROP_END_OF_LIST(),
122};
123
124static const VMStateDescription vmstate_ehci_pci = {
125 .name = "ehci",
126 .version_id = 2,
127 .minimum_version_id = 1,
6e3d652a 128 .fields = (VMStateField[]) {
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129 VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState),
130 VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState),
9d153047 131 VMSTATE_END_OF_LIST()
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132 }
133};
134
135static void ehci_class_init(ObjectClass *klass, void *data)
136{
137 DeviceClass *dc = DEVICE_CLASS(klass);
138 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
139
9af21dbe 140 k->realize = usb_ehci_pci_realize;
96e14926 141 k->exit = usb_ehci_pci_exit;
0bf96f94 142 k->class_id = PCI_CLASS_SERIAL_USB;
55903f1d 143 k->config_write = usb_ehci_pci_write_config;
9d153047 144 dc->vmsd = &vmstate_ehci_pci;
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145 dc->props = ehci_pci_properties;
146}
147
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148static const TypeInfo ehci_pci_type_info = {
149 .name = TYPE_PCI_EHCI,
150 .parent = TYPE_PCI_DEVICE,
151 .instance_size = sizeof(EHCIPCIState),
d4614cc3 152 .instance_init = usb_ehci_pci_init,
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153 .abstract = true,
154 .class_init = ehci_class_init,
155};
156
157static void ehci_data_class_init(ObjectClass *klass, void *data)
158{
159 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
125ee0ed 160 DeviceClass *dc = DEVICE_CLASS(klass);
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161 EHCIPCIInfo *i = data;
162
163 k->vendor_id = i->vendor_id;
164 k->device_id = i->device_id;
165 k->revision = i->revision;
125ee0ed 166 set_bit(DEVICE_CATEGORY_USB, dc->categories);
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167 if (i->companion) {
168 dc->hotpluggable = false;
169 }
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170}
171
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172static struct EHCIPCIInfo ehci_pci_info[] = {
173 {
174 .name = "usb-ehci",
175 .vendor_id = PCI_VENDOR_ID_INTEL,
176 .device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */
177 .revision = 0x10,
178 },{
ba07630c 179 .name = "ich9-usb-ehci1", /* 00:1d.7 */
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180 .vendor_id = PCI_VENDOR_ID_INTEL,
181 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1,
182 .revision = 0x03,
ec56214f 183 .companion = true,
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184 },{
185 .name = "ich9-usb-ehci2", /* 00:1a.7 */
186 .vendor_id = PCI_VENDOR_ID_INTEL,
187 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2,
188 .revision = 0x03,
ec56214f 189 .companion = true,
df013187 190 }
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191};
192
193static void ehci_pci_register_types(void)
194{
df013187 195 TypeInfo ehci_type_info = {
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196 .parent = TYPE_PCI_EHCI,
197 .class_init = ehci_data_class_init,
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198 };
199 int i;
200
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201 type_register_static(&ehci_pci_type_info);
202
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203 for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) {
204 ehci_type_info.name = ehci_pci_info[i].name;
205 ehci_type_info.class_data = ehci_pci_info + i;
206 type_register(&ehci_type_info);
207 }
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208}
209
210type_init(ehci_pci_register_types)
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211
212struct ehci_companions {
213 const char *name;
214 int func;
215 int port;
216};
217
218static const struct ehci_companions ich9_1d[] = {
219 { .name = "ich9-usb-uhci1", .func = 0, .port = 0 },
220 { .name = "ich9-usb-uhci2", .func = 1, .port = 2 },
221 { .name = "ich9-usb-uhci3", .func = 2, .port = 4 },
222};
223
224static const struct ehci_companions ich9_1a[] = {
225 { .name = "ich9-usb-uhci4", .func = 0, .port = 0 },
226 { .name = "ich9-usb-uhci5", .func = 1, .port = 2 },
227 { .name = "ich9-usb-uhci6", .func = 2, .port = 4 },
228};
229
230int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
231{
232 const struct ehci_companions *comp;
233 PCIDevice *ehci, *uhci;
234 BusState *usbbus;
235 const char *name;
236 int i;
237
238 switch (slot) {
239 case 0x1d:
240 name = "ich9-usb-ehci1";
241 comp = ich9_1d;
242 break;
243 case 0x1a:
244 name = "ich9-usb-ehci2";
245 comp = ich9_1a;
246 break;
247 default:
248 return -1;
249 }
250
251 ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name);
252 qdev_init_nofail(&ehci->qdev);
253 usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
254
255 for (i = 0; i < 3; i++) {
256 uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func),
257 true, comp[i].name);
258 qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
259 qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
260 qdev_init_nofail(&uhci->qdev);
261 }
262 return 0;
263}