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virtio: handle non-virtio-1-capable backend for ccw
[mirror_qemu.git] / hw / virtio / virtio-pci.c
CommitLineData
53c25cea
PB		 1/*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
6b620ca3
PB		 14 * Contributions after 2012-01-13 are licensed under the terms of the
15 * GNU GPL, version 2 or (at your option) any later version.
53c25cea
PB		 16 */
17
18#include <inttypes.h>
19
cbbe4f50 20#include "standard-headers/linux/virtio_pci.h"
0d09e41a
PB		 21#include "hw/virtio/virtio.h"
22#include "hw/virtio/virtio-blk.h"
23#include "hw/virtio/virtio-net.h"
24#include "hw/virtio/virtio-serial.h"
25#include "hw/virtio/virtio-scsi.h"
26#include "hw/virtio/virtio-balloon.h"
f958c8aa 27#include "hw/virtio/virtio-input.h"
83c9f4ca 28#include "hw/pci/pci.h"
1de7afc9 29#include "qemu/error-report.h"
83c9f4ca
PB		 30#include "hw/pci/msi.h"
31#include "hw/pci/msix.h"
32#include "hw/loader.h"
9c17d615 33#include "sysemu/kvm.h"
4be74634 34#include "sysemu/block-backend.h"
47b43a1f 35#include "virtio-pci.h"
1de7afc9 36#include "qemu/range.h"
0d09e41a 37#include "hw/virtio/virtio-bus.h"
24a6e7f4 38#include "qapi/visitor.h"
53c25cea 39
cbbe4f50 40#define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev))
aba800a3 41
c17bef33
MT		 42#undef VIRTIO_PCI_CONFIG
43
aba800a3
MT		 44/* The remaining space is defined by each driver as the per-driver
45 * configuration space */
cbbe4f50 46#define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev))
53c25cea 47
ac7af112
AF		 48static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
49 VirtIOPCIProxy *dev);
d51fcfac 50
53c25cea 51/* virtio device */
d2a0ccc6
MT		 52/* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */
53static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d)
54{
55 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
56}
53c25cea 57
d2a0ccc6
MT		 58/* DeviceState to VirtIOPCIProxy. Note: used on datapath,
59 * be careful and test performance if you change this.
60 */
61static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d)
53c25cea 62{
d2a0ccc6
MT		 63 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
64}
65
66static void virtio_pci_notify(DeviceState *d, uint16_t vector)
67{
68 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d);
a3fc66d9 69
aba800a3
MT		 70 if (msix_enabled(&proxy->pci_dev))
71 msix_notify(&proxy->pci_dev, vector);
a3fc66d9
PB		 72 else {
73 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
74 pci_set_irq(&proxy->pci_dev, vdev->isr & 1);
75 }
53c25cea
PB		 76}
77
d2a0ccc6 78static void virtio_pci_save_config(DeviceState *d, QEMUFile *f)
ff24bd58 79{
d2a0ccc6 80 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 81 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
82
ff24bd58
MT		 83 pci_device_save(&proxy->pci_dev, f);
84 msix_save(&proxy->pci_dev, f);
85 if (msix_present(&proxy->pci_dev))
a3fc66d9 86 qemu_put_be16(f, vdev->config_vector);
ff24bd58
MT		 87}
88
a6df8adf
JW		 89static void virtio_pci_load_modern_queue_state(VirtIOPCIQueue *vq,
90 QEMUFile *f)
91{
92 vq->num = qemu_get_be16(f);
93 vq->enabled = qemu_get_be16(f);
94 vq->desc[0] = qemu_get_be32(f);
95 vq->desc[1] = qemu_get_be32(f);
96 vq->avail[0] = qemu_get_be32(f);
97 vq->avail[1] = qemu_get_be32(f);
98 vq->used[0] = qemu_get_be32(f);
99 vq->used[1] = qemu_get_be32(f);
100}
101
102static bool virtio_pci_has_extra_state(DeviceState *d)
103{
104 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
105
106 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA;
107}
108
109static int get_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size)
110{
111 VirtIOPCIProxy *proxy = pv;
112 int i;
113
114 proxy->dfselect = qemu_get_be32(f);
115 proxy->gfselect = qemu_get_be32(f);
116 proxy->guest_features[0] = qemu_get_be32(f);
117 proxy->guest_features[1] = qemu_get_be32(f);
118 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
119 virtio_pci_load_modern_queue_state(&proxy->vqs[i], f);
120 }
121
122 return 0;
123}
124
125static void virtio_pci_save_modern_queue_state(VirtIOPCIQueue *vq,
126 QEMUFile *f)
127{
128 qemu_put_be16(f, vq->num);
129 qemu_put_be16(f, vq->enabled);
130 qemu_put_be32(f, vq->desc[0]);
131 qemu_put_be32(f, vq->desc[1]);
132 qemu_put_be32(f, vq->avail[0]);
133 qemu_put_be32(f, vq->avail[1]);
134 qemu_put_be32(f, vq->used[0]);
135 qemu_put_be32(f, vq->used[1]);
136}
137
138static void put_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size)
139{
140 VirtIOPCIProxy *proxy = pv;
141 int i;
142
143 qemu_put_be32(f, proxy->dfselect);
144 qemu_put_be32(f, proxy->gfselect);
145 qemu_put_be32(f, proxy->guest_features[0]);
146 qemu_put_be32(f, proxy->guest_features[1]);
147 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
148 virtio_pci_save_modern_queue_state(&proxy->vqs[i], f);
149 }
150}
151
152static const VMStateInfo vmstate_info_virtio_pci_modern_state = {
153 .name = "virtqueue_state",
154 .get = get_virtio_pci_modern_state,
155 .put = put_virtio_pci_modern_state,
156};
157
158static bool virtio_pci_modern_state_needed(void *opaque)
159{
160 VirtIOPCIProxy *proxy = opaque;
161
162 return !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_MODERN);
163}
164
165static const VMStateDescription vmstate_virtio_pci_modern_state = {
166 .name = "virtio_pci/modern_state",
167 .version_id = 1,
168 .minimum_version_id = 1,
169 .needed = &virtio_pci_modern_state_needed,
170 .fields = (VMStateField[]) {
171 {
172 .name = "modern_state",
173 .version_id = 0,
174 .field_exists = NULL,
175 .size = 0,
176 .info = &vmstate_info_virtio_pci_modern_state,
177 .flags = VMS_SINGLE,
178 .offset = 0,
179 },
180 VMSTATE_END_OF_LIST()
181 }
182};
183
184static const VMStateDescription vmstate_virtio_pci = {
185 .name = "virtio_pci",
186 .version_id = 1,
187 .minimum_version_id = 1,
188 .minimum_version_id_old = 1,
189 .fields = (VMStateField[]) {
190 VMSTATE_END_OF_LIST()
191 },
192 .subsections = (const VMStateDescription*[]) {
193 &vmstate_virtio_pci_modern_state,
194 NULL
195 }
196};
197
198static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f)
199{
200 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
201
202 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL);
203}
204
205static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f)
206{
207 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
208
209 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1);
210}
211
d2a0ccc6 212static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f)
ff24bd58 213{
d2a0ccc6 214 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 215 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
216
ff24bd58 217 if (msix_present(&proxy->pci_dev))
a3fc66d9 218 qemu_put_be16(f, virtio_queue_vector(vdev, n));
ff24bd58
MT		 219}
220
d2a0ccc6 221static int virtio_pci_load_config(DeviceState *d, QEMUFile *f)
ff24bd58 222{
d2a0ccc6 223 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 224 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
225
ff24bd58
MT		 226 int ret;
227 ret = pci_device_load(&proxy->pci_dev, f);
e6da7680 228 if (ret) {
ff24bd58 229 return ret;
e6da7680 230 }
3cac001e 231 msix_unuse_all_vectors(&proxy->pci_dev);
ff24bd58 232 msix_load(&proxy->pci_dev, f);
e6da7680 233 if (msix_present(&proxy->pci_dev)) {
a3fc66d9 234 qemu_get_be16s(f, &vdev->config_vector);
e6da7680 235 } else {
a3fc66d9 236 vdev->config_vector = VIRTIO_NO_VECTOR;
e6da7680 237 }
a3fc66d9
PB		 238 if (vdev->config_vector != VIRTIO_NO_VECTOR) {
239 return msix_vector_use(&proxy->pci_dev, vdev->config_vector);
e6da7680 240 }
ff24bd58
MT		 241 return 0;
242}
243
d2a0ccc6 244static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f)
ff24bd58 245{
d2a0ccc6 246 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 247 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
248
ff24bd58 249 uint16_t vector;
e6da7680
MT		 250 if (msix_present(&proxy->pci_dev)) {
251 qemu_get_be16s(f, &vector);
252 } else {
253 vector = VIRTIO_NO_VECTOR;
254 }
a3fc66d9 255 virtio_queue_set_vector(vdev, n, vector);
e6da7680
MT		 256 if (vector != VIRTIO_NO_VECTOR) {
257 return msix_vector_use(&proxy->pci_dev, vector);
258 }
a6df8adf 259
ff24bd58
MT		 260 return 0;
261}
262
975acc0a
JW		 263#define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000
264
25db9ebe 265static int virtio_pci_set_host_notifier_internal(VirtIOPCIProxy *proxy,
26b9b5fe 266 int n, bool assign, bool set_handler)
25db9ebe 267{
a3fc66d9
PB		 268 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
269 VirtQueue *vq = virtio_get_queue(vdev, n);
25db9ebe 270 EventNotifier *notifier = virtio_queue_get_host_notifier(vq);
975acc0a
JW		 271 bool legacy = !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_LEGACY);
272 bool modern = !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_MODERN);
bc85ccfd 273 bool fast_mmio = kvm_ioeventfd_any_length_enabled();
9824d2a3 274 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
588255ad 275 MemoryRegion *modern_mr = &proxy->notify.mr;
9824d2a3 276 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr;
975acc0a
JW		 277 MemoryRegion *legacy_mr = &proxy->bar;
278 hwaddr modern_addr = QEMU_VIRTIO_PCI_QUEUE_MEM_MULT *
279 virtio_get_queue_index(vq);
280 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY;
da146d0a
AK		 281 int r = 0;
282
25db9ebe
SH		 283 if (assign) {
284 r = event_notifier_init(notifier, 1);
285 if (r < 0) {
b36e3914
MT		 286 error_report("%s: unable to init event notifier: %d",
287 __func__, r);
25db9ebe
SH		 288 return r;
289 }
26b9b5fe 290 virtio_queue_set_host_notifier_fd_handler(vq, true, set_handler);
975acc0a 291 if (modern) {
bc85ccfd
JW		 292 if (fast_mmio) {
293 memory_region_add_eventfd(modern_mr, modern_addr, 0,
294 false, n, notifier);
295 } else {
296 memory_region_add_eventfd(modern_mr, modern_addr, 2,
297 false, n, notifier);
298 }
9824d2a3
JW		 299 if (modern_pio) {
300 memory_region_add_eventfd(modern_notify_mr, 0, 2,
301 true, n, notifier);
302 }
975acc0a
JW		 303 }
304 if (legacy) {
305 memory_region_add_eventfd(legacy_mr, legacy_addr, 2,
306 true, n, notifier);
307 }
25db9ebe 308 } else {
975acc0a 309 if (modern) {
bc85ccfd
JW		 310 if (fast_mmio) {
311 memory_region_del_eventfd(modern_mr, modern_addr, 0,
312 false, n, notifier);
313 } else {
314 memory_region_del_eventfd(modern_mr, modern_addr, 2,
315 false, n, notifier);
316 }
9824d2a3
JW		 317 if (modern_pio) {
318 memory_region_del_eventfd(modern_notify_mr, 0, 2,
319 true, n, notifier);
320 }
975acc0a
JW		 321 }
322 if (legacy) {
323 memory_region_del_eventfd(legacy_mr, legacy_addr, 2,
324 true, n, notifier);
325 }
26b9b5fe 326 virtio_queue_set_host_notifier_fd_handler(vq, false, false);
25db9ebe
SH		 327 event_notifier_cleanup(notifier);
328 }
329 return r;
330}
331
b36e3914 332static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy)
25db9ebe 333{
a3fc66d9 334 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
25db9ebe
SH		 335 int n, r;
336
337 if (!(proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) ||
338 proxy->ioeventfd_disabled ||
339 proxy->ioeventfd_started) {
b36e3914 340 return;
25db9ebe
SH		 341 }
342
87b3bd1c 343 for (n = 0; n < VIRTIO_QUEUE_MAX; n++) {
a3fc66d9 344 if (!virtio_queue_get_num(vdev, n)) {
25db9ebe
SH		 345 continue;
346 }
347
26b9b5fe 348 r = virtio_pci_set_host_notifier_internal(proxy, n, true, true);
25db9ebe
SH		 349 if (r < 0) {
350 goto assign_error;
351 }
25db9ebe
SH		 352 }
353 proxy->ioeventfd_started = true;
b36e3914 354 return;
25db9ebe
SH		 355
356assign_error:
357 while (--n >= 0) {
a3fc66d9 358 if (!virtio_queue_get_num(vdev, n)) {
25db9ebe
SH		 359 continue;
360 }
361
26b9b5fe 362 r = virtio_pci_set_host_notifier_internal(proxy, n, false, false);
b36e3914 363 assert(r >= 0);
25db9ebe
SH		 364 }
365 proxy->ioeventfd_started = false;
b36e3914 366 error_report("%s: failed. Fallback to a userspace (slower).", __func__);
25db9ebe
SH		 367}
368
b36e3914 369static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy)
25db9ebe 370{
a3fc66d9 371 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
b36e3914 372 int r;
25db9ebe
SH		 373 int n;
374
375 if (!proxy->ioeventfd_started) {
b36e3914 376 return;
25db9ebe
SH		 377 }
378
87b3bd1c 379 for (n = 0; n < VIRTIO_QUEUE_MAX; n++) {
a3fc66d9 380 if (!virtio_queue_get_num(vdev, n)) {
25db9ebe
SH		 381 continue;
382 }
383
26b9b5fe 384 r = virtio_pci_set_host_notifier_internal(proxy, n, false, false);
b36e3914 385 assert(r >= 0);
25db9ebe
SH		 386 }
387 proxy->ioeventfd_started = false;
25db9ebe
SH		 388}
389
53c25cea
PB		 390static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
391{
392 VirtIOPCIProxy *proxy = opaque;
a3fc66d9 393 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
a8170e5e 394 hwaddr pa;
53c25cea 395
53c25cea
PB		 396 switch (addr) {
397 case VIRTIO_PCI_GUEST_FEATURES:
181103cd
FK		 398 /* Guest does not negotiate properly? We have to assume nothing. */
399 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
400 val = virtio_bus_get_vdev_bad_features(&proxy->bus);
401 }
ad0c9332 402 virtio_set_features(vdev, val);
53c25cea
PB		 403 break;
404 case VIRTIO_PCI_QUEUE_PFN:
a8170e5e 405 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
1b8e9b27 406 if (pa == 0) {
25db9ebe 407 virtio_pci_stop_ioeventfd(proxy);
a3fc66d9 408 virtio_reset(vdev);
1b8e9b27
MT		 409 msix_unuse_all_vectors(&proxy->pci_dev);
410 }
7055e687
MT		 411 else
412 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
53c25cea
PB		 413 break;
414 case VIRTIO_PCI_QUEUE_SEL:
87b3bd1c 415 if (val < VIRTIO_QUEUE_MAX)
53c25cea
PB		 416 vdev->queue_sel = val;
417 break;
418 case VIRTIO_PCI_QUEUE_NOTIFY:
87b3bd1c 419 if (val < VIRTIO_QUEUE_MAX) {
7157e2e2
SH		 420 virtio_queue_notify(vdev, val);
421 }
53c25cea
PB		 422 break;
423 case VIRTIO_PCI_STATUS:
25db9ebe
SH		 424 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
425 virtio_pci_stop_ioeventfd(proxy);
426 }
427
3e607cb5 428 virtio_set_status(vdev, val & 0xFF);
25db9ebe
SH		 429
430 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
431 virtio_pci_start_ioeventfd(proxy);
432 }
433
1b8e9b27 434 if (vdev->status == 0) {
a3fc66d9 435 virtio_reset(vdev);
1b8e9b27
MT		 436 msix_unuse_all_vectors(&proxy->pci_dev);
437 }
c81131db 438
e43c0b2e
MT		 439 /* Linux before 2.6.34 drives the device without enabling
440 the PCI device bus master bit. Enable it automatically
441 for the guest. This is a PCI spec violation but so is
442 initiating DMA with bus master bit clear. */
443 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) {
444 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
445 proxy->pci_dev.config[PCI_COMMAND] |
446 PCI_COMMAND_MASTER, 1);
447 }
53c25cea 448 break;
aba800a3
MT		 449 case VIRTIO_MSI_CONFIG_VECTOR:
450 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
451 /* Make it possible for guest to discover an error took place. */
452 if (msix_vector_use(&proxy->pci_dev, val) < 0)
453 val = VIRTIO_NO_VECTOR;
454 vdev->config_vector = val;
455 break;
456 case VIRTIO_MSI_QUEUE_VECTOR:
457 msix_vector_unuse(&proxy->pci_dev,
458 virtio_queue_vector(vdev, vdev->queue_sel));
459 /* Make it possible for guest to discover an error took place. */
460 if (msix_vector_use(&proxy->pci_dev, val) < 0)
461 val = VIRTIO_NO_VECTOR;
462 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
463 break;
464 default:
4e02d460
SH		 465 error_report("%s: unexpected address 0x%x value 0x%x",
466 __func__, addr, val);
aba800a3 467 break;
53c25cea
PB		 468 }
469}
470
aba800a3 471static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
53c25cea 472{
a3fc66d9 473 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
53c25cea
PB		 474 uint32_t ret = 0xFFFFFFFF;
475
53c25cea
PB		 476 switch (addr) {
477 case VIRTIO_PCI_HOST_FEATURES:
6b8f1020 478 ret = vdev->host_features;
53c25cea
PB		 479 break;
480 case VIRTIO_PCI_GUEST_FEATURES:
704a76fc 481 ret = vdev->guest_features;
53c25cea
PB		 482 break;
483 case VIRTIO_PCI_QUEUE_PFN:
484 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
485 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
486 break;
487 case VIRTIO_PCI_QUEUE_NUM:
488 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
489 break;
490 case VIRTIO_PCI_QUEUE_SEL:
491 ret = vdev->queue_sel;
492 break;
493 case VIRTIO_PCI_STATUS:
494 ret = vdev->status;
495 break;
496 case VIRTIO_PCI_ISR:
497 /* reading from the ISR also clears it. */
498 ret = vdev->isr;
499 vdev->isr = 0;
9e64f8a3 500 pci_irq_deassert(&proxy->pci_dev);
53c25cea 501 break;
aba800a3
MT		 502 case VIRTIO_MSI_CONFIG_VECTOR:
503 ret = vdev->config_vector;
504 break;
505 case VIRTIO_MSI_QUEUE_VECTOR:
506 ret = virtio_queue_vector(vdev, vdev->queue_sel);
507 break;
53c25cea
PB		 508 default:
509 break;
510 }
511
512 return ret;
513}
514
df6db5b3
AG		 515static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr,
516 unsigned size)
53c25cea
PB		 517{
518 VirtIOPCIProxy *proxy = opaque;
a3fc66d9 519 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
cbbe4f50 520 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
df6db5b3 521 uint64_t val = 0;
aba800a3 522 if (addr < config) {
df6db5b3 523 return virtio_ioport_read(proxy, addr);
aba800a3
MT		 524 }
525 addr -= config;
53c25cea 526
df6db5b3
AG		 527 switch (size) {
528 case 1:
a3fc66d9 529 val = virtio_config_readb(vdev, addr);
df6db5b3
AG		 530 break;
531 case 2:
a3fc66d9 532 val = virtio_config_readw(vdev, addr);
616a6552 533 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 534 val = bswap16(val);
535 }
df6db5b3
AG		 536 break;
537 case 4:
a3fc66d9 538 val = virtio_config_readl(vdev, addr);
616a6552 539 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 540 val = bswap32(val);
541 }
df6db5b3 542 break;
82afa586 543 }
df6db5b3 544 return val;
53c25cea
PB		 545}
546
df6db5b3
AG		 547static void virtio_pci_config_write(void *opaque, hwaddr addr,
548 uint64_t val, unsigned size)
53c25cea
PB		 549{
550 VirtIOPCIProxy *proxy = opaque;
cbbe4f50 551 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
a3fc66d9 552 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
aba800a3
MT		 553 if (addr < config) {
554 virtio_ioport_write(proxy, addr, val);
555 return;
556 }
557 addr -= config;
df6db5b3
AG		 558 /*
559 * Virtio-PCI is odd. Ioports are LE but config space is target native
560 * endian.
561 */
562 switch (size) {
563 case 1:
a3fc66d9 564 virtio_config_writeb(vdev, addr, val);
df6db5b3
AG		 565 break;
566 case 2:
616a6552 567 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 568 val = bswap16(val);
569 }
a3fc66d9 570 virtio_config_writew(vdev, addr, val);
df6db5b3
AG		 571 break;
572 case 4:
616a6552 573 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 574 val = bswap32(val);
575 }
a3fc66d9 576 virtio_config_writel(vdev, addr, val);
df6db5b3 577 break;
82afa586 578 }
53c25cea
PB		 579}
580
da146d0a 581static const MemoryRegionOps virtio_pci_config_ops = {
df6db5b3
AG		 582 .read = virtio_pci_config_read,
583 .write = virtio_pci_config_write,
584 .impl = {
585 .min_access_size = 1,
586 .max_access_size = 4,
587 },
8e4a424b 588 .endianness = DEVICE_LITTLE_ENDIAN,
da146d0a 589};
aba800a3 590
1e40356c
MT		 591/* Below are generic functions to do memcpy from/to an address space,
592 * without byteswaps, with input validation.
593 *
594 * As regular address_space_* APIs all do some kind of byteswap at least for
595 * some host/target combinations, we are forced to explicitly convert to a
596 * known-endianness integer value.
597 * It doesn't really matter which endian format to go through, so the code
598 * below selects the endian that causes the least amount of work on the given
599 * host.
600 *
601 * Note: host pointer must be aligned.
602 */
603static
604void virtio_address_space_write(AddressSpace *as, hwaddr addr,
605 const uint8_t *buf, int len)
606{
607 uint32_t val;
608
609 /* address_space_* APIs assume an aligned address.
610 * As address is under guest control, handle illegal values.
611 */
612 addr &= ~(len - 1);
613
614 /* Make sure caller aligned buf properly */
615 assert(!(((uintptr_t)buf) & (len - 1)));
616
617 switch (len) {
618 case 1:
619 val = pci_get_byte(buf);
620 address_space_stb(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
621 break;
622 case 2:
623 val = pci_get_word(buf);
624 address_space_stw_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
625 break;
626 case 4:
627 val = pci_get_long(buf);
628 address_space_stl_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
629 break;
630 default:
631 /* As length is under guest control, handle illegal values. */
632 break;
633 }
634}
635
636static void
637virtio_address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len)
638{
639 uint32_t val;
640
641 /* address_space_* APIs assume an aligned address.
642 * As address is under guest control, handle illegal values.
643 */
644 addr &= ~(len - 1);
645
646 /* Make sure caller aligned buf properly */
647 assert(!(((uintptr_t)buf) & (len - 1)));
648
649 switch (len) {
650 case 1:
651 val = address_space_ldub(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
652 pci_set_byte(buf, val);
653 break;
654 case 2:
655 val = address_space_lduw_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
656 pci_set_word(buf, val);
657 break;
658 case 4:
659 val = address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
660 pci_set_long(buf, val);
661 break;
662 default:
663 /* As length is under guest control, handle illegal values. */
664 break;
665 }
666}
667
aba800a3
MT		 668static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
669 uint32_t val, int len)
670{
ed757e14 671 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
a3fc66d9 672 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
ada434cd 673 struct virtio_pci_cfg_cap *cfg;
ed757e14 674
1129714f
MT		 675 pci_default_write_config(pci_dev, address, val, len);
676
677 if (range_covers_byte(address, len, PCI_COMMAND) &&
68a27b20 678 !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
1129714f 679 virtio_pci_stop_ioeventfd(proxy);
45363e46 680 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
ed757e14 681 }
ada434cd
MT		 682
683 if (proxy->config_cap &&
684 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
685 pci_cfg_data),
686 sizeof cfg->pci_cfg_data)) {
687 uint32_t off;
688 uint32_t len;
689
690 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
691 off = le32_to_cpu(cfg->cap.offset);
692 len = le32_to_cpu(cfg->cap.length);
693
2a639123
MT		 694 if (len == 1 || len == 2 || len == 4) {
695 assert(len <= sizeof cfg->pci_cfg_data);
1e40356c
MT		 696 virtio_address_space_write(&proxy->modern_as, off,
697 cfg->pci_cfg_data, len);
ada434cd
MT		 698 }
699 }
700}
701
702static uint32_t virtio_read_config(PCIDevice *pci_dev,
703 uint32_t address, int len)
704{
705 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
706 struct virtio_pci_cfg_cap *cfg;
707
708 if (proxy->config_cap &&
709 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
710 pci_cfg_data),
711 sizeof cfg->pci_cfg_data)) {
712 uint32_t off;
713 uint32_t len;
714
715 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
716 off = le32_to_cpu(cfg->cap.offset);
717 len = le32_to_cpu(cfg->cap.length);
718
2a639123
MT		 719 if (len == 1 || len == 2 || len == 4) {
720 assert(len <= sizeof cfg->pci_cfg_data);
1e40356c
MT		 721 virtio_address_space_read(&proxy->modern_as, off,
722 cfg->pci_cfg_data, len);
ada434cd
MT		 723 }
724 }
725
726 return pci_default_read_config(pci_dev, address, len);
53c25cea
PB		 727}
728
7d37d351
JK		 729static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy,
730 unsigned int queue_no,
731 unsigned int vector,
732 MSIMessage msg)
733{
7d37d351 734 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
15b2bd18 735 int ret;
7d37d351
JK		 736
737 if (irqfd->users == 0) {
dc9f06ca 738 ret = kvm_irqchip_add_msi_route(kvm_state, msg, &proxy->pci_dev);
7d37d351
JK		 739 if (ret < 0) {
740 return ret;
741 }
742 irqfd->virq = ret;
743 }
744 irqfd->users++;
7d37d351
JK		 745 return 0;
746}
747
748static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy,
7d37d351 749 unsigned int vector)
774345f9
MT		 750{
751 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
752 if (--irqfd->users == 0) {
753 kvm_irqchip_release_virq(kvm_state, irqfd->virq);
754 }
755}
756
f1d0f15a
MT		 757static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy,
758 unsigned int queue_no,
759 unsigned int vector)
760{
761 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
a3fc66d9
PB		 762 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
763 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
f1d0f15a
MT		 764 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
765 int ret;
1c9b71a7 766 ret = kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq);
f1d0f15a
MT		 767 return ret;
768}
769
770static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy,
771 unsigned int queue_no,
772 unsigned int vector)
7d37d351 773{
a3fc66d9
PB		 774 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
775 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
15b2bd18 776 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
7d37d351 777 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
15b2bd18 778 int ret;
7d37d351 779
1c9b71a7 780 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq);
7d37d351 781 assert(ret == 0);
f1d0f15a 782}
7d37d351 783
774345f9
MT		 784static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs)
785{
786 PCIDevice *dev = &proxy->pci_dev;
a3fc66d9 787 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
181103cd 788 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
774345f9
MT		 789 unsigned int vector;
790 int ret, queue_no;
791 MSIMessage msg;
792
793 for (queue_no = 0; queue_no < nvqs; queue_no++) {
794 if (!virtio_queue_get_num(vdev, queue_no)) {
795 break;
796 }
797 vector = virtio_queue_vector(vdev, queue_no);
798 if (vector >= msix_nr_vectors_allocated(dev)) {
799 continue;
800 }
801 msg = msix_get_message(dev, vector);
802 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector, msg);
803 if (ret < 0) {
804 goto undo;
7d37d351 805 }
f1d0f15a
MT		 806 /* If guest supports masking, set up irqfd now.
807 * Otherwise, delay until unmasked in the frontend.
808 */
181103cd 809 if (k->guest_notifier_mask) {
f1d0f15a
MT		 810 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
811 if (ret < 0) {
812 kvm_virtio_pci_vq_vector_release(proxy, vector);
813 goto undo;
814 }
815 }
7d37d351 816 }
7d37d351 817 return 0;
774345f9
MT		 818
819undo:
820 while (--queue_no >= 0) {
821 vector = virtio_queue_vector(vdev, queue_no);
822 if (vector >= msix_nr_vectors_allocated(dev)) {
823 continue;
824 }
181103cd 825 if (k->guest_notifier_mask) {
e387f99e 826 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 827 }
774345f9
MT		 828 kvm_virtio_pci_vq_vector_release(proxy, vector);
829 }
830 return ret;
7d37d351
JK		 831}
832
774345f9
MT		 833static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs)
834{
835 PCIDevice *dev = &proxy->pci_dev;
a3fc66d9 836 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
774345f9
MT		 837 unsigned int vector;
838 int queue_no;
181103cd 839 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
774345f9
MT		 840
841 for (queue_no = 0; queue_no < nvqs; queue_no++) {
842 if (!virtio_queue_get_num(vdev, queue_no)) {
843 break;
844 }
845 vector = virtio_queue_vector(vdev, queue_no);
846 if (vector >= msix_nr_vectors_allocated(dev)) {
847 continue;
848 }
f1d0f15a
MT		 849 /* If guest supports masking, clean up irqfd now.
850 * Otherwise, it was cleaned when masked in the frontend.
851 */
181103cd 852 if (k->guest_notifier_mask) {
e387f99e 853 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 854 }
774345f9
MT		 855 kvm_virtio_pci_vq_vector_release(proxy, vector);
856 }
857}
858
a38b2c49
MT		 859static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy,
860 unsigned int queue_no,
861 unsigned int vector,
862 MSIMessage msg)
774345f9 863{
a3fc66d9
PB		 864 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
865 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
866 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
774345f9 867 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
a38b2c49 868 VirtIOIRQFD *irqfd;
53510bfc 869 int ret = 0;
774345f9 870
a38b2c49
MT		 871 if (proxy->vector_irqfd) {
872 irqfd = &proxy->vector_irqfd[vector];
873 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) {
dc9f06ca
PF		 874 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg,
875 &proxy->pci_dev);
a38b2c49
MT		 876 if (ret < 0) {
877 return ret;
878 }
774345f9
MT		 879 }
880 }
881
f1d0f15a
MT		 882 /* If guest supports masking, irqfd is already setup, unmask it.
883 * Otherwise, set it up now.
884 */
181103cd 885 if (k->guest_notifier_mask) {
a3fc66d9 886 k->guest_notifier_mask(vdev, queue_no, false);
f1d0f15a 887 /* Test after unmasking to avoid losing events. */
181103cd 888 if (k->guest_notifier_pending &&
a3fc66d9 889 k->guest_notifier_pending(vdev, queue_no)) {
f1d0f15a
MT		 890 event_notifier_set(n);
891 }
892 } else {
893 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
7d37d351 894 }
774345f9 895 return ret;
7d37d351
JK		 896}
897
a38b2c49 898static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy,
7d37d351
JK		 899 unsigned int queue_no,
900 unsigned int vector)
901{
a3fc66d9
PB		 902 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
903 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
181103cd 904
f1d0f15a
MT		 905 /* If guest supports masking, keep irqfd but mask it.
906 * Otherwise, clean it up now.
907 */
181103cd 908 if (k->guest_notifier_mask) {
a3fc66d9 909 k->guest_notifier_mask(vdev, queue_no, true);
f1d0f15a 910 } else {
e387f99e 911 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 912 }
7d37d351
JK		 913}
914
a38b2c49
MT		 915static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector,
916 MSIMessage msg)
7d37d351
JK		 917{
918 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
a3fc66d9 919 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
851c2a75
JW		 920 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
921 int ret, index, unmasked = 0;
7d37d351 922
851c2a75
JW		 923 while (vq) {
924 index = virtio_get_queue_index(vq);
925 if (!virtio_queue_get_num(vdev, index)) {
7d37d351
JK		 926 break;
927 }
6652d081
JW		 928 if (index < proxy->nvqs_with_notifiers) {
929 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg);
930 if (ret < 0) {
931 goto undo;
932 }
933 ++unmasked;
7d37d351 934 }
851c2a75 935 vq = virtio_vector_next_queue(vq);
7d37d351 936 }
851c2a75 937
7d37d351
JK		 938 return 0;
939
940undo:
851c2a75 941 vq = virtio_vector_first_queue(vdev, vector);
6652d081 942 while (vq && unmasked >= 0) {
851c2a75 943 index = virtio_get_queue_index(vq);
6652d081
JW		 944 if (index < proxy->nvqs_with_notifiers) {
945 virtio_pci_vq_vector_mask(proxy, index, vector);
946 --unmasked;
947 }
851c2a75 948 vq = virtio_vector_next_queue(vq);
7d37d351
JK		 949 }
950 return ret;
951}
952
a38b2c49 953static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector)
7d37d351
JK		 954{
955 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
a3fc66d9 956 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
851c2a75
JW		 957 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
958 int index;
7d37d351 959
851c2a75
JW		 960 while (vq) {
961 index = virtio_get_queue_index(vq);
962 if (!virtio_queue_get_num(vdev, index)) {
7d37d351
JK		 963 break;
964 }
6652d081
JW		 965 if (index < proxy->nvqs_with_notifiers) {
966 virtio_pci_vq_vector_mask(proxy, index, vector);
967 }
851c2a75 968 vq = virtio_vector_next_queue(vq);
7d37d351
JK		 969 }
970}
971
a38b2c49
MT		 972static void virtio_pci_vector_poll(PCIDevice *dev,
973 unsigned int vector_start,
974 unsigned int vector_end)
89d62be9
MT		 975{
976 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
a3fc66d9 977 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
181103cd 978 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
89d62be9
MT		 979 int queue_no;
980 unsigned int vector;
981 EventNotifier *notifier;
982 VirtQueue *vq;
983
2d620f59 984 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
89d62be9
MT		 985 if (!virtio_queue_get_num(vdev, queue_no)) {
986 break;
987 }
988 vector = virtio_queue_vector(vdev, queue_no);
989 if (vector < vector_start || vector >= vector_end ||
990 !msix_is_masked(dev, vector)) {
991 continue;
992 }
993 vq = virtio_get_queue(vdev, queue_no);
994 notifier = virtio_queue_get_guest_notifier(vq);
181103cd
FK		 995 if (k->guest_notifier_pending) {
996 if (k->guest_notifier_pending(vdev, queue_no)) {
f1d0f15a
MT		 997 msix_set_pending(dev, vector);
998 }
999 } else if (event_notifier_test_and_clear(notifier)) {
89d62be9
MT		 1000 msix_set_pending(dev, vector);
1001 }
1002 }
1003}
1004
1005static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign,
1006 bool with_irqfd)
ade80dc8 1007{
d2a0ccc6 1008 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 1009 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1010 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
1011 VirtQueue *vq = virtio_get_queue(vdev, n);
ade80dc8
MT		 1012 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq);
1013
1014 if (assign) {
1015 int r = event_notifier_init(notifier, 0);
1016 if (r < 0) {
1017 return r;
1018 }
89d62be9 1019 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd);
ade80dc8 1020 } else {
89d62be9 1021 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd);
ade80dc8
MT		 1022 event_notifier_cleanup(notifier);
1023 }
1024
62c96360 1025 if (!msix_enabled(&proxy->pci_dev) && vdc->guest_notifier_mask) {
a3fc66d9 1026 vdc->guest_notifier_mask(vdev, n, !assign);
62c96360
MT		 1027 }
1028
ade80dc8
MT		 1029 return 0;
1030}
1031
d2a0ccc6 1032static bool virtio_pci_query_guest_notifiers(DeviceState *d)
5430a28f 1033{
d2a0ccc6 1034 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
5430a28f
MT		 1035 return msix_enabled(&proxy->pci_dev);
1036}
1037
2d620f59 1038static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign)
54dd9321 1039{
d2a0ccc6 1040 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9 1041 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
181103cd 1042 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
54dd9321 1043 int r, n;
89d62be9
MT		 1044 bool with_irqfd = msix_enabled(&proxy->pci_dev) &&
1045 kvm_msi_via_irqfd_enabled();
54dd9321 1046
87b3bd1c 1047 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX);
2d620f59
MT		 1048
1049 /* When deassigning, pass a consistent nvqs value
1050 * to avoid leaking notifiers.
1051 */
1052 assert(assign || nvqs == proxy->nvqs_with_notifiers);
1053
1054 proxy->nvqs_with_notifiers = nvqs;
1055
7d37d351 1056 /* Must unset vector notifier while guest notifier is still assigned */
181103cd 1057 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) {
7d37d351 1058 msix_unset_vector_notifiers(&proxy->pci_dev);
a38b2c49
MT		 1059 if (proxy->vector_irqfd) {
1060 kvm_virtio_pci_vector_release(proxy, nvqs);
1061 g_free(proxy->vector_irqfd);
1062 proxy->vector_irqfd = NULL;
1063 }
7d37d351
JK		 1064 }
1065
2d620f59 1066 for (n = 0; n < nvqs; n++) {
54dd9321
MT		 1067 if (!virtio_queue_get_num(vdev, n)) {
1068 break;
1069 }
1070
23fe2b3f 1071 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd);
54dd9321
MT		 1072 if (r < 0) {
1073 goto assign_error;
1074 }
1075 }
1076
7d37d351 1077 /* Must set vector notifier after guest notifier has been assigned */
181103cd 1078 if ((with_irqfd || k->guest_notifier_mask) && assign) {
a38b2c49
MT		 1079 if (with_irqfd) {
1080 proxy->vector_irqfd =
1081 g_malloc0(sizeof(*proxy->vector_irqfd) *
1082 msix_nr_vectors_allocated(&proxy->pci_dev));
1083 r = kvm_virtio_pci_vector_use(proxy, nvqs);
1084 if (r < 0) {
1085 goto assign_error;
1086 }
774345f9 1087 }
7d37d351 1088 r = msix_set_vector_notifiers(&proxy->pci_dev,
a38b2c49
MT		 1089 virtio_pci_vector_unmask,
1090 virtio_pci_vector_mask,
1091 virtio_pci_vector_poll);
7d37d351 1092 if (r < 0) {
774345f9 1093 goto notifiers_error;
7d37d351
JK		 1094 }
1095 }
1096
54dd9321
MT		 1097 return 0;
1098
774345f9 1099notifiers_error:
a38b2c49
MT		 1100 if (with_irqfd) {
1101 assert(assign);
1102 kvm_virtio_pci_vector_release(proxy, nvqs);
1103 }
774345f9 1104
54dd9321
MT		 1105assign_error:
1106 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */
7d37d351 1107 assert(assign);
54dd9321 1108 while (--n >= 0) {
89d62be9 1109 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd);
54dd9321
MT		 1110 }
1111 return r;
1112}
1113
d2a0ccc6 1114static int virtio_pci_set_host_notifier(DeviceState *d, int n, bool assign)
ade80dc8 1115{
d2a0ccc6 1116 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
25db9ebe
SH		 1117
1118 /* Stop using ioeventfd for virtqueue kick if the device starts using host
1119 * notifiers. This makes it easy to avoid stepping on each others' toes.
1120 */
1121 proxy->ioeventfd_disabled = assign;
ade80dc8 1122 if (assign) {
25db9ebe
SH		 1123 virtio_pci_stop_ioeventfd(proxy);
1124 }
1125 /* We don't need to start here: it's not needed because backend
1126 * currently only stops on status change away from ok,
1127 * reset, vmstop and such. If we do add code to start here,
1128 * need to check vmstate, device state etc. */
26b9b5fe 1129 return virtio_pci_set_host_notifier_internal(proxy, n, assign, false);
25db9ebe
SH		 1130}
1131
d2a0ccc6 1132static void virtio_pci_vmstate_change(DeviceState *d, bool running)
25db9ebe 1133{
d2a0ccc6 1134 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9 1135 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
25db9ebe
SH		 1136
1137 if (running) {
68a27b20
MT		 1138 /* Old QEMU versions did not set bus master enable on status write.
1139 * Detect DRIVER set and enable it.
1140 */
1141 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) &&
1142 (vdev->status & VIRTIO_CONFIG_S_DRIVER) &&
45363e46 1143 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
68a27b20
MT		 1144 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
1145 proxy->pci_dev.config[PCI_COMMAND] |
1146 PCI_COMMAND_MASTER, 1);
89c473fd 1147 }
25db9ebe 1148 virtio_pci_start_ioeventfd(proxy);
ade80dc8 1149 } else {
25db9ebe 1150 virtio_pci_stop_ioeventfd(proxy);
ade80dc8 1151 }
ade80dc8
MT		 1152}
1153
60653b28 1154#ifdef CONFIG_VIRTFS
fc079951 1155static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
60653b28 1156{
234a336f
FK		 1157 V9fsPCIState *dev = VIRTIO_9P_PCI(vpci_dev);
1158 DeviceState *vdev = DEVICE(&dev->vdev);
60653b28 1159
234a336f 1160 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 1161 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
60653b28
PB		 1162}
1163
234a336f
FK		 1164static Property virtio_9p_pci_properties[] = {
1165 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1166 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
60653b28 1167 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
60653b28
PB		 1168 DEFINE_PROP_END_OF_LIST(),
1169};
1170
234a336f 1171static void virtio_9p_pci_class_init(ObjectClass *klass, void *data)
60653b28
PB		 1172{
1173 DeviceClass *dc = DEVICE_CLASS(klass);
234a336f
FK		 1174 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
1175 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
60653b28 1176
fc079951 1177 k->realize = virtio_9p_pci_realize;
234a336f
FK		 1178 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1179 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_9P;
1180 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
1181 pcidev_k->class_id = 0x2;
125ee0ed 1182 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
234a336f 1183 dc->props = virtio_9p_pci_properties;
60653b28
PB		 1184}
1185
234a336f
FK		 1186static void virtio_9p_pci_instance_init(Object *obj)
1187{
1188 V9fsPCIState *dev = VIRTIO_9P_PCI(obj);
c8075caf
GA		 1189
1190 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
1191 TYPE_VIRTIO_9P);
234a336f
FK		 1192}
1193
1194static const TypeInfo virtio_9p_pci_info = {
1195 .name = TYPE_VIRTIO_9P_PCI,
1196 .parent = TYPE_VIRTIO_PCI,
1197 .instance_size = sizeof(V9fsPCIState),
1198 .instance_init = virtio_9p_pci_instance_init,
1199 .class_init = virtio_9p_pci_class_init,
60653b28 1200};
234a336f 1201#endif /* CONFIG_VIRTFS */
60653b28 1202
085bccb7
FK		 1203/*
1204 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus.
1205 */
1206
e0d686bf
JW		 1207static int virtio_pci_query_nvectors(DeviceState *d)
1208{
1209 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1210
1211 return proxy->nvectors;
1212}
1213
ada434cd 1214static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
dfb8e184
MT		 1215 struct virtio_pci_cap *cap)
1216{
1217 PCIDevice *dev = &proxy->pci_dev;
1218 int offset;
1219
dfb8e184
MT		 1220 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0, cap->cap_len);
1221 assert(offset > 0);
1222
1223 assert(cap->cap_len >= sizeof *cap);
1224 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len,
1225 cap->cap_len - PCI_CAP_FLAGS);
ada434cd
MT		 1226
1227 return offset;
dfb8e184
MT		 1228}
1229
dfb8e184
MT		 1230static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
1231 unsigned size)
1232{
1233 VirtIOPCIProxy *proxy = opaque;
1234 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1235 uint32_t val = 0;
1236 int i;
1237
1238 switch (addr) {
1239 case VIRTIO_PCI_COMMON_DFSELECT:
1240 val = proxy->dfselect;
1241 break;
1242 case VIRTIO_PCI_COMMON_DF:
1243 if (proxy->dfselect <= 1) {
5f456073
MT		 1244 val = (vdev->host_features & ~VIRTIO_LEGACY_FEATURES) >>
1245 (32 * proxy->dfselect);
dfb8e184
MT		 1246 }
1247 break;
1248 case VIRTIO_PCI_COMMON_GFSELECT:
1249 val = proxy->gfselect;
1250 break;
1251 case VIRTIO_PCI_COMMON_GF:
3750dabc 1252 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
dfb8e184
MT		 1253 val = proxy->guest_features[proxy->gfselect];
1254 }
1255 break;
1256 case VIRTIO_PCI_COMMON_MSIX:
1257 val = vdev->config_vector;
1258 break;
1259 case VIRTIO_PCI_COMMON_NUMQ:
1260 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) {
1261 if (virtio_queue_get_num(vdev, i)) {
1262 val = i + 1;
1263 }
1264 }
1265 break;
1266 case VIRTIO_PCI_COMMON_STATUS:
1267 val = vdev->status;
1268 break;
1269 case VIRTIO_PCI_COMMON_CFGGENERATION:
b8f05908 1270 val = vdev->generation;
dfb8e184
MT		 1271 break;
1272 case VIRTIO_PCI_COMMON_Q_SELECT:
1273 val = vdev->queue_sel;
1274 break;
1275 case VIRTIO_PCI_COMMON_Q_SIZE:
1276 val = virtio_queue_get_num(vdev, vdev->queue_sel);
1277 break;
1278 case VIRTIO_PCI_COMMON_Q_MSIX:
1279 val = virtio_queue_vector(vdev, vdev->queue_sel);
1280 break;
1281 case VIRTIO_PCI_COMMON_Q_ENABLE:
1282 val = proxy->vqs[vdev->queue_sel].enabled;
1283 break;
1284 case VIRTIO_PCI_COMMON_Q_NOFF:
1285 /* Simply map queues in order */
1286 val = vdev->queue_sel;
1287 break;
1288 case VIRTIO_PCI_COMMON_Q_DESCLO:
1289 val = proxy->vqs[vdev->queue_sel].desc[0];
1290 break;
1291 case VIRTIO_PCI_COMMON_Q_DESCHI:
1292 val = proxy->vqs[vdev->queue_sel].desc[1];
1293 break;
1294 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1295 val = proxy->vqs[vdev->queue_sel].avail[0];
1296 break;
1297 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1298 val = proxy->vqs[vdev->queue_sel].avail[1];
1299 break;
1300 case VIRTIO_PCI_COMMON_Q_USEDLO:
1301 val = proxy->vqs[vdev->queue_sel].used[0];
1302 break;
1303 case VIRTIO_PCI_COMMON_Q_USEDHI:
1304 val = proxy->vqs[vdev->queue_sel].used[1];
1305 break;
1306 default:
1307 val = 0;
1308 }
1309
1310 return val;
1311}
1312
1313static void virtio_pci_common_write(void *opaque, hwaddr addr,
1314 uint64_t val, unsigned size)
1315{
1316 VirtIOPCIProxy *proxy = opaque;
1317 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1318
1319 switch (addr) {
1320 case VIRTIO_PCI_COMMON_DFSELECT:
1321 proxy->dfselect = val;
1322 break;
1323 case VIRTIO_PCI_COMMON_GFSELECT:
1324 proxy->gfselect = val;
1325 break;
1326 case VIRTIO_PCI_COMMON_GF:
3750dabc 1327 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
dfb8e184
MT		 1328 proxy->guest_features[proxy->gfselect] = val;
1329 virtio_set_features(vdev,
1330 (((uint64_t)proxy->guest_features[1]) << 32) |
1331 proxy->guest_features[0]);
1332 }
1333 break;
1334 case VIRTIO_PCI_COMMON_MSIX:
1335 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
1336 /* Make it possible for guest to discover an error took place. */
1337 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1338 val = VIRTIO_NO_VECTOR;
1339 }
1340 vdev->config_vector = val;
1341 break;
1342 case VIRTIO_PCI_COMMON_STATUS:
1343 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
1344 virtio_pci_stop_ioeventfd(proxy);
1345 }
1346
1347 virtio_set_status(vdev, val & 0xFF);
1348
1349 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
1350 virtio_pci_start_ioeventfd(proxy);
1351 }
1352
1353 if (vdev->status == 0) {
1354 virtio_reset(vdev);
1355 msix_unuse_all_vectors(&proxy->pci_dev);
1356 }
1357
1358 break;
1359 case VIRTIO_PCI_COMMON_Q_SELECT:
1360 if (val < VIRTIO_QUEUE_MAX) {
1361 vdev->queue_sel = val;
1362 }
1363 break;
1364 case VIRTIO_PCI_COMMON_Q_SIZE:
1365 proxy->vqs[vdev->queue_sel].num = val;
1366 break;
1367 case VIRTIO_PCI_COMMON_Q_MSIX:
1368 msix_vector_unuse(&proxy->pci_dev,
1369 virtio_queue_vector(vdev, vdev->queue_sel));
1370 /* Make it possible for guest to discover an error took place. */
1371 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1372 val = VIRTIO_NO_VECTOR;
1373 }
1374 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
1375 break;
1376 case VIRTIO_PCI_COMMON_Q_ENABLE:
1377 /* TODO: need a way to put num back on reset. */
1378 virtio_queue_set_num(vdev, vdev->queue_sel,
1379 proxy->vqs[vdev->queue_sel].num);
1380 virtio_queue_set_rings(vdev, vdev->queue_sel,
1381 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 |
1382 proxy->vqs[vdev->queue_sel].desc[0],
1383 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 |
1384 proxy->vqs[vdev->queue_sel].avail[0],
1385 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 |
1386 proxy->vqs[vdev->queue_sel].used[0]);
393f04d3 1387 proxy->vqs[vdev->queue_sel].enabled = 1;
dfb8e184
MT		 1388 break;
1389 case VIRTIO_PCI_COMMON_Q_DESCLO:
1390 proxy->vqs[vdev->queue_sel].desc[0] = val;
1391 break;
1392 case VIRTIO_PCI_COMMON_Q_DESCHI:
1393 proxy->vqs[vdev->queue_sel].desc[1] = val;
1394 break;
1395 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1396 proxy->vqs[vdev->queue_sel].avail[0] = val;
1397 break;
1398 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1399 proxy->vqs[vdev->queue_sel].avail[1] = val;
1400 break;
1401 case VIRTIO_PCI_COMMON_Q_USEDLO:
1402 proxy->vqs[vdev->queue_sel].used[0] = val;
1403 break;
1404 case VIRTIO_PCI_COMMON_Q_USEDHI:
1405 proxy->vqs[vdev->queue_sel].used[1] = val;
1406 break;
1407 default:
1408 break;
1409 }
1410}
1411
1412
1413static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr,
1414 unsigned size)
1415{
1416 return 0;
1417}
1418
1419static void virtio_pci_notify_write(void *opaque, hwaddr addr,
1420 uint64_t val, unsigned size)
1421{
1422 VirtIODevice *vdev = opaque;
1423 unsigned queue = addr / QEMU_VIRTIO_PCI_QUEUE_MEM_MULT;
1424
1425 if (queue < VIRTIO_QUEUE_MAX) {
1426 virtio_queue_notify(vdev, queue);
1427 }
1428}
1429
9824d2a3
JW		 1430static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr,
1431 uint64_t val, unsigned size)
1432{
1433 VirtIODevice *vdev = opaque;
1434 unsigned queue = val;
1435
1436 if (queue < VIRTIO_QUEUE_MAX) {
1437 virtio_queue_notify(vdev, queue);
1438 }
1439}
1440
dfb8e184
MT		 1441static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr,
1442 unsigned size)
1443{
1444 VirtIOPCIProxy *proxy = opaque;
1445 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1446 uint64_t val = vdev->isr;
1447
1448 vdev->isr = 0;
1449 pci_irq_deassert(&proxy->pci_dev);
1450
1451 return val;
1452}
1453
1454static void virtio_pci_isr_write(void *opaque, hwaddr addr,
1455 uint64_t val, unsigned size)
1456{
1457}
1458
1459static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr,
1460 unsigned size)
1461{
1462 VirtIODevice *vdev = opaque;
1463 uint64_t val = 0;
1464
1465 switch (size) {
1466 case 1:
54c720d4 1467 val = virtio_config_modern_readb(vdev, addr);
dfb8e184
MT		 1468 break;
1469 case 2:
54c720d4 1470 val = virtio_config_modern_readw(vdev, addr);
dfb8e184
MT		 1471 break;
1472 case 4:
54c720d4 1473 val = virtio_config_modern_readl(vdev, addr);
dfb8e184
MT		 1474 break;
1475 }
1476 return val;
1477}
1478
1479static void virtio_pci_device_write(void *opaque, hwaddr addr,
1480 uint64_t val, unsigned size)
1481{
1482 VirtIODevice *vdev = opaque;
1483 switch (size) {
1484 case 1:
54c720d4 1485 virtio_config_modern_writeb(vdev, addr, val);
dfb8e184
MT		 1486 break;
1487 case 2:
54c720d4 1488 virtio_config_modern_writew(vdev, addr, val);
dfb8e184
MT		 1489 break;
1490 case 4:
54c720d4 1491 virtio_config_modern_writel(vdev, addr, val);
dfb8e184
MT		 1492 break;
1493 }
1494}
1495
1141ce21
GH		 1496static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy)
1497{
1498 static const MemoryRegionOps common_ops = {
1499 .read = virtio_pci_common_read,
1500 .write = virtio_pci_common_write,
1501 .impl = {
1502 .min_access_size = 1,
1503 .max_access_size = 4,
1504 },
1505 .endianness = DEVICE_LITTLE_ENDIAN,
1506 };
1507 static const MemoryRegionOps isr_ops = {
1508 .read = virtio_pci_isr_read,
1509 .write = virtio_pci_isr_write,
1510 .impl = {
1511 .min_access_size = 1,
1512 .max_access_size = 4,
1513 },
1514 .endianness = DEVICE_LITTLE_ENDIAN,
1515 };
1516 static const MemoryRegionOps device_ops = {
1517 .read = virtio_pci_device_read,
1518 .write = virtio_pci_device_write,
1519 .impl = {
1520 .min_access_size = 1,
1521 .max_access_size = 4,
1522 },
1523 .endianness = DEVICE_LITTLE_ENDIAN,
1524 };
1525 static const MemoryRegionOps notify_ops = {
1526 .read = virtio_pci_notify_read,
1527 .write = virtio_pci_notify_write,
1528 .impl = {
1529 .min_access_size = 1,
1530 .max_access_size = 4,
1531 },
1532 .endianness = DEVICE_LITTLE_ENDIAN,
1533 };
9824d2a3
JW		 1534 static const MemoryRegionOps notify_pio_ops = {
1535 .read = virtio_pci_notify_read,
1536 .write = virtio_pci_notify_write_pio,
1537 .impl = {
1538 .min_access_size = 1,
1539 .max_access_size = 4,
1540 },
1541 .endianness = DEVICE_LITTLE_ENDIAN,
1542 };
1543
1141ce21
GH		 1544
1545 memory_region_init_io(&proxy->common.mr, OBJECT(proxy),
1546 &common_ops,
1547 proxy,
b6ce27a5
GH		 1548 "virtio-pci-common",
1549 proxy->common.size);
a3cc2e81 1550
1141ce21
GH		 1551 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy),
1552 &isr_ops,
1553 proxy,
b6ce27a5
GH		 1554 "virtio-pci-isr",
1555 proxy->isr.size);
a3cc2e81 1556
1141ce21
GH		 1557 memory_region_init_io(&proxy->device.mr, OBJECT(proxy),
1558 &device_ops,
1559 virtio_bus_get_device(&proxy->bus),
b6ce27a5
GH		 1560 "virtio-pci-device",
1561 proxy->device.size);
a3cc2e81 1562
1141ce21
GH		 1563 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy),
1564 &notify_ops,
1565 virtio_bus_get_device(&proxy->bus),
1566 "virtio-pci-notify",
b6ce27a5 1567 proxy->notify.size);
9824d2a3
JW		 1568
1569 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy),
1570 &notify_pio_ops,
1571 virtio_bus_get_device(&proxy->bus),
1572 "virtio-pci-notify-pio",
1573 proxy->notify.size);
a3cc2e81
GH		 1574}
1575
1576static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy,
54790d71 1577 VirtIOPCIRegion *region,
9824d2a3
JW		 1578 struct virtio_pci_cap *cap,
1579 MemoryRegion *mr,
1580 uint8_t bar)
a3cc2e81 1581{
9824d2a3 1582 memory_region_add_subregion(mr, region->offset, &region->mr);
54790d71 1583
fc004905 1584 cap->cfg_type = region->type;
9824d2a3 1585 cap->bar = bar;
54790d71 1586 cap->offset = cpu_to_le32(region->offset);
b6ce27a5 1587 cap->length = cpu_to_le32(region->size);
54790d71 1588 virtio_pci_add_mem_cap(proxy, cap);
9824d2a3
JW		 1589
1590}
1591
1592static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy,
1593 VirtIOPCIRegion *region,
1594 struct virtio_pci_cap *cap)
1595{
1596 virtio_pci_modern_region_map(proxy, region, cap,
1597 &proxy->modern_bar, proxy->modern_mem_bar);
1141ce21 1598}
dfb8e184 1599
9824d2a3
JW		 1600static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy,
1601 VirtIOPCIRegion *region,
1602 struct virtio_pci_cap *cap)
1603{
1604 virtio_pci_modern_region_map(proxy, region, cap,
1605 &proxy->io_bar, proxy->modern_io_bar);
1606}
1607
1608static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy,
1609 VirtIOPCIRegion *region)
27462695
MT		 1610{
1611 memory_region_del_subregion(&proxy->modern_bar,
1612 &region->mr);
1613}
1614
9824d2a3
JW		 1615static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy,
1616 VirtIOPCIRegion *region)
1617{
1618 memory_region_del_subregion(&proxy->io_bar,
1619 &region->mr);
1620}
1621
085bccb7 1622/* This is called by virtio-bus just after the device is plugged. */
e8398045 1623static void virtio_pci_device_plugged(DeviceState *d, Error **errp)
085bccb7
FK		 1624{
1625 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1626 VirtioBusState *bus = &proxy->bus;
e266d421
GH		 1627 bool legacy = !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_LEGACY);
1628 bool modern = !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_MODERN);
9824d2a3 1629 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
085bccb7
FK		 1630 uint8_t *config;
1631 uint32_t size;
6b8f1020 1632 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
085bccb7 1633
085bccb7
FK		 1634 config = proxy->pci_dev.config;
1635 if (proxy->class_code) {
1636 pci_config_set_class(config, proxy->class_code);
1637 }
e266d421
GH		 1638
1639 if (legacy) {
1640 /* legacy and transitional */
1641 pci_set_word(config + PCI_SUBSYSTEM_VENDOR_ID,
1642 pci_get_word(config + PCI_VENDOR_ID));
1643 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus));
1644 } else {
1645 /* pure virtio-1.0 */
1646 pci_set_word(config + PCI_VENDOR_ID,
1647 PCI_VENDOR_ID_REDHAT_QUMRANET);
1648 pci_set_word(config + PCI_DEVICE_ID,
1649 0x1040 + virtio_bus_get_vdev_id(bus));
1650 pci_config_set_revision(config, 1);
1651 }
085bccb7
FK		 1652 config[PCI_INTERRUPT_PIN] = 1;
1653
dfb8e184 1654
e266d421 1655 if (modern) {
cc52ea90
GH		 1656 struct virtio_pci_cap cap = {
1657 .cap_len = sizeof cap,
dfb8e184
MT		 1658 };
1659 struct virtio_pci_notify_cap notify = {
dfb8e184 1660 .cap.cap_len = sizeof notify,
dfb8e184
MT		 1661 .notify_off_multiplier =
1662 cpu_to_le32(QEMU_VIRTIO_PCI_QUEUE_MEM_MULT),
1663 };
ada434cd
MT		 1664 struct virtio_pci_cfg_cap cfg = {
1665 .cap.cap_len = sizeof cfg,
1666 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG,
1667 };
9824d2a3
JW		 1668 struct virtio_pci_notify_cap notify_pio = {
1669 .cap.cap_len = sizeof notify,
1670 .notify_off_multiplier = cpu_to_le32(0x0),
1671 };
dfb8e184 1672
9824d2a3 1673 struct virtio_pci_cfg_cap *cfg_mask;
dfb8e184
MT		 1674
1675 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1);
1141ce21 1676 virtio_pci_modern_regions_init(proxy);
9824d2a3
JW		 1677
1678 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap);
1679 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap);
1680 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap);
1681 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, &notify.cap);
1682
1683 if (modern_pio) {
1684 memory_region_init(&proxy->io_bar, OBJECT(proxy),
1685 "virtio-pci-io", 0x4);
1686
1687 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar,
1688 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar);
1689
1690 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio,
1691 &notify_pio.cap);
1692 }
ada434cd 1693
b6ce27a5 1694 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar,
4e93a68e
GH		 1695 PCI_BASE_ADDRESS_SPACE_MEMORY |
1696 PCI_BASE_ADDRESS_MEM_PREFETCH |
1697 PCI_BASE_ADDRESS_MEM_TYPE_64,
dfb8e184 1698 &proxy->modern_bar);
ada434cd
MT		 1699
1700 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap);
1701 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap);
1702 pci_set_byte(&cfg_mask->cap.bar, ~0x0);
1703 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0);
1704 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0);
1705 pci_set_long(cfg_mask->pci_cfg_data, ~0x0);
dfb8e184
MT		 1706 }
1707
0d583647
RH		 1708 if (proxy->nvectors) {
1709 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors,
1710 proxy->msix_bar);
1711 if (err) {
1712 /* Notice when a system that supports MSIx can't initialize it. */
1713 if (err != -ENOTSUP) {
1714 error_report("unable to init msix vectors to %" PRIu32,
1715 proxy->nvectors);
1716 }
1717 proxy->nvectors = 0;
1718 }
085bccb7
FK		 1719 }
1720
1721 proxy->pci_dev.config_write = virtio_write_config;
ada434cd 1722 proxy->pci_dev.config_read = virtio_read_config;
085bccb7 1723
e266d421
GH		 1724 if (legacy) {
1725 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev)
1726 + virtio_bus_get_vdev_config_len(bus);
1d0148fe 1727 size = pow2ceil(size);
085bccb7 1728
e266d421
GH		 1729 memory_region_init_io(&proxy->bar, OBJECT(proxy),
1730 &virtio_pci_config_ops,
1731 proxy, "virtio-pci", size);
dfb8e184 1732
b6ce27a5 1733 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar,
23c5e397 1734 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar);
e266d421 1735 }
085bccb7
FK		 1736
1737 if (!kvm_has_many_ioeventfds()) {
1738 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
1739 }
1740
6b8f1020 1741 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE);
085bccb7
FK		 1742}
1743
06a13073
PB		 1744static void virtio_pci_device_unplugged(DeviceState *d)
1745{
06a13073 1746 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
27462695 1747 bool modern = !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_MODERN);
9824d2a3 1748 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
06a13073
PB		 1749
1750 virtio_pci_stop_ioeventfd(proxy);
27462695
MT		 1751
1752 if (modern) {
9824d2a3
JW		 1753 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common);
1754 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr);
1755 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device);
1756 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify);
1757 if (modern_pio) {
1758 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio);
1759 }
27462695 1760 }
06a13073
PB		 1761}
1762
fc079951 1763static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
085bccb7 1764{
b6ce27a5 1765 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
085bccb7 1766 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
fc079951 1767
b6ce27a5
GH		 1768 /*
1769 * virtio pci bar layout used by default.
1770 * subclasses can re-arrange things if needed.
1771 *
1772 * region 0 -- virtio legacy io bar
1773 * region 1 -- msi-x bar
1774 * region 4+5 -- virtio modern memory (64bit) bar
1775 *
1776 */
1777 proxy->legacy_io_bar = 0;
1778 proxy->msix_bar = 1;
9824d2a3 1779 proxy->modern_io_bar = 2;
b6ce27a5
GH		 1780 proxy->modern_mem_bar = 4;
1781
1782 proxy->common.offset = 0x0;
1783 proxy->common.size = 0x1000;
1784 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG;
1785
1786 proxy->isr.offset = 0x1000;
1787 proxy->isr.size = 0x1000;
1788 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG;
1789
1790 proxy->device.offset = 0x2000;
1791 proxy->device.size = 0x1000;
1792 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG;
1793
1794 proxy->notify.offset = 0x3000;
1795 proxy->notify.size =
1796 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT * VIRTIO_QUEUE_MAX;
1797 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1798
9824d2a3
JW		 1799 proxy->notify_pio.offset = 0x0;
1800 proxy->notify_pio.size = 0x4;
1801 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1802
b6ce27a5
GH		 1803 /* subclasses can enforce modern, so do this unconditionally */
1804 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci",
1805 2 * QEMU_VIRTIO_PCI_QUEUE_MEM_MULT *
1806 VIRTIO_QUEUE_MAX);
1807
ada434cd
MT		 1808 memory_region_init_alias(&proxy->modern_cfg,
1809 OBJECT(proxy),
1810 "virtio-pci-cfg",
1811 &proxy->modern_bar,
1812 0,
1813 memory_region_size(&proxy->modern_bar));
1814
1815 address_space_init(&proxy->modern_as, &proxy->modern_cfg, "virtio-pci-cfg-as");
1816
1811e64c
MA		 1817 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE)
1818 && !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_MODERN)
1819 && pci_bus_is_express(pci_dev->bus)
1820 && !pci_bus_is_root(pci_dev->bus)) {
1821 int pos;
1822
1823 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
1824 pos = pcie_endpoint_cap_init(pci_dev, 0);
1825 assert(pos > 0);
1826
1827 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF);
1828 assert(pos > 0);
1829
1830 /*
1831 * Indicates that this function complies with revision 1.2 of the
1832 * PCI Power Management Interface Specification.
1833 */
1834 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
1835 }
1836
b6ce27a5 1837 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy);
fc079951 1838 if (k->realize) {
b6ce27a5 1839 k->realize(proxy, errp);
085bccb7 1840 }
085bccb7
FK		 1841}
1842
1843static void virtio_pci_exit(PCIDevice *pci_dev)
1844{
ada434cd
MT		 1845 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
1846
8b81bb3b 1847 msix_uninit_exclusive_bar(pci_dev);
ada434cd 1848 address_space_destroy(&proxy->modern_as);
085bccb7
FK		 1849}
1850
59ccd20a 1851static void virtio_pci_reset(DeviceState *qdev)
085bccb7
FK		 1852{
1853 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1854 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
393f04d3
JW		 1855 int i;
1856
085bccb7
FK		 1857 virtio_pci_stop_ioeventfd(proxy);
1858 virtio_bus_reset(bus);
1859 msix_unuse_all_vectors(&proxy->pci_dev);
393f04d3
JW		 1860
1861 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
1862 proxy->vqs[i].enabled = 0;
1863 }
085bccb7
FK		 1864}
1865
85d1277e 1866static Property virtio_pci_properties[] = {
68a27b20
MT		 1867 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags,
1868 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false),
e266d421
GH		 1869 DEFINE_PROP_BIT("disable-legacy", VirtIOPCIProxy, flags,
1870 VIRTIO_PCI_FLAG_DISABLE_LEGACY_BIT, false),
1871 DEFINE_PROP_BIT("disable-modern", VirtIOPCIProxy, flags,
1872 VIRTIO_PCI_FLAG_DISABLE_MODERN_BIT, true),
a6df8adf
JW		 1873 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags,
1874 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true),
9824d2a3
JW		 1875 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags,
1876 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false),
1811e64c
MA		 1877 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags,
1878 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false),
85d1277e
ML		 1879 DEFINE_PROP_END_OF_LIST(),
1880};
1881
085bccb7
FK		 1882static void virtio_pci_class_init(ObjectClass *klass, void *data)
1883{
1884 DeviceClass *dc = DEVICE_CLASS(klass);
1885 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1886
85d1277e 1887 dc->props = virtio_pci_properties;
fc079951 1888 k->realize = virtio_pci_realize;
085bccb7
FK		 1889 k->exit = virtio_pci_exit;
1890 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1891 k->revision = VIRTIO_PCI_ABI_VERSION;
1892 k->class_id = PCI_CLASS_OTHERS;
59ccd20a 1893 dc->reset = virtio_pci_reset;
085bccb7
FK		 1894}
1895
1896static const TypeInfo virtio_pci_info = {
1897 .name = TYPE_VIRTIO_PCI,
1898 .parent = TYPE_PCI_DEVICE,
1899 .instance_size = sizeof(VirtIOPCIProxy),
1900 .class_init = virtio_pci_class_init,
1901 .class_size = sizeof(VirtioPCIClass),
1902 .abstract = true,
1903};
1904
653ced07
FK		 1905/* virtio-blk-pci */
1906
1907static Property virtio_blk_pci_properties[] = {
c7bcc85d 1908 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
653ced07
FK		 1909 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1910 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1911 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
653ced07
FK		 1912 DEFINE_PROP_END_OF_LIST(),
1913};
1914
fc079951 1915static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
653ced07
FK		 1916{
1917 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(vpci_dev);
1918 DeviceState *vdev = DEVICE(&dev->vdev);
fc079951 1919
653ced07 1920 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 1921 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
653ced07
FK		 1922}
1923
1924static void virtio_blk_pci_class_init(ObjectClass *klass, void *data)
1925{
1926 DeviceClass *dc = DEVICE_CLASS(klass);
1927 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
1928 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
1929
125ee0ed 1930 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
653ced07 1931 dc->props = virtio_blk_pci_properties;
fc079951 1932 k->realize = virtio_blk_pci_realize;
653ced07
FK		 1933 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1934 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BLOCK;
1935 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
1936 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
1937}
1938
1939static void virtio_blk_pci_instance_init(Object *obj)
1940{
1941 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(obj);
c8075caf
GA		 1942
1943 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
1944 TYPE_VIRTIO_BLK);
467b3f33
SH		 1945 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev),"iothread",
1946 &error_abort);
aeb98ddc
GA		 1947 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
1948 "bootindex", &error_abort);
653ced07
FK		 1949}
1950
1951static const TypeInfo virtio_blk_pci_info = {
1952 .name = TYPE_VIRTIO_BLK_PCI,
1953 .parent = TYPE_VIRTIO_PCI,
1954 .instance_size = sizeof(VirtIOBlkPCI),
1955 .instance_init = virtio_blk_pci_instance_init,
1956 .class_init = virtio_blk_pci_class_init,
1957};
1958
bc7b90a0
FK		 1959/* virtio-scsi-pci */
1960
1961static Property virtio_scsi_pci_properties[] = {
1962 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1963 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1964 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
1965 DEV_NVECTORS_UNSPECIFIED),
bc7b90a0
FK		 1966 DEFINE_PROP_END_OF_LIST(),
1967};
1968
fc079951 1969static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
bc7b90a0
FK		 1970{
1971 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(vpci_dev);
1972 DeviceState *vdev = DEVICE(&dev->vdev);
292c8e50 1973 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev);
6f32a6b4
FK		 1974 DeviceState *proxy = DEVICE(vpci_dev);
1975 char *bus_name;
bc7b90a0
FK		 1976
1977 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
292c8e50 1978 vpci_dev->nvectors = vs->conf.num_queues + 3;
bc7b90a0
FK		 1979 }
1980
6f32a6b4
FK		 1981 /*
1982 * For command line compatibility, this sets the virtio-scsi-device bus
1983 * name as before.
1984 */
1985 if (proxy->id) {
1986 bus_name = g_strdup_printf("%s.0", proxy->id);
1987 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name);
1988 g_free(bus_name);
1989 }
1990
bc7b90a0 1991 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 1992 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
bc7b90a0
FK		 1993}
1994
1995static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data)
1996{
1997 DeviceClass *dc = DEVICE_CLASS(klass);
1998 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
1999 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951
MA		 2000
2001 k->realize = virtio_scsi_pci_realize;
125ee0ed 2002 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
bc7b90a0
FK		 2003 dc->props = virtio_scsi_pci_properties;
2004 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2005 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI;
2006 pcidev_k->revision = 0x00;
2007 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
2008}
2009
2010static void virtio_scsi_pci_instance_init(Object *obj)
2011{
2012 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(obj);
c8075caf
GA		 2013
2014 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2015 TYPE_VIRTIO_SCSI);
19d339f1
FZ		 2016 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev), "iothread",
2017 &error_abort);
bc7b90a0
FK		 2018}
2019
2020static const TypeInfo virtio_scsi_pci_info = {
2021 .name = TYPE_VIRTIO_SCSI_PCI,
2022 .parent = TYPE_VIRTIO_PCI,
2023 .instance_size = sizeof(VirtIOSCSIPCI),
2024 .instance_init = virtio_scsi_pci_instance_init,
2025 .class_init = virtio_scsi_pci_class_init,
2026};
2027
50787628
NB		 2028/* vhost-scsi-pci */
2029
2030#ifdef CONFIG_VHOST_SCSI
2031static Property vhost_scsi_pci_properties[] = {
2032 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
2033 DEV_NVECTORS_UNSPECIFIED),
50787628
NB		 2034 DEFINE_PROP_END_OF_LIST(),
2035};
2036
fc079951 2037static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
50787628
NB		 2038{
2039 VHostSCSIPCI *dev = VHOST_SCSI_PCI(vpci_dev);
2040 DeviceState *vdev = DEVICE(&dev->vdev);
2041 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev);
2042
2043 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
2044 vpci_dev->nvectors = vs->conf.num_queues + 3;
2045 }
2046
2047 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2048 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
50787628
NB		 2049}
2050
2051static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data)
2052{
2053 DeviceClass *dc = DEVICE_CLASS(klass);
2054 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2055 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951 2056 k->realize = vhost_scsi_pci_realize;
125ee0ed 2057 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
50787628
NB		 2058 dc->props = vhost_scsi_pci_properties;
2059 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2060 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI;
2061 pcidev_k->revision = 0x00;
2062 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
2063}
2064
2065static void vhost_scsi_pci_instance_init(Object *obj)
2066{
2067 VHostSCSIPCI *dev = VHOST_SCSI_PCI(obj);
c8075caf
GA		 2068
2069 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2070 TYPE_VHOST_SCSI);
d4433f32
GA		 2071 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
2072 "bootindex", &error_abort);
50787628
NB		 2073}
2074
2075static const TypeInfo vhost_scsi_pci_info = {
2076 .name = TYPE_VHOST_SCSI_PCI,
2077 .parent = TYPE_VIRTIO_PCI,
2078 .instance_size = sizeof(VHostSCSIPCI),
2079 .instance_init = vhost_scsi_pci_instance_init,
2080 .class_init = vhost_scsi_pci_class_init,
2081};
2082#endif
2083
e378e88d
FK		 2084/* virtio-balloon-pci */
2085
2086static Property virtio_balloon_pci_properties[] = {
c7bcc85d 2087 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
e378e88d
FK		 2088 DEFINE_PROP_END_OF_LIST(),
2089};
2090
fc079951 2091static void virtio_balloon_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
e378e88d
FK		 2092{
2093 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(vpci_dev);
2094 DeviceState *vdev = DEVICE(&dev->vdev);
2095
2096 if (vpci_dev->class_code != PCI_CLASS_OTHERS &&
2097 vpci_dev->class_code != PCI_CLASS_MEMORY_RAM) { /* qemu < 1.1 */
2098 vpci_dev->class_code = PCI_CLASS_OTHERS;
2099 }
2100
2101 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2102 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
e378e88d
FK		 2103}
2104
2105static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data)
2106{
2107 DeviceClass *dc = DEVICE_CLASS(klass);
2108 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2109 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951 2110 k->realize = virtio_balloon_pci_realize;
125ee0ed 2111 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
e378e88d
FK		 2112 dc->props = virtio_balloon_pci_properties;
2113 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2114 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BALLOON;
2115 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2116 pcidev_k->class_id = PCI_CLASS_OTHERS;
2117}
2118
2119static void virtio_balloon_pci_instance_init(Object *obj)
2120{
2121 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(obj);
39b87c7b 2122
a6027b0f
DL		 2123 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2124 TYPE_VIRTIO_BALLOON);
39b87c7b
SZ		 2125 object_property_add_alias(obj, "guest-stats", OBJECT(&dev->vdev),
2126 "guest-stats", &error_abort);
2127 object_property_add_alias(obj, "guest-stats-polling-interval",
2128 OBJECT(&dev->vdev),
2129 "guest-stats-polling-interval", &error_abort);
e378e88d
FK		 2130}
2131
2132static const TypeInfo virtio_balloon_pci_info = {
2133 .name = TYPE_VIRTIO_BALLOON_PCI,
2134 .parent = TYPE_VIRTIO_PCI,
2135 .instance_size = sizeof(VirtIOBalloonPCI),
2136 .instance_init = virtio_balloon_pci_instance_init,
2137 .class_init = virtio_balloon_pci_class_init,
2138};
2139
f7f7464a
FK		 2140/* virtio-serial-pci */
2141
fc079951 2142static void virtio_serial_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
f7f7464a
FK		 2143{
2144 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(vpci_dev);
2145 DeviceState *vdev = DEVICE(&dev->vdev);
80270a19
FK		 2146 DeviceState *proxy = DEVICE(vpci_dev);
2147 char *bus_name;
f7f7464a
FK		 2148
2149 if (vpci_dev->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
2150 vpci_dev->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
2151 vpci_dev->class_code != PCI_CLASS_OTHERS) { /* qemu-kvm */
2152 vpci_dev->class_code = PCI_CLASS_COMMUNICATION_OTHER;
2153 }
2154
2155 /* backwards-compatibility with machines that were created with
2156 DEV_NVECTORS_UNSPECIFIED */
2157 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
2158 vpci_dev->nvectors = dev->vdev.serial.max_virtserial_ports + 1;
2159 }
2160
80270a19
FK		 2161 /*
2162 * For command line compatibility, this sets the virtio-serial-device bus
2163 * name as before.
2164 */
2165 if (proxy->id) {
2166 bus_name = g_strdup_printf("%s.0", proxy->id);
2167 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name);
2168 g_free(bus_name);
2169 }
2170
f7f7464a 2171 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2172 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
f7f7464a
FK		 2173}
2174
2175static Property virtio_serial_pci_properties[] = {
2176 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
2177 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
2178 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
c7bcc85d 2179 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
f7f7464a
FK		 2180 DEFINE_PROP_END_OF_LIST(),
2181};
2182
2183static void virtio_serial_pci_class_init(ObjectClass *klass, void *data)
2184{
2185 DeviceClass *dc = DEVICE_CLASS(klass);
2186 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2187 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951 2188 k->realize = virtio_serial_pci_realize;
125ee0ed 2189 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
f7f7464a
FK		 2190 dc->props = virtio_serial_pci_properties;
2191 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2192 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_CONSOLE;
2193 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2194 pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER;
2195}
2196
2197static void virtio_serial_pci_instance_init(Object *obj)
2198{
2199 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(obj);
c8075caf
GA		 2200
2201 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2202 TYPE_VIRTIO_SERIAL);
f7f7464a
FK		 2203}
2204
2205static const TypeInfo virtio_serial_pci_info = {
2206 .name = TYPE_VIRTIO_SERIAL_PCI,
2207 .parent = TYPE_VIRTIO_PCI,
2208 .instance_size = sizeof(VirtIOSerialPCI),
2209 .instance_init = virtio_serial_pci_instance_init,
2210 .class_init = virtio_serial_pci_class_init,
2211};
2212
e37da394
FK		 2213/* virtio-net-pci */
2214
2215static Property virtio_net_properties[] = {
2216 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
2217 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false),
2218 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
e37da394
FK		 2219 DEFINE_PROP_END_OF_LIST(),
2220};
2221
fc079951 2222static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
e37da394 2223{
800ced8c 2224 DeviceState *qdev = DEVICE(vpci_dev);
e37da394
FK		 2225 VirtIONetPCI *dev = VIRTIO_NET_PCI(vpci_dev);
2226 DeviceState *vdev = DEVICE(&dev->vdev);
2227
800ced8c
FK		 2228 virtio_net_set_netclient_name(&dev->vdev, qdev->id,
2229 object_get_typename(OBJECT(qdev)));
e37da394 2230 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2231 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
e37da394
FK		 2232}
2233
2234static void virtio_net_pci_class_init(ObjectClass *klass, void *data)
2235{
2236 DeviceClass *dc = DEVICE_CLASS(klass);
2237 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
2238 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
2239
2240 k->romfile = "efi-virtio.rom";
2241 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2242 k->device_id = PCI_DEVICE_ID_VIRTIO_NET;
2243 k->revision = VIRTIO_PCI_ABI_VERSION;
2244 k->class_id = PCI_CLASS_NETWORK_ETHERNET;
125ee0ed 2245 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
e37da394 2246 dc->props = virtio_net_properties;
fc079951 2247 vpciklass->realize = virtio_net_pci_realize;
e37da394
FK		 2248}
2249
2250static void virtio_net_pci_instance_init(Object *obj)
2251{
2252 VirtIONetPCI *dev = VIRTIO_NET_PCI(obj);
c8075caf
GA		 2253
2254 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2255 TYPE_VIRTIO_NET);
0cf63c3e
GA		 2256 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
2257 "bootindex", &error_abort);
e37da394
FK		 2258}
2259
2260static const TypeInfo virtio_net_pci_info = {
2261 .name = TYPE_VIRTIO_NET_PCI,
2262 .parent = TYPE_VIRTIO_PCI,
2263 .instance_size = sizeof(VirtIONetPCI),
2264 .instance_init = virtio_net_pci_instance_init,
2265 .class_init = virtio_net_pci_class_init,
2266};
2267
59ccd20a
FK		 2268/* virtio-rng-pci */
2269
fc079951 2270static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
59ccd20a
FK		 2271{
2272 VirtIORngPCI *vrng = VIRTIO_RNG_PCI(vpci_dev);
2273 DeviceState *vdev = DEVICE(&vrng->vdev);
fc079951 2274 Error *err = NULL;
59ccd20a
FK		 2275
2276 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951
MA		 2277 object_property_set_bool(OBJECT(vdev), true, "realized", &err);
2278 if (err) {
2279 error_propagate(errp, err);
2280 return;
59ccd20a
FK		 2281 }
2282
2283 object_property_set_link(OBJECT(vrng),
5b456438 2284 OBJECT(vrng->vdev.conf.rng), "rng",
59ccd20a 2285 NULL);
59ccd20a
FK		 2286}
2287
2288static void virtio_rng_pci_class_init(ObjectClass *klass, void *data)
2289{
2290 DeviceClass *dc = DEVICE_CLASS(klass);
2291 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2292 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2293
fc079951 2294 k->realize = virtio_rng_pci_realize;
125ee0ed 2295 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
59ccd20a
FK		 2296
2297 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2298 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_RNG;
2299 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2300 pcidev_k->class_id = PCI_CLASS_OTHERS;
2301}
2302
2303static void virtio_rng_initfn(Object *obj)
2304{
2305 VirtIORngPCI *dev = VIRTIO_RNG_PCI(obj);
c8075caf
GA		 2306
2307 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2308 TYPE_VIRTIO_RNG);
cbd5ac69
PB		 2309 object_property_add_alias(obj, "rng", OBJECT(&dev->vdev), "rng",
2310 &error_abort);
59ccd20a
FK		 2311}
2312
2313static const TypeInfo virtio_rng_pci_info = {
2314 .name = TYPE_VIRTIO_RNG_PCI,
2315 .parent = TYPE_VIRTIO_PCI,
2316 .instance_size = sizeof(VirtIORngPCI),
2317 .instance_init = virtio_rng_initfn,
2318 .class_init = virtio_rng_pci_class_init,
2319};
2320
f958c8aa
GH		 2321/* virtio-input-pci */
2322
6f2b9a5b 2323static Property virtio_input_pci_properties[] = {
710e2d90
GH		 2324 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
2325 DEFINE_PROP_END_OF_LIST(),
2326};
2327
f958c8aa
GH		 2328static void virtio_input_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
2329{
2330 VirtIOInputPCI *vinput = VIRTIO_INPUT_PCI(vpci_dev);
2331 DeviceState *vdev = DEVICE(&vinput->vdev);
2332
2333 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
2334 /* force virtio-1.0 */
2335 vpci_dev->flags &= ~VIRTIO_PCI_FLAG_DISABLE_MODERN;
2336 vpci_dev->flags |= VIRTIO_PCI_FLAG_DISABLE_LEGACY;
2337 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
2338}
2339
2340static void virtio_input_pci_class_init(ObjectClass *klass, void *data)
2341{
2342 DeviceClass *dc = DEVICE_CLASS(klass);
2343 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2344 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2345
6f2b9a5b 2346 dc->props = virtio_input_pci_properties;
f958c8aa
GH		 2347 k->realize = virtio_input_pci_realize;
2348 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
2349
2350 pcidev_k->class_id = PCI_CLASS_INPUT_OTHER;
2351}
2352
710e2d90
GH		 2353static void virtio_input_hid_kbd_pci_class_init(ObjectClass *klass, void *data)
2354{
2355 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2356
2357 pcidev_k->class_id = PCI_CLASS_INPUT_KEYBOARD;
2358}
2359
2360static void virtio_input_hid_mouse_pci_class_init(ObjectClass *klass,
2361 void *data)
2362{
2363 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2364
2365 pcidev_k->class_id = PCI_CLASS_INPUT_MOUSE;
2366}
2367
2368static void virtio_keyboard_initfn(Object *obj)
2369{
2370 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
6f2b9a5b
GH		 2371
2372 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2373 TYPE_VIRTIO_KEYBOARD);
710e2d90
GH		 2374}
2375
2376static void virtio_mouse_initfn(Object *obj)
2377{
2378 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
6f2b9a5b
GH		 2379
2380 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2381 TYPE_VIRTIO_MOUSE);
710e2d90
GH		 2382}
2383
2384static void virtio_tablet_initfn(Object *obj)
2385{
2386 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
6f2b9a5b
GH		 2387
2388 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2389 TYPE_VIRTIO_TABLET);
710e2d90
GH		 2390}
2391
f958c8aa
GH		 2392static const TypeInfo virtio_input_pci_info = {
2393 .name = TYPE_VIRTIO_INPUT_PCI,
2394 .parent = TYPE_VIRTIO_PCI,
2395 .instance_size = sizeof(VirtIOInputPCI),
2396 .class_init = virtio_input_pci_class_init,
2397 .abstract = true,
2398};
2399
710e2d90
GH		 2400static const TypeInfo virtio_input_hid_pci_info = {
2401 .name = TYPE_VIRTIO_INPUT_HID_PCI,
2402 .parent = TYPE_VIRTIO_INPUT_PCI,
2403 .instance_size = sizeof(VirtIOInputHIDPCI),
710e2d90
GH		 2404 .abstract = true,
2405};
2406
2407static const TypeInfo virtio_keyboard_pci_info = {
2408 .name = TYPE_VIRTIO_KEYBOARD_PCI,
2409 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2410 .class_init = virtio_input_hid_kbd_pci_class_init,
2411 .instance_size = sizeof(VirtIOInputHIDPCI),
2412 .instance_init = virtio_keyboard_initfn,
2413};
2414
2415static const TypeInfo virtio_mouse_pci_info = {
2416 .name = TYPE_VIRTIO_MOUSE_PCI,
2417 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2418 .class_init = virtio_input_hid_mouse_pci_class_init,
2419 .instance_size = sizeof(VirtIOInputHIDPCI),
2420 .instance_init = virtio_mouse_initfn,
2421};
2422
2423static const TypeInfo virtio_tablet_pci_info = {
2424 .name = TYPE_VIRTIO_TABLET_PCI,
2425 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2426 .instance_size = sizeof(VirtIOInputHIDPCI),
2427 .instance_init = virtio_tablet_initfn,
2428};
2429
c6047e96
MA		 2430#ifdef CONFIG_LINUX
2431static void virtio_host_initfn(Object *obj)
2432{
2433 VirtIOInputHostPCI *dev = VIRTIO_INPUT_HOST_PCI(obj);
2434
2435 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2436 TYPE_VIRTIO_INPUT_HOST);
2437}
2438
006a5ede
GH		 2439static const TypeInfo virtio_host_pci_info = {
2440 .name = TYPE_VIRTIO_INPUT_HOST_PCI,
2441 .parent = TYPE_VIRTIO_INPUT_PCI,
2442 .instance_size = sizeof(VirtIOInputHostPCI),
2443 .instance_init = virtio_host_initfn,
2444};
c6047e96 2445#endif
006a5ede 2446
0a2acf5e
FK		 2447/* virtio-pci-bus */
2448
ac7af112
AF		 2449static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
2450 VirtIOPCIProxy *dev)
0a2acf5e
FK		 2451{
2452 DeviceState *qdev = DEVICE(dev);
f4dd69aa
FK		 2453 char virtio_bus_name[] = "virtio-bus";
2454
fb17dfe0 2455 qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev,
f4dd69aa 2456 virtio_bus_name);
0a2acf5e
FK		 2457}
2458
2459static void virtio_pci_bus_class_init(ObjectClass *klass, void *data)
2460{
2461 BusClass *bus_class = BUS_CLASS(klass);
2462 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass);
2463 bus_class->max_dev = 1;
2464 k->notify = virtio_pci_notify;
2465 k->save_config = virtio_pci_save_config;
2466 k->load_config = virtio_pci_load_config;
2467 k->save_queue = virtio_pci_save_queue;
2468 k->load_queue = virtio_pci_load_queue;
a6df8adf
JW		 2469 k->save_extra_state = virtio_pci_save_extra_state;
2470 k->load_extra_state = virtio_pci_load_extra_state;
2471 k->has_extra_state = virtio_pci_has_extra_state;
0a2acf5e
FK		 2472 k->query_guest_notifiers = virtio_pci_query_guest_notifiers;
2473 k->set_host_notifier = virtio_pci_set_host_notifier;
2474 k->set_guest_notifiers = virtio_pci_set_guest_notifiers;
2475 k->vmstate_change = virtio_pci_vmstate_change;
085bccb7 2476 k->device_plugged = virtio_pci_device_plugged;
06a13073 2477 k->device_unplugged = virtio_pci_device_unplugged;
e0d686bf 2478 k->query_nvectors = virtio_pci_query_nvectors;
0a2acf5e
FK		 2479}
2480
2481static const TypeInfo virtio_pci_bus_info = {
2482 .name = TYPE_VIRTIO_PCI_BUS,
2483 .parent = TYPE_VIRTIO_BUS,
2484 .instance_size = sizeof(VirtioPCIBusState),
2485 .class_init = virtio_pci_bus_class_init,
2486};
2487
83f7d43a 2488static void virtio_pci_register_types(void)
53c25cea 2489{
59ccd20a 2490 type_register_static(&virtio_rng_pci_info);
f958c8aa 2491 type_register_static(&virtio_input_pci_info);
710e2d90
GH		 2492 type_register_static(&virtio_input_hid_pci_info);
2493 type_register_static(&virtio_keyboard_pci_info);
2494 type_register_static(&virtio_mouse_pci_info);
2495 type_register_static(&virtio_tablet_pci_info);
c6047e96 2496#ifdef CONFIG_LINUX
006a5ede 2497 type_register_static(&virtio_host_pci_info);
c6047e96 2498#endif
0a2acf5e 2499 type_register_static(&virtio_pci_bus_info);
085bccb7 2500 type_register_static(&virtio_pci_info);
60653b28 2501#ifdef CONFIG_VIRTFS
234a336f 2502 type_register_static(&virtio_9p_pci_info);
60653b28 2503#endif
653ced07 2504 type_register_static(&virtio_blk_pci_info);
bc7b90a0 2505 type_register_static(&virtio_scsi_pci_info);
e378e88d 2506 type_register_static(&virtio_balloon_pci_info);
f7f7464a 2507 type_register_static(&virtio_serial_pci_info);
e37da394 2508 type_register_static(&virtio_net_pci_info);
50787628
NB		 2509#ifdef CONFIG_VHOST_SCSI
2510 type_register_static(&vhost_scsi_pci_info);
2511#endif
53c25cea
PB		 2512}
2513
83f7d43a 2514type_init(virtio_pci_register_types)
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