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Commit | Line | Data |
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53c25cea PB |
1 | /* |
2 | * Virtio PCI Bindings | |
3 | * | |
4 | * Copyright IBM, Corp. 2007 | |
5 | * Copyright (c) 2009 CodeSourcery | |
6 | * | |
7 | * Authors: | |
8 | * Anthony Liguori <aliguori@us.ibm.com> | |
9 | * Paul Brook <paul@codesourcery.com> | |
10 | * | |
11 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
12 | * the COPYING file in the top-level directory. | |
13 | * | |
6b620ca3 PB |
14 | * Contributions after 2012-01-13 are licensed under the terms of the |
15 | * GNU GPL, version 2 or (at your option) any later version. | |
53c25cea PB |
16 | */ |
17 | ||
9b8bfe21 | 18 | #include "qemu/osdep.h" |
53c25cea | 19 | |
cbbe4f50 | 20 | #include "standard-headers/linux/virtio_pci.h" |
0d09e41a PB |
21 | #include "hw/virtio/virtio.h" |
22 | #include "hw/virtio/virtio-blk.h" | |
23 | #include "hw/virtio/virtio-net.h" | |
24 | #include "hw/virtio/virtio-serial.h" | |
25 | #include "hw/virtio/virtio-scsi.h" | |
26 | #include "hw/virtio/virtio-balloon.h" | |
f958c8aa | 27 | #include "hw/virtio/virtio-input.h" |
83c9f4ca | 28 | #include "hw/pci/pci.h" |
da34e65c | 29 | #include "qapi/error.h" |
1de7afc9 | 30 | #include "qemu/error-report.h" |
83c9f4ca PB |
31 | #include "hw/pci/msi.h" |
32 | #include "hw/pci/msix.h" | |
33 | #include "hw/loader.h" | |
9c17d615 | 34 | #include "sysemu/kvm.h" |
4be74634 | 35 | #include "sysemu/block-backend.h" |
47b43a1f | 36 | #include "virtio-pci.h" |
1de7afc9 | 37 | #include "qemu/range.h" |
0d09e41a | 38 | #include "hw/virtio/virtio-bus.h" |
24a6e7f4 | 39 | #include "qapi/visitor.h" |
53c25cea | 40 | |
cbbe4f50 | 41 | #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev)) |
aba800a3 | 42 | |
c17bef33 MT |
43 | #undef VIRTIO_PCI_CONFIG |
44 | ||
aba800a3 MT |
45 | /* The remaining space is defined by each driver as the per-driver |
46 | * configuration space */ | |
cbbe4f50 | 47 | #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev)) |
53c25cea | 48 | |
ac7af112 AF |
49 | static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, |
50 | VirtIOPCIProxy *dev); | |
75fd6f13 | 51 | static void virtio_pci_reset(DeviceState *qdev); |
d51fcfac | 52 | |
53c25cea | 53 | /* virtio device */ |
d2a0ccc6 MT |
54 | /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */ |
55 | static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d) | |
56 | { | |
57 | return container_of(d, VirtIOPCIProxy, pci_dev.qdev); | |
58 | } | |
53c25cea | 59 | |
d2a0ccc6 MT |
60 | /* DeviceState to VirtIOPCIProxy. Note: used on datapath, |
61 | * be careful and test performance if you change this. | |
62 | */ | |
63 | static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d) | |
53c25cea | 64 | { |
d2a0ccc6 MT |
65 | return container_of(d, VirtIOPCIProxy, pci_dev.qdev); |
66 | } | |
67 | ||
68 | static void virtio_pci_notify(DeviceState *d, uint16_t vector) | |
69 | { | |
70 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d); | |
a3fc66d9 | 71 | |
aba800a3 MT |
72 | if (msix_enabled(&proxy->pci_dev)) |
73 | msix_notify(&proxy->pci_dev, vector); | |
a3fc66d9 PB |
74 | else { |
75 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); | |
76 | pci_set_irq(&proxy->pci_dev, vdev->isr & 1); | |
77 | } | |
53c25cea PB |
78 | } |
79 | ||
d2a0ccc6 | 80 | static void virtio_pci_save_config(DeviceState *d, QEMUFile *f) |
ff24bd58 | 81 | { |
d2a0ccc6 | 82 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); |
a3fc66d9 PB |
83 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
84 | ||
ff24bd58 MT |
85 | pci_device_save(&proxy->pci_dev, f); |
86 | msix_save(&proxy->pci_dev, f); | |
87 | if (msix_present(&proxy->pci_dev)) | |
a3fc66d9 | 88 | qemu_put_be16(f, vdev->config_vector); |
ff24bd58 MT |
89 | } |
90 | ||
a6df8adf JW |
91 | static void virtio_pci_load_modern_queue_state(VirtIOPCIQueue *vq, |
92 | QEMUFile *f) | |
93 | { | |
94 | vq->num = qemu_get_be16(f); | |
95 | vq->enabled = qemu_get_be16(f); | |
96 | vq->desc[0] = qemu_get_be32(f); | |
97 | vq->desc[1] = qemu_get_be32(f); | |
98 | vq->avail[0] = qemu_get_be32(f); | |
99 | vq->avail[1] = qemu_get_be32(f); | |
100 | vq->used[0] = qemu_get_be32(f); | |
101 | vq->used[1] = qemu_get_be32(f); | |
102 | } | |
103 | ||
104 | static bool virtio_pci_has_extra_state(DeviceState *d) | |
105 | { | |
106 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); | |
107 | ||
108 | return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA; | |
109 | } | |
110 | ||
111 | static int get_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size) | |
112 | { | |
113 | VirtIOPCIProxy *proxy = pv; | |
114 | int i; | |
115 | ||
116 | proxy->dfselect = qemu_get_be32(f); | |
117 | proxy->gfselect = qemu_get_be32(f); | |
118 | proxy->guest_features[0] = qemu_get_be32(f); | |
119 | proxy->guest_features[1] = qemu_get_be32(f); | |
120 | for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { | |
121 | virtio_pci_load_modern_queue_state(&proxy->vqs[i], f); | |
122 | } | |
123 | ||
124 | return 0; | |
125 | } | |
126 | ||
127 | static void virtio_pci_save_modern_queue_state(VirtIOPCIQueue *vq, | |
128 | QEMUFile *f) | |
129 | { | |
130 | qemu_put_be16(f, vq->num); | |
131 | qemu_put_be16(f, vq->enabled); | |
132 | qemu_put_be32(f, vq->desc[0]); | |
133 | qemu_put_be32(f, vq->desc[1]); | |
134 | qemu_put_be32(f, vq->avail[0]); | |
135 | qemu_put_be32(f, vq->avail[1]); | |
136 | qemu_put_be32(f, vq->used[0]); | |
137 | qemu_put_be32(f, vq->used[1]); | |
138 | } | |
139 | ||
140 | static void put_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size) | |
141 | { | |
142 | VirtIOPCIProxy *proxy = pv; | |
143 | int i; | |
144 | ||
145 | qemu_put_be32(f, proxy->dfselect); | |
146 | qemu_put_be32(f, proxy->gfselect); | |
147 | qemu_put_be32(f, proxy->guest_features[0]); | |
148 | qemu_put_be32(f, proxy->guest_features[1]); | |
149 | for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { | |
150 | virtio_pci_save_modern_queue_state(&proxy->vqs[i], f); | |
151 | } | |
152 | } | |
153 | ||
154 | static const VMStateInfo vmstate_info_virtio_pci_modern_state = { | |
155 | .name = "virtqueue_state", | |
156 | .get = get_virtio_pci_modern_state, | |
157 | .put = put_virtio_pci_modern_state, | |
158 | }; | |
159 | ||
160 | static bool virtio_pci_modern_state_needed(void *opaque) | |
161 | { | |
162 | VirtIOPCIProxy *proxy = opaque; | |
163 | ||
9a4c0e22 | 164 | return virtio_pci_modern(proxy); |
a6df8adf JW |
165 | } |
166 | ||
167 | static const VMStateDescription vmstate_virtio_pci_modern_state = { | |
168 | .name = "virtio_pci/modern_state", | |
169 | .version_id = 1, | |
170 | .minimum_version_id = 1, | |
171 | .needed = &virtio_pci_modern_state_needed, | |
172 | .fields = (VMStateField[]) { | |
173 | { | |
174 | .name = "modern_state", | |
175 | .version_id = 0, | |
176 | .field_exists = NULL, | |
177 | .size = 0, | |
178 | .info = &vmstate_info_virtio_pci_modern_state, | |
179 | .flags = VMS_SINGLE, | |
180 | .offset = 0, | |
181 | }, | |
182 | VMSTATE_END_OF_LIST() | |
183 | } | |
184 | }; | |
185 | ||
186 | static const VMStateDescription vmstate_virtio_pci = { | |
187 | .name = "virtio_pci", | |
188 | .version_id = 1, | |
189 | .minimum_version_id = 1, | |
190 | .minimum_version_id_old = 1, | |
191 | .fields = (VMStateField[]) { | |
192 | VMSTATE_END_OF_LIST() | |
193 | }, | |
194 | .subsections = (const VMStateDescription*[]) { | |
195 | &vmstate_virtio_pci_modern_state, | |
196 | NULL | |
197 | } | |
198 | }; | |
199 | ||
200 | static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f) | |
201 | { | |
202 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); | |
203 | ||
204 | vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL); | |
205 | } | |
206 | ||
207 | static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f) | |
208 | { | |
209 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); | |
210 | ||
211 | return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1); | |
212 | } | |
213 | ||
d2a0ccc6 | 214 | static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f) |
ff24bd58 | 215 | { |
d2a0ccc6 | 216 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); |
a3fc66d9 PB |
217 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
218 | ||
ff24bd58 | 219 | if (msix_present(&proxy->pci_dev)) |
a3fc66d9 | 220 | qemu_put_be16(f, virtio_queue_vector(vdev, n)); |
ff24bd58 MT |
221 | } |
222 | ||
d2a0ccc6 | 223 | static int virtio_pci_load_config(DeviceState *d, QEMUFile *f) |
ff24bd58 | 224 | { |
d2a0ccc6 | 225 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); |
a3fc66d9 PB |
226 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
227 | ||
ff24bd58 MT |
228 | int ret; |
229 | ret = pci_device_load(&proxy->pci_dev, f); | |
e6da7680 | 230 | if (ret) { |
ff24bd58 | 231 | return ret; |
e6da7680 | 232 | } |
3cac001e | 233 | msix_unuse_all_vectors(&proxy->pci_dev); |
ff24bd58 | 234 | msix_load(&proxy->pci_dev, f); |
e6da7680 | 235 | if (msix_present(&proxy->pci_dev)) { |
a3fc66d9 | 236 | qemu_get_be16s(f, &vdev->config_vector); |
e6da7680 | 237 | } else { |
a3fc66d9 | 238 | vdev->config_vector = VIRTIO_NO_VECTOR; |
e6da7680 | 239 | } |
a3fc66d9 PB |
240 | if (vdev->config_vector != VIRTIO_NO_VECTOR) { |
241 | return msix_vector_use(&proxy->pci_dev, vdev->config_vector); | |
e6da7680 | 242 | } |
ff24bd58 MT |
243 | return 0; |
244 | } | |
245 | ||
d2a0ccc6 | 246 | static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f) |
ff24bd58 | 247 | { |
d2a0ccc6 | 248 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); |
a3fc66d9 PB |
249 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
250 | ||
ff24bd58 | 251 | uint16_t vector; |
e6da7680 MT |
252 | if (msix_present(&proxy->pci_dev)) { |
253 | qemu_get_be16s(f, &vector); | |
254 | } else { | |
255 | vector = VIRTIO_NO_VECTOR; | |
256 | } | |
a3fc66d9 | 257 | virtio_queue_set_vector(vdev, n, vector); |
e6da7680 MT |
258 | if (vector != VIRTIO_NO_VECTOR) { |
259 | return msix_vector_use(&proxy->pci_dev, vector); | |
260 | } | |
a6df8adf | 261 | |
ff24bd58 MT |
262 | return 0; |
263 | } | |
264 | ||
8e93cef1 | 265 | static bool virtio_pci_ioeventfd_enabled(DeviceState *d) |
9f06e71a CH |
266 | { |
267 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); | |
268 | ||
8e93cef1 | 269 | return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0; |
9f06e71a CH |
270 | } |
271 | ||
975acc0a JW |
272 | #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000 |
273 | ||
d9997d89 MA |
274 | static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy) |
275 | { | |
276 | return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ? | |
277 | QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4; | |
278 | } | |
279 | ||
9f06e71a CH |
280 | static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier, |
281 | int n, bool assign) | |
25db9ebe | 282 | { |
9f06e71a | 283 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); |
a3fc66d9 PB |
284 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
285 | VirtQueue *vq = virtio_get_queue(vdev, n); | |
9a4c0e22 MA |
286 | bool legacy = virtio_pci_legacy(proxy); |
287 | bool modern = virtio_pci_modern(proxy); | |
bc85ccfd | 288 | bool fast_mmio = kvm_ioeventfd_any_length_enabled(); |
9824d2a3 | 289 | bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; |
588255ad | 290 | MemoryRegion *modern_mr = &proxy->notify.mr; |
9824d2a3 | 291 | MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr; |
975acc0a | 292 | MemoryRegion *legacy_mr = &proxy->bar; |
d9997d89 | 293 | hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) * |
975acc0a JW |
294 | virtio_get_queue_index(vq); |
295 | hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY; | |
da146d0a | 296 | |
25db9ebe | 297 | if (assign) { |
975acc0a | 298 | if (modern) { |
bc85ccfd JW |
299 | if (fast_mmio) { |
300 | memory_region_add_eventfd(modern_mr, modern_addr, 0, | |
301 | false, n, notifier); | |
302 | } else { | |
303 | memory_region_add_eventfd(modern_mr, modern_addr, 2, | |
304 | false, n, notifier); | |
305 | } | |
9824d2a3 JW |
306 | if (modern_pio) { |
307 | memory_region_add_eventfd(modern_notify_mr, 0, 2, | |
308 | true, n, notifier); | |
309 | } | |
975acc0a JW |
310 | } |
311 | if (legacy) { | |
312 | memory_region_add_eventfd(legacy_mr, legacy_addr, 2, | |
313 | true, n, notifier); | |
314 | } | |
25db9ebe | 315 | } else { |
975acc0a | 316 | if (modern) { |
bc85ccfd JW |
317 | if (fast_mmio) { |
318 | memory_region_del_eventfd(modern_mr, modern_addr, 0, | |
319 | false, n, notifier); | |
320 | } else { | |
321 | memory_region_del_eventfd(modern_mr, modern_addr, 2, | |
322 | false, n, notifier); | |
323 | } | |
9824d2a3 JW |
324 | if (modern_pio) { |
325 | memory_region_del_eventfd(modern_notify_mr, 0, 2, | |
326 | true, n, notifier); | |
327 | } | |
975acc0a JW |
328 | } |
329 | if (legacy) { | |
330 | memory_region_del_eventfd(legacy_mr, legacy_addr, 2, | |
331 | true, n, notifier); | |
332 | } | |
25db9ebe | 333 | } |
9f06e71a | 334 | return 0; |
25db9ebe SH |
335 | } |
336 | ||
b36e3914 | 337 | static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy) |
25db9ebe | 338 | { |
9f06e71a | 339 | virtio_bus_start_ioeventfd(&proxy->bus); |
25db9ebe SH |
340 | } |
341 | ||
b36e3914 | 342 | static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy) |
25db9ebe | 343 | { |
9f06e71a | 344 | virtio_bus_stop_ioeventfd(&proxy->bus); |
25db9ebe SH |
345 | } |
346 | ||
53c25cea PB |
347 | static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val) |
348 | { | |
349 | VirtIOPCIProxy *proxy = opaque; | |
a3fc66d9 | 350 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
a8170e5e | 351 | hwaddr pa; |
53c25cea | 352 | |
53c25cea PB |
353 | switch (addr) { |
354 | case VIRTIO_PCI_GUEST_FEATURES: | |
181103cd FK |
355 | /* Guest does not negotiate properly? We have to assume nothing. */ |
356 | if (val & (1 << VIRTIO_F_BAD_FEATURE)) { | |
357 | val = virtio_bus_get_vdev_bad_features(&proxy->bus); | |
358 | } | |
ad0c9332 | 359 | virtio_set_features(vdev, val); |
53c25cea PB |
360 | break; |
361 | case VIRTIO_PCI_QUEUE_PFN: | |
a8170e5e | 362 | pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT; |
1b8e9b27 | 363 | if (pa == 0) { |
75fd6f13 | 364 | virtio_pci_reset(DEVICE(proxy)); |
1b8e9b27 | 365 | } |
7055e687 MT |
366 | else |
367 | virtio_queue_set_addr(vdev, vdev->queue_sel, pa); | |
53c25cea PB |
368 | break; |
369 | case VIRTIO_PCI_QUEUE_SEL: | |
87b3bd1c | 370 | if (val < VIRTIO_QUEUE_MAX) |
53c25cea PB |
371 | vdev->queue_sel = val; |
372 | break; | |
373 | case VIRTIO_PCI_QUEUE_NOTIFY: | |
87b3bd1c | 374 | if (val < VIRTIO_QUEUE_MAX) { |
7157e2e2 SH |
375 | virtio_queue_notify(vdev, val); |
376 | } | |
53c25cea PB |
377 | break; |
378 | case VIRTIO_PCI_STATUS: | |
25db9ebe SH |
379 | if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { |
380 | virtio_pci_stop_ioeventfd(proxy); | |
381 | } | |
382 | ||
3e607cb5 | 383 | virtio_set_status(vdev, val & 0xFF); |
25db9ebe SH |
384 | |
385 | if (val & VIRTIO_CONFIG_S_DRIVER_OK) { | |
386 | virtio_pci_start_ioeventfd(proxy); | |
387 | } | |
388 | ||
1b8e9b27 | 389 | if (vdev->status == 0) { |
75fd6f13 | 390 | virtio_pci_reset(DEVICE(proxy)); |
1b8e9b27 | 391 | } |
c81131db | 392 | |
e43c0b2e MT |
393 | /* Linux before 2.6.34 drives the device without enabling |
394 | the PCI device bus master bit. Enable it automatically | |
395 | for the guest. This is a PCI spec violation but so is | |
396 | initiating DMA with bus master bit clear. */ | |
397 | if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) { | |
398 | pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, | |
399 | proxy->pci_dev.config[PCI_COMMAND] | | |
400 | PCI_COMMAND_MASTER, 1); | |
401 | } | |
53c25cea | 402 | break; |
aba800a3 MT |
403 | case VIRTIO_MSI_CONFIG_VECTOR: |
404 | msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); | |
405 | /* Make it possible for guest to discover an error took place. */ | |
406 | if (msix_vector_use(&proxy->pci_dev, val) < 0) | |
407 | val = VIRTIO_NO_VECTOR; | |
408 | vdev->config_vector = val; | |
409 | break; | |
410 | case VIRTIO_MSI_QUEUE_VECTOR: | |
411 | msix_vector_unuse(&proxy->pci_dev, | |
412 | virtio_queue_vector(vdev, vdev->queue_sel)); | |
413 | /* Make it possible for guest to discover an error took place. */ | |
414 | if (msix_vector_use(&proxy->pci_dev, val) < 0) | |
415 | val = VIRTIO_NO_VECTOR; | |
416 | virtio_queue_set_vector(vdev, vdev->queue_sel, val); | |
417 | break; | |
418 | default: | |
4e02d460 SH |
419 | error_report("%s: unexpected address 0x%x value 0x%x", |
420 | __func__, addr, val); | |
aba800a3 | 421 | break; |
53c25cea PB |
422 | } |
423 | } | |
424 | ||
aba800a3 | 425 | static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr) |
53c25cea | 426 | { |
a3fc66d9 | 427 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
53c25cea PB |
428 | uint32_t ret = 0xFFFFFFFF; |
429 | ||
53c25cea PB |
430 | switch (addr) { |
431 | case VIRTIO_PCI_HOST_FEATURES: | |
6b8f1020 | 432 | ret = vdev->host_features; |
53c25cea PB |
433 | break; |
434 | case VIRTIO_PCI_GUEST_FEATURES: | |
704a76fc | 435 | ret = vdev->guest_features; |
53c25cea PB |
436 | break; |
437 | case VIRTIO_PCI_QUEUE_PFN: | |
438 | ret = virtio_queue_get_addr(vdev, vdev->queue_sel) | |
439 | >> VIRTIO_PCI_QUEUE_ADDR_SHIFT; | |
440 | break; | |
441 | case VIRTIO_PCI_QUEUE_NUM: | |
442 | ret = virtio_queue_get_num(vdev, vdev->queue_sel); | |
443 | break; | |
444 | case VIRTIO_PCI_QUEUE_SEL: | |
445 | ret = vdev->queue_sel; | |
446 | break; | |
447 | case VIRTIO_PCI_STATUS: | |
448 | ret = vdev->status; | |
449 | break; | |
450 | case VIRTIO_PCI_ISR: | |
451 | /* reading from the ISR also clears it. */ | |
452 | ret = vdev->isr; | |
453 | vdev->isr = 0; | |
9e64f8a3 | 454 | pci_irq_deassert(&proxy->pci_dev); |
53c25cea | 455 | break; |
aba800a3 MT |
456 | case VIRTIO_MSI_CONFIG_VECTOR: |
457 | ret = vdev->config_vector; | |
458 | break; | |
459 | case VIRTIO_MSI_QUEUE_VECTOR: | |
460 | ret = virtio_queue_vector(vdev, vdev->queue_sel); | |
461 | break; | |
53c25cea PB |
462 | default: |
463 | break; | |
464 | } | |
465 | ||
466 | return ret; | |
467 | } | |
468 | ||
df6db5b3 AG |
469 | static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr, |
470 | unsigned size) | |
53c25cea PB |
471 | { |
472 | VirtIOPCIProxy *proxy = opaque; | |
a3fc66d9 | 473 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
cbbe4f50 | 474 | uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); |
df6db5b3 | 475 | uint64_t val = 0; |
aba800a3 | 476 | if (addr < config) { |
df6db5b3 | 477 | return virtio_ioport_read(proxy, addr); |
aba800a3 MT |
478 | } |
479 | addr -= config; | |
53c25cea | 480 | |
df6db5b3 AG |
481 | switch (size) { |
482 | case 1: | |
a3fc66d9 | 483 | val = virtio_config_readb(vdev, addr); |
df6db5b3 AG |
484 | break; |
485 | case 2: | |
a3fc66d9 | 486 | val = virtio_config_readw(vdev, addr); |
616a6552 | 487 | if (virtio_is_big_endian(vdev)) { |
8e4a424b BS |
488 | val = bswap16(val); |
489 | } | |
df6db5b3 AG |
490 | break; |
491 | case 4: | |
a3fc66d9 | 492 | val = virtio_config_readl(vdev, addr); |
616a6552 | 493 | if (virtio_is_big_endian(vdev)) { |
8e4a424b BS |
494 | val = bswap32(val); |
495 | } | |
df6db5b3 | 496 | break; |
82afa586 | 497 | } |
df6db5b3 | 498 | return val; |
53c25cea PB |
499 | } |
500 | ||
df6db5b3 AG |
501 | static void virtio_pci_config_write(void *opaque, hwaddr addr, |
502 | uint64_t val, unsigned size) | |
53c25cea PB |
503 | { |
504 | VirtIOPCIProxy *proxy = opaque; | |
cbbe4f50 | 505 | uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); |
a3fc66d9 | 506 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
aba800a3 MT |
507 | if (addr < config) { |
508 | virtio_ioport_write(proxy, addr, val); | |
509 | return; | |
510 | } | |
511 | addr -= config; | |
df6db5b3 AG |
512 | /* |
513 | * Virtio-PCI is odd. Ioports are LE but config space is target native | |
514 | * endian. | |
515 | */ | |
516 | switch (size) { | |
517 | case 1: | |
a3fc66d9 | 518 | virtio_config_writeb(vdev, addr, val); |
df6db5b3 AG |
519 | break; |
520 | case 2: | |
616a6552 | 521 | if (virtio_is_big_endian(vdev)) { |
8e4a424b BS |
522 | val = bswap16(val); |
523 | } | |
a3fc66d9 | 524 | virtio_config_writew(vdev, addr, val); |
df6db5b3 AG |
525 | break; |
526 | case 4: | |
616a6552 | 527 | if (virtio_is_big_endian(vdev)) { |
8e4a424b BS |
528 | val = bswap32(val); |
529 | } | |
a3fc66d9 | 530 | virtio_config_writel(vdev, addr, val); |
df6db5b3 | 531 | break; |
82afa586 | 532 | } |
53c25cea PB |
533 | } |
534 | ||
da146d0a | 535 | static const MemoryRegionOps virtio_pci_config_ops = { |
df6db5b3 AG |
536 | .read = virtio_pci_config_read, |
537 | .write = virtio_pci_config_write, | |
538 | .impl = { | |
539 | .min_access_size = 1, | |
540 | .max_access_size = 4, | |
541 | }, | |
8e4a424b | 542 | .endianness = DEVICE_LITTLE_ENDIAN, |
da146d0a | 543 | }; |
aba800a3 | 544 | |
1e40356c MT |
545 | /* Below are generic functions to do memcpy from/to an address space, |
546 | * without byteswaps, with input validation. | |
547 | * | |
548 | * As regular address_space_* APIs all do some kind of byteswap at least for | |
549 | * some host/target combinations, we are forced to explicitly convert to a | |
550 | * known-endianness integer value. | |
551 | * It doesn't really matter which endian format to go through, so the code | |
552 | * below selects the endian that causes the least amount of work on the given | |
553 | * host. | |
554 | * | |
555 | * Note: host pointer must be aligned. | |
556 | */ | |
557 | static | |
558 | void virtio_address_space_write(AddressSpace *as, hwaddr addr, | |
559 | const uint8_t *buf, int len) | |
560 | { | |
561 | uint32_t val; | |
562 | ||
563 | /* address_space_* APIs assume an aligned address. | |
564 | * As address is under guest control, handle illegal values. | |
565 | */ | |
566 | addr &= ~(len - 1); | |
567 | ||
568 | /* Make sure caller aligned buf properly */ | |
569 | assert(!(((uintptr_t)buf) & (len - 1))); | |
570 | ||
571 | switch (len) { | |
572 | case 1: | |
573 | val = pci_get_byte(buf); | |
574 | address_space_stb(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); | |
575 | break; | |
576 | case 2: | |
577 | val = pci_get_word(buf); | |
578 | address_space_stw_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); | |
579 | break; | |
580 | case 4: | |
581 | val = pci_get_long(buf); | |
582 | address_space_stl_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); | |
583 | break; | |
584 | default: | |
585 | /* As length is under guest control, handle illegal values. */ | |
586 | break; | |
587 | } | |
588 | } | |
589 | ||
590 | static void | |
591 | virtio_address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len) | |
592 | { | |
593 | uint32_t val; | |
594 | ||
595 | /* address_space_* APIs assume an aligned address. | |
596 | * As address is under guest control, handle illegal values. | |
597 | */ | |
598 | addr &= ~(len - 1); | |
599 | ||
600 | /* Make sure caller aligned buf properly */ | |
601 | assert(!(((uintptr_t)buf) & (len - 1))); | |
602 | ||
603 | switch (len) { | |
604 | case 1: | |
605 | val = address_space_ldub(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); | |
606 | pci_set_byte(buf, val); | |
607 | break; | |
608 | case 2: | |
609 | val = address_space_lduw_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); | |
610 | pci_set_word(buf, val); | |
611 | break; | |
612 | case 4: | |
613 | val = address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); | |
614 | pci_set_long(buf, val); | |
615 | break; | |
616 | default: | |
617 | /* As length is under guest control, handle illegal values. */ | |
618 | break; | |
619 | } | |
620 | } | |
621 | ||
aba800a3 MT |
622 | static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, |
623 | uint32_t val, int len) | |
624 | { | |
ed757e14 | 625 | VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); |
a3fc66d9 | 626 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
ada434cd | 627 | struct virtio_pci_cfg_cap *cfg; |
ed757e14 | 628 | |
1129714f MT |
629 | pci_default_write_config(pci_dev, address, val, len); |
630 | ||
631 | if (range_covers_byte(address, len, PCI_COMMAND) && | |
68a27b20 | 632 | !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { |
1129714f | 633 | virtio_pci_stop_ioeventfd(proxy); |
45363e46 | 634 | virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK); |
ed757e14 | 635 | } |
ada434cd MT |
636 | |
637 | if (proxy->config_cap && | |
638 | ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, | |
639 | pci_cfg_data), | |
640 | sizeof cfg->pci_cfg_data)) { | |
641 | uint32_t off; | |
642 | uint32_t len; | |
643 | ||
644 | cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); | |
645 | off = le32_to_cpu(cfg->cap.offset); | |
646 | len = le32_to_cpu(cfg->cap.length); | |
647 | ||
2a639123 MT |
648 | if (len == 1 || len == 2 || len == 4) { |
649 | assert(len <= sizeof cfg->pci_cfg_data); | |
1e40356c MT |
650 | virtio_address_space_write(&proxy->modern_as, off, |
651 | cfg->pci_cfg_data, len); | |
ada434cd MT |
652 | } |
653 | } | |
654 | } | |
655 | ||
656 | static uint32_t virtio_read_config(PCIDevice *pci_dev, | |
657 | uint32_t address, int len) | |
658 | { | |
659 | VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); | |
660 | struct virtio_pci_cfg_cap *cfg; | |
661 | ||
662 | if (proxy->config_cap && | |
663 | ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, | |
664 | pci_cfg_data), | |
665 | sizeof cfg->pci_cfg_data)) { | |
666 | uint32_t off; | |
667 | uint32_t len; | |
668 | ||
669 | cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); | |
670 | off = le32_to_cpu(cfg->cap.offset); | |
671 | len = le32_to_cpu(cfg->cap.length); | |
672 | ||
2a639123 MT |
673 | if (len == 1 || len == 2 || len == 4) { |
674 | assert(len <= sizeof cfg->pci_cfg_data); | |
1e40356c MT |
675 | virtio_address_space_read(&proxy->modern_as, off, |
676 | cfg->pci_cfg_data, len); | |
ada434cd MT |
677 | } |
678 | } | |
679 | ||
680 | return pci_default_read_config(pci_dev, address, len); | |
53c25cea PB |
681 | } |
682 | ||
7d37d351 JK |
683 | static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy, |
684 | unsigned int queue_no, | |
d1f6af6a | 685 | unsigned int vector) |
7d37d351 | 686 | { |
7d37d351 | 687 | VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; |
15b2bd18 | 688 | int ret; |
7d37d351 JK |
689 | |
690 | if (irqfd->users == 0) { | |
d1f6af6a | 691 | ret = kvm_irqchip_add_msi_route(kvm_state, vector, &proxy->pci_dev); |
7d37d351 JK |
692 | if (ret < 0) { |
693 | return ret; | |
694 | } | |
695 | irqfd->virq = ret; | |
696 | } | |
697 | irqfd->users++; | |
7d37d351 JK |
698 | return 0; |
699 | } | |
700 | ||
701 | static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy, | |
7d37d351 | 702 | unsigned int vector) |
774345f9 MT |
703 | { |
704 | VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; | |
705 | if (--irqfd->users == 0) { | |
706 | kvm_irqchip_release_virq(kvm_state, irqfd->virq); | |
707 | } | |
708 | } | |
709 | ||
f1d0f15a MT |
710 | static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy, |
711 | unsigned int queue_no, | |
712 | unsigned int vector) | |
713 | { | |
714 | VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; | |
a3fc66d9 PB |
715 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
716 | VirtQueue *vq = virtio_get_queue(vdev, queue_no); | |
f1d0f15a | 717 | EventNotifier *n = virtio_queue_get_guest_notifier(vq); |
9be38598 | 718 | return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq); |
f1d0f15a MT |
719 | } |
720 | ||
721 | static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy, | |
722 | unsigned int queue_no, | |
723 | unsigned int vector) | |
7d37d351 | 724 | { |
a3fc66d9 PB |
725 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
726 | VirtQueue *vq = virtio_get_queue(vdev, queue_no); | |
15b2bd18 | 727 | EventNotifier *n = virtio_queue_get_guest_notifier(vq); |
7d37d351 | 728 | VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; |
15b2bd18 | 729 | int ret; |
7d37d351 | 730 | |
1c9b71a7 | 731 | ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq); |
7d37d351 | 732 | assert(ret == 0); |
f1d0f15a | 733 | } |
7d37d351 | 734 | |
774345f9 MT |
735 | static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs) |
736 | { | |
737 | PCIDevice *dev = &proxy->pci_dev; | |
a3fc66d9 | 738 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
181103cd | 739 | VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); |
774345f9 MT |
740 | unsigned int vector; |
741 | int ret, queue_no; | |
774345f9 MT |
742 | |
743 | for (queue_no = 0; queue_no < nvqs; queue_no++) { | |
744 | if (!virtio_queue_get_num(vdev, queue_no)) { | |
745 | break; | |
746 | } | |
747 | vector = virtio_queue_vector(vdev, queue_no); | |
748 | if (vector >= msix_nr_vectors_allocated(dev)) { | |
749 | continue; | |
750 | } | |
d1f6af6a | 751 | ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector); |
774345f9 MT |
752 | if (ret < 0) { |
753 | goto undo; | |
7d37d351 | 754 | } |
f1d0f15a MT |
755 | /* If guest supports masking, set up irqfd now. |
756 | * Otherwise, delay until unmasked in the frontend. | |
757 | */ | |
5669655a | 758 | if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { |
f1d0f15a MT |
759 | ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); |
760 | if (ret < 0) { | |
761 | kvm_virtio_pci_vq_vector_release(proxy, vector); | |
762 | goto undo; | |
763 | } | |
764 | } | |
7d37d351 | 765 | } |
7d37d351 | 766 | return 0; |
774345f9 MT |
767 | |
768 | undo: | |
769 | while (--queue_no >= 0) { | |
770 | vector = virtio_queue_vector(vdev, queue_no); | |
771 | if (vector >= msix_nr_vectors_allocated(dev)) { | |
772 | continue; | |
773 | } | |
5669655a | 774 | if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { |
e387f99e | 775 | kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); |
f1d0f15a | 776 | } |
774345f9 MT |
777 | kvm_virtio_pci_vq_vector_release(proxy, vector); |
778 | } | |
779 | return ret; | |
7d37d351 JK |
780 | } |
781 | ||
774345f9 MT |
782 | static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs) |
783 | { | |
784 | PCIDevice *dev = &proxy->pci_dev; | |
a3fc66d9 | 785 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
774345f9 MT |
786 | unsigned int vector; |
787 | int queue_no; | |
181103cd | 788 | VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); |
774345f9 MT |
789 | |
790 | for (queue_no = 0; queue_no < nvqs; queue_no++) { | |
791 | if (!virtio_queue_get_num(vdev, queue_no)) { | |
792 | break; | |
793 | } | |
794 | vector = virtio_queue_vector(vdev, queue_no); | |
795 | if (vector >= msix_nr_vectors_allocated(dev)) { | |
796 | continue; | |
797 | } | |
f1d0f15a MT |
798 | /* If guest supports masking, clean up irqfd now. |
799 | * Otherwise, it was cleaned when masked in the frontend. | |
800 | */ | |
5669655a | 801 | if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { |
e387f99e | 802 | kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); |
f1d0f15a | 803 | } |
774345f9 MT |
804 | kvm_virtio_pci_vq_vector_release(proxy, vector); |
805 | } | |
806 | } | |
807 | ||
a38b2c49 MT |
808 | static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy, |
809 | unsigned int queue_no, | |
810 | unsigned int vector, | |
811 | MSIMessage msg) | |
774345f9 | 812 | { |
a3fc66d9 PB |
813 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
814 | VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); | |
815 | VirtQueue *vq = virtio_get_queue(vdev, queue_no); | |
774345f9 | 816 | EventNotifier *n = virtio_queue_get_guest_notifier(vq); |
a38b2c49 | 817 | VirtIOIRQFD *irqfd; |
53510bfc | 818 | int ret = 0; |
774345f9 | 819 | |
a38b2c49 MT |
820 | if (proxy->vector_irqfd) { |
821 | irqfd = &proxy->vector_irqfd[vector]; | |
822 | if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) { | |
dc9f06ca PF |
823 | ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg, |
824 | &proxy->pci_dev); | |
a38b2c49 MT |
825 | if (ret < 0) { |
826 | return ret; | |
827 | } | |
3f1fea0f | 828 | kvm_irqchip_commit_routes(kvm_state); |
774345f9 MT |
829 | } |
830 | } | |
831 | ||
f1d0f15a MT |
832 | /* If guest supports masking, irqfd is already setup, unmask it. |
833 | * Otherwise, set it up now. | |
834 | */ | |
5669655a | 835 | if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { |
a3fc66d9 | 836 | k->guest_notifier_mask(vdev, queue_no, false); |
f1d0f15a | 837 | /* Test after unmasking to avoid losing events. */ |
181103cd | 838 | if (k->guest_notifier_pending && |
a3fc66d9 | 839 | k->guest_notifier_pending(vdev, queue_no)) { |
f1d0f15a MT |
840 | event_notifier_set(n); |
841 | } | |
842 | } else { | |
843 | ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); | |
7d37d351 | 844 | } |
774345f9 | 845 | return ret; |
7d37d351 JK |
846 | } |
847 | ||
a38b2c49 | 848 | static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy, |
7d37d351 JK |
849 | unsigned int queue_no, |
850 | unsigned int vector) | |
851 | { | |
a3fc66d9 PB |
852 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
853 | VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); | |
181103cd | 854 | |
f1d0f15a MT |
855 | /* If guest supports masking, keep irqfd but mask it. |
856 | * Otherwise, clean it up now. | |
857 | */ | |
5669655a | 858 | if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { |
a3fc66d9 | 859 | k->guest_notifier_mask(vdev, queue_no, true); |
f1d0f15a | 860 | } else { |
e387f99e | 861 | kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); |
f1d0f15a | 862 | } |
7d37d351 JK |
863 | } |
864 | ||
a38b2c49 MT |
865 | static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector, |
866 | MSIMessage msg) | |
7d37d351 JK |
867 | { |
868 | VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); | |
a3fc66d9 | 869 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
851c2a75 JW |
870 | VirtQueue *vq = virtio_vector_first_queue(vdev, vector); |
871 | int ret, index, unmasked = 0; | |
7d37d351 | 872 | |
851c2a75 JW |
873 | while (vq) { |
874 | index = virtio_get_queue_index(vq); | |
875 | if (!virtio_queue_get_num(vdev, index)) { | |
7d37d351 JK |
876 | break; |
877 | } | |
6652d081 JW |
878 | if (index < proxy->nvqs_with_notifiers) { |
879 | ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg); | |
880 | if (ret < 0) { | |
881 | goto undo; | |
882 | } | |
883 | ++unmasked; | |
7d37d351 | 884 | } |
851c2a75 | 885 | vq = virtio_vector_next_queue(vq); |
7d37d351 | 886 | } |
851c2a75 | 887 | |
7d37d351 JK |
888 | return 0; |
889 | ||
890 | undo: | |
851c2a75 | 891 | vq = virtio_vector_first_queue(vdev, vector); |
6652d081 | 892 | while (vq && unmasked >= 0) { |
851c2a75 | 893 | index = virtio_get_queue_index(vq); |
6652d081 JW |
894 | if (index < proxy->nvqs_with_notifiers) { |
895 | virtio_pci_vq_vector_mask(proxy, index, vector); | |
896 | --unmasked; | |
897 | } | |
851c2a75 | 898 | vq = virtio_vector_next_queue(vq); |
7d37d351 JK |
899 | } |
900 | return ret; | |
901 | } | |
902 | ||
a38b2c49 | 903 | static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector) |
7d37d351 JK |
904 | { |
905 | VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); | |
a3fc66d9 | 906 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
851c2a75 JW |
907 | VirtQueue *vq = virtio_vector_first_queue(vdev, vector); |
908 | int index; | |
7d37d351 | 909 | |
851c2a75 JW |
910 | while (vq) { |
911 | index = virtio_get_queue_index(vq); | |
912 | if (!virtio_queue_get_num(vdev, index)) { | |
7d37d351 JK |
913 | break; |
914 | } | |
6652d081 JW |
915 | if (index < proxy->nvqs_with_notifiers) { |
916 | virtio_pci_vq_vector_mask(proxy, index, vector); | |
917 | } | |
851c2a75 | 918 | vq = virtio_vector_next_queue(vq); |
7d37d351 JK |
919 | } |
920 | } | |
921 | ||
a38b2c49 MT |
922 | static void virtio_pci_vector_poll(PCIDevice *dev, |
923 | unsigned int vector_start, | |
924 | unsigned int vector_end) | |
89d62be9 MT |
925 | { |
926 | VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); | |
a3fc66d9 | 927 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
181103cd | 928 | VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); |
89d62be9 MT |
929 | int queue_no; |
930 | unsigned int vector; | |
931 | EventNotifier *notifier; | |
932 | VirtQueue *vq; | |
933 | ||
2d620f59 | 934 | for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) { |
89d62be9 MT |
935 | if (!virtio_queue_get_num(vdev, queue_no)) { |
936 | break; | |
937 | } | |
938 | vector = virtio_queue_vector(vdev, queue_no); | |
939 | if (vector < vector_start || vector >= vector_end || | |
940 | !msix_is_masked(dev, vector)) { | |
941 | continue; | |
942 | } | |
943 | vq = virtio_get_queue(vdev, queue_no); | |
944 | notifier = virtio_queue_get_guest_notifier(vq); | |
181103cd FK |
945 | if (k->guest_notifier_pending) { |
946 | if (k->guest_notifier_pending(vdev, queue_no)) { | |
f1d0f15a MT |
947 | msix_set_pending(dev, vector); |
948 | } | |
949 | } else if (event_notifier_test_and_clear(notifier)) { | |
89d62be9 MT |
950 | msix_set_pending(dev, vector); |
951 | } | |
952 | } | |
953 | } | |
954 | ||
955 | static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign, | |
956 | bool with_irqfd) | |
ade80dc8 | 957 | { |
d2a0ccc6 | 958 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); |
a3fc66d9 PB |
959 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
960 | VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); | |
961 | VirtQueue *vq = virtio_get_queue(vdev, n); | |
ade80dc8 MT |
962 | EventNotifier *notifier = virtio_queue_get_guest_notifier(vq); |
963 | ||
964 | if (assign) { | |
965 | int r = event_notifier_init(notifier, 0); | |
966 | if (r < 0) { | |
967 | return r; | |
968 | } | |
89d62be9 | 969 | virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd); |
ade80dc8 | 970 | } else { |
89d62be9 | 971 | virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd); |
ade80dc8 MT |
972 | event_notifier_cleanup(notifier); |
973 | } | |
974 | ||
5669655a VK |
975 | if (!msix_enabled(&proxy->pci_dev) && |
976 | vdev->use_guest_notifier_mask && | |
977 | vdc->guest_notifier_mask) { | |
a3fc66d9 | 978 | vdc->guest_notifier_mask(vdev, n, !assign); |
62c96360 MT |
979 | } |
980 | ||
ade80dc8 MT |
981 | return 0; |
982 | } | |
983 | ||
d2a0ccc6 | 984 | static bool virtio_pci_query_guest_notifiers(DeviceState *d) |
5430a28f | 985 | { |
d2a0ccc6 | 986 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); |
5430a28f MT |
987 | return msix_enabled(&proxy->pci_dev); |
988 | } | |
989 | ||
2d620f59 | 990 | static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign) |
54dd9321 | 991 | { |
d2a0ccc6 | 992 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); |
a3fc66d9 | 993 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
181103cd | 994 | VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); |
54dd9321 | 995 | int r, n; |
89d62be9 MT |
996 | bool with_irqfd = msix_enabled(&proxy->pci_dev) && |
997 | kvm_msi_via_irqfd_enabled(); | |
54dd9321 | 998 | |
87b3bd1c | 999 | nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX); |
2d620f59 MT |
1000 | |
1001 | /* When deassigning, pass a consistent nvqs value | |
1002 | * to avoid leaking notifiers. | |
1003 | */ | |
1004 | assert(assign || nvqs == proxy->nvqs_with_notifiers); | |
1005 | ||
1006 | proxy->nvqs_with_notifiers = nvqs; | |
1007 | ||
7d37d351 | 1008 | /* Must unset vector notifier while guest notifier is still assigned */ |
181103cd | 1009 | if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) { |
7d37d351 | 1010 | msix_unset_vector_notifiers(&proxy->pci_dev); |
a38b2c49 MT |
1011 | if (proxy->vector_irqfd) { |
1012 | kvm_virtio_pci_vector_release(proxy, nvqs); | |
1013 | g_free(proxy->vector_irqfd); | |
1014 | proxy->vector_irqfd = NULL; | |
1015 | } | |
7d37d351 JK |
1016 | } |
1017 | ||
2d620f59 | 1018 | for (n = 0; n < nvqs; n++) { |
54dd9321 MT |
1019 | if (!virtio_queue_get_num(vdev, n)) { |
1020 | break; | |
1021 | } | |
1022 | ||
23fe2b3f | 1023 | r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd); |
54dd9321 MT |
1024 | if (r < 0) { |
1025 | goto assign_error; | |
1026 | } | |
1027 | } | |
1028 | ||
7d37d351 | 1029 | /* Must set vector notifier after guest notifier has been assigned */ |
181103cd | 1030 | if ((with_irqfd || k->guest_notifier_mask) && assign) { |
a38b2c49 MT |
1031 | if (with_irqfd) { |
1032 | proxy->vector_irqfd = | |
1033 | g_malloc0(sizeof(*proxy->vector_irqfd) * | |
1034 | msix_nr_vectors_allocated(&proxy->pci_dev)); | |
1035 | r = kvm_virtio_pci_vector_use(proxy, nvqs); | |
1036 | if (r < 0) { | |
1037 | goto assign_error; | |
1038 | } | |
774345f9 | 1039 | } |
7d37d351 | 1040 | r = msix_set_vector_notifiers(&proxy->pci_dev, |
a38b2c49 MT |
1041 | virtio_pci_vector_unmask, |
1042 | virtio_pci_vector_mask, | |
1043 | virtio_pci_vector_poll); | |
7d37d351 | 1044 | if (r < 0) { |
774345f9 | 1045 | goto notifiers_error; |
7d37d351 JK |
1046 | } |
1047 | } | |
1048 | ||
54dd9321 MT |
1049 | return 0; |
1050 | ||
774345f9 | 1051 | notifiers_error: |
a38b2c49 MT |
1052 | if (with_irqfd) { |
1053 | assert(assign); | |
1054 | kvm_virtio_pci_vector_release(proxy, nvqs); | |
1055 | } | |
774345f9 | 1056 | |
54dd9321 MT |
1057 | assign_error: |
1058 | /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */ | |
7d37d351 | 1059 | assert(assign); |
54dd9321 | 1060 | while (--n >= 0) { |
89d62be9 | 1061 | virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd); |
54dd9321 MT |
1062 | } |
1063 | return r; | |
1064 | } | |
1065 | ||
d2a0ccc6 | 1066 | static void virtio_pci_vmstate_change(DeviceState *d, bool running) |
25db9ebe | 1067 | { |
d2a0ccc6 | 1068 | VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); |
a3fc66d9 | 1069 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
25db9ebe SH |
1070 | |
1071 | if (running) { | |
68a27b20 MT |
1072 | /* Old QEMU versions did not set bus master enable on status write. |
1073 | * Detect DRIVER set and enable it. | |
1074 | */ | |
1075 | if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) && | |
1076 | (vdev->status & VIRTIO_CONFIG_S_DRIVER) && | |
45363e46 | 1077 | !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { |
68a27b20 MT |
1078 | pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, |
1079 | proxy->pci_dev.config[PCI_COMMAND] | | |
1080 | PCI_COMMAND_MASTER, 1); | |
89c473fd | 1081 | } |
25db9ebe | 1082 | virtio_pci_start_ioeventfd(proxy); |
ade80dc8 | 1083 | } else { |
25db9ebe | 1084 | virtio_pci_stop_ioeventfd(proxy); |
ade80dc8 | 1085 | } |
ade80dc8 MT |
1086 | } |
1087 | ||
60653b28 | 1088 | #ifdef CONFIG_VIRTFS |
fc079951 | 1089 | static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) |
60653b28 | 1090 | { |
234a336f FK |
1091 | V9fsPCIState *dev = VIRTIO_9P_PCI(vpci_dev); |
1092 | DeviceState *vdev = DEVICE(&dev->vdev); | |
60653b28 | 1093 | |
234a336f | 1094 | qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); |
fc079951 | 1095 | object_property_set_bool(OBJECT(vdev), true, "realized", errp); |
60653b28 PB |
1096 | } |
1097 | ||
234a336f FK |
1098 | static Property virtio_9p_pci_properties[] = { |
1099 | DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, | |
1100 | VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), | |
60653b28 | 1101 | DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), |
60653b28 PB |
1102 | DEFINE_PROP_END_OF_LIST(), |
1103 | }; | |
1104 | ||
234a336f | 1105 | static void virtio_9p_pci_class_init(ObjectClass *klass, void *data) |
60653b28 PB |
1106 | { |
1107 | DeviceClass *dc = DEVICE_CLASS(klass); | |
234a336f FK |
1108 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); |
1109 | VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); | |
60653b28 | 1110 | |
fc079951 | 1111 | k->realize = virtio_9p_pci_realize; |
234a336f FK |
1112 | pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; |
1113 | pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_9P; | |
1114 | pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; | |
1115 | pcidev_k->class_id = 0x2; | |
125ee0ed | 1116 | set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); |
234a336f | 1117 | dc->props = virtio_9p_pci_properties; |
60653b28 PB |
1118 | } |
1119 | ||
234a336f FK |
1120 | static void virtio_9p_pci_instance_init(Object *obj) |
1121 | { | |
1122 | V9fsPCIState *dev = VIRTIO_9P_PCI(obj); | |
c8075caf GA |
1123 | |
1124 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
1125 | TYPE_VIRTIO_9P); | |
234a336f FK |
1126 | } |
1127 | ||
1128 | static const TypeInfo virtio_9p_pci_info = { | |
1129 | .name = TYPE_VIRTIO_9P_PCI, | |
1130 | .parent = TYPE_VIRTIO_PCI, | |
1131 | .instance_size = sizeof(V9fsPCIState), | |
1132 | .instance_init = virtio_9p_pci_instance_init, | |
1133 | .class_init = virtio_9p_pci_class_init, | |
60653b28 | 1134 | }; |
234a336f | 1135 | #endif /* CONFIG_VIRTFS */ |
60653b28 | 1136 | |
085bccb7 FK |
1137 | /* |
1138 | * virtio-pci: This is the PCIDevice which has a virtio-pci-bus. | |
1139 | */ | |
1140 | ||
e0d686bf JW |
1141 | static int virtio_pci_query_nvectors(DeviceState *d) |
1142 | { | |
1143 | VirtIOPCIProxy *proxy = VIRTIO_PCI(d); | |
1144 | ||
1145 | return proxy->nvectors; | |
1146 | } | |
1147 | ||
ada434cd | 1148 | static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, |
dfb8e184 MT |
1149 | struct virtio_pci_cap *cap) |
1150 | { | |
1151 | PCIDevice *dev = &proxy->pci_dev; | |
1152 | int offset; | |
1153 | ||
dfb8e184 MT |
1154 | offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0, cap->cap_len); |
1155 | assert(offset > 0); | |
1156 | ||
1157 | assert(cap->cap_len >= sizeof *cap); | |
1158 | memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len, | |
1159 | cap->cap_len - PCI_CAP_FLAGS); | |
ada434cd MT |
1160 | |
1161 | return offset; | |
dfb8e184 MT |
1162 | } |
1163 | ||
dfb8e184 MT |
1164 | static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, |
1165 | unsigned size) | |
1166 | { | |
1167 | VirtIOPCIProxy *proxy = opaque; | |
1168 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); | |
1169 | uint32_t val = 0; | |
1170 | int i; | |
1171 | ||
1172 | switch (addr) { | |
1173 | case VIRTIO_PCI_COMMON_DFSELECT: | |
1174 | val = proxy->dfselect; | |
1175 | break; | |
1176 | case VIRTIO_PCI_COMMON_DF: | |
1177 | if (proxy->dfselect <= 1) { | |
5f456073 MT |
1178 | val = (vdev->host_features & ~VIRTIO_LEGACY_FEATURES) >> |
1179 | (32 * proxy->dfselect); | |
dfb8e184 MT |
1180 | } |
1181 | break; | |
1182 | case VIRTIO_PCI_COMMON_GFSELECT: | |
1183 | val = proxy->gfselect; | |
1184 | break; | |
1185 | case VIRTIO_PCI_COMMON_GF: | |
3750dabc | 1186 | if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { |
dfb8e184 MT |
1187 | val = proxy->guest_features[proxy->gfselect]; |
1188 | } | |
1189 | break; | |
1190 | case VIRTIO_PCI_COMMON_MSIX: | |
1191 | val = vdev->config_vector; | |
1192 | break; | |
1193 | case VIRTIO_PCI_COMMON_NUMQ: | |
1194 | for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) { | |
1195 | if (virtio_queue_get_num(vdev, i)) { | |
1196 | val = i + 1; | |
1197 | } | |
1198 | } | |
1199 | break; | |
1200 | case VIRTIO_PCI_COMMON_STATUS: | |
1201 | val = vdev->status; | |
1202 | break; | |
1203 | case VIRTIO_PCI_COMMON_CFGGENERATION: | |
b8f05908 | 1204 | val = vdev->generation; |
dfb8e184 MT |
1205 | break; |
1206 | case VIRTIO_PCI_COMMON_Q_SELECT: | |
1207 | val = vdev->queue_sel; | |
1208 | break; | |
1209 | case VIRTIO_PCI_COMMON_Q_SIZE: | |
1210 | val = virtio_queue_get_num(vdev, vdev->queue_sel); | |
1211 | break; | |
1212 | case VIRTIO_PCI_COMMON_Q_MSIX: | |
1213 | val = virtio_queue_vector(vdev, vdev->queue_sel); | |
1214 | break; | |
1215 | case VIRTIO_PCI_COMMON_Q_ENABLE: | |
1216 | val = proxy->vqs[vdev->queue_sel].enabled; | |
1217 | break; | |
1218 | case VIRTIO_PCI_COMMON_Q_NOFF: | |
1219 | /* Simply map queues in order */ | |
1220 | val = vdev->queue_sel; | |
1221 | break; | |
1222 | case VIRTIO_PCI_COMMON_Q_DESCLO: | |
1223 | val = proxy->vqs[vdev->queue_sel].desc[0]; | |
1224 | break; | |
1225 | case VIRTIO_PCI_COMMON_Q_DESCHI: | |
1226 | val = proxy->vqs[vdev->queue_sel].desc[1]; | |
1227 | break; | |
1228 | case VIRTIO_PCI_COMMON_Q_AVAILLO: | |
1229 | val = proxy->vqs[vdev->queue_sel].avail[0]; | |
1230 | break; | |
1231 | case VIRTIO_PCI_COMMON_Q_AVAILHI: | |
1232 | val = proxy->vqs[vdev->queue_sel].avail[1]; | |
1233 | break; | |
1234 | case VIRTIO_PCI_COMMON_Q_USEDLO: | |
1235 | val = proxy->vqs[vdev->queue_sel].used[0]; | |
1236 | break; | |
1237 | case VIRTIO_PCI_COMMON_Q_USEDHI: | |
1238 | val = proxy->vqs[vdev->queue_sel].used[1]; | |
1239 | break; | |
1240 | default: | |
1241 | val = 0; | |
1242 | } | |
1243 | ||
1244 | return val; | |
1245 | } | |
1246 | ||
1247 | static void virtio_pci_common_write(void *opaque, hwaddr addr, | |
1248 | uint64_t val, unsigned size) | |
1249 | { | |
1250 | VirtIOPCIProxy *proxy = opaque; | |
1251 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); | |
1252 | ||
1253 | switch (addr) { | |
1254 | case VIRTIO_PCI_COMMON_DFSELECT: | |
1255 | proxy->dfselect = val; | |
1256 | break; | |
1257 | case VIRTIO_PCI_COMMON_GFSELECT: | |
1258 | proxy->gfselect = val; | |
1259 | break; | |
1260 | case VIRTIO_PCI_COMMON_GF: | |
3750dabc | 1261 | if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { |
dfb8e184 MT |
1262 | proxy->guest_features[proxy->gfselect] = val; |
1263 | virtio_set_features(vdev, | |
1264 | (((uint64_t)proxy->guest_features[1]) << 32) | | |
1265 | proxy->guest_features[0]); | |
1266 | } | |
1267 | break; | |
1268 | case VIRTIO_PCI_COMMON_MSIX: | |
1269 | msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); | |
1270 | /* Make it possible for guest to discover an error took place. */ | |
1271 | if (msix_vector_use(&proxy->pci_dev, val) < 0) { | |
1272 | val = VIRTIO_NO_VECTOR; | |
1273 | } | |
1274 | vdev->config_vector = val; | |
1275 | break; | |
1276 | case VIRTIO_PCI_COMMON_STATUS: | |
1277 | if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { | |
1278 | virtio_pci_stop_ioeventfd(proxy); | |
1279 | } | |
1280 | ||
1281 | virtio_set_status(vdev, val & 0xFF); | |
1282 | ||
1283 | if (val & VIRTIO_CONFIG_S_DRIVER_OK) { | |
1284 | virtio_pci_start_ioeventfd(proxy); | |
1285 | } | |
1286 | ||
1287 | if (vdev->status == 0) { | |
75fd6f13 | 1288 | virtio_pci_reset(DEVICE(proxy)); |
dfb8e184 MT |
1289 | } |
1290 | ||
1291 | break; | |
1292 | case VIRTIO_PCI_COMMON_Q_SELECT: | |
1293 | if (val < VIRTIO_QUEUE_MAX) { | |
1294 | vdev->queue_sel = val; | |
1295 | } | |
1296 | break; | |
1297 | case VIRTIO_PCI_COMMON_Q_SIZE: | |
1298 | proxy->vqs[vdev->queue_sel].num = val; | |
1299 | break; | |
1300 | case VIRTIO_PCI_COMMON_Q_MSIX: | |
1301 | msix_vector_unuse(&proxy->pci_dev, | |
1302 | virtio_queue_vector(vdev, vdev->queue_sel)); | |
1303 | /* Make it possible for guest to discover an error took place. */ | |
1304 | if (msix_vector_use(&proxy->pci_dev, val) < 0) { | |
1305 | val = VIRTIO_NO_VECTOR; | |
1306 | } | |
1307 | virtio_queue_set_vector(vdev, vdev->queue_sel, val); | |
1308 | break; | |
1309 | case VIRTIO_PCI_COMMON_Q_ENABLE: | |
1310 | /* TODO: need a way to put num back on reset. */ | |
1311 | virtio_queue_set_num(vdev, vdev->queue_sel, | |
1312 | proxy->vqs[vdev->queue_sel].num); | |
1313 | virtio_queue_set_rings(vdev, vdev->queue_sel, | |
1314 | ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 | | |
1315 | proxy->vqs[vdev->queue_sel].desc[0], | |
1316 | ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 | | |
1317 | proxy->vqs[vdev->queue_sel].avail[0], | |
1318 | ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 | | |
1319 | proxy->vqs[vdev->queue_sel].used[0]); | |
393f04d3 | 1320 | proxy->vqs[vdev->queue_sel].enabled = 1; |
dfb8e184 MT |
1321 | break; |
1322 | case VIRTIO_PCI_COMMON_Q_DESCLO: | |
1323 | proxy->vqs[vdev->queue_sel].desc[0] = val; | |
1324 | break; | |
1325 | case VIRTIO_PCI_COMMON_Q_DESCHI: | |
1326 | proxy->vqs[vdev->queue_sel].desc[1] = val; | |
1327 | break; | |
1328 | case VIRTIO_PCI_COMMON_Q_AVAILLO: | |
1329 | proxy->vqs[vdev->queue_sel].avail[0] = val; | |
1330 | break; | |
1331 | case VIRTIO_PCI_COMMON_Q_AVAILHI: | |
1332 | proxy->vqs[vdev->queue_sel].avail[1] = val; | |
1333 | break; | |
1334 | case VIRTIO_PCI_COMMON_Q_USEDLO: | |
1335 | proxy->vqs[vdev->queue_sel].used[0] = val; | |
1336 | break; | |
1337 | case VIRTIO_PCI_COMMON_Q_USEDHI: | |
1338 | proxy->vqs[vdev->queue_sel].used[1] = val; | |
1339 | break; | |
1340 | default: | |
1341 | break; | |
1342 | } | |
1343 | } | |
1344 | ||
1345 | ||
1346 | static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr, | |
1347 | unsigned size) | |
1348 | { | |
1349 | return 0; | |
1350 | } | |
1351 | ||
1352 | static void virtio_pci_notify_write(void *opaque, hwaddr addr, | |
1353 | uint64_t val, unsigned size) | |
1354 | { | |
1355 | VirtIODevice *vdev = opaque; | |
d9997d89 MA |
1356 | VirtIOPCIProxy *proxy = VIRTIO_PCI(DEVICE(vdev)->parent_bus->parent); |
1357 | unsigned queue = addr / virtio_pci_queue_mem_mult(proxy); | |
dfb8e184 MT |
1358 | |
1359 | if (queue < VIRTIO_QUEUE_MAX) { | |
1360 | virtio_queue_notify(vdev, queue); | |
1361 | } | |
1362 | } | |
1363 | ||
9824d2a3 JW |
1364 | static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr, |
1365 | uint64_t val, unsigned size) | |
1366 | { | |
1367 | VirtIODevice *vdev = opaque; | |
1368 | unsigned queue = val; | |
1369 | ||
1370 | if (queue < VIRTIO_QUEUE_MAX) { | |
1371 | virtio_queue_notify(vdev, queue); | |
1372 | } | |
1373 | } | |
1374 | ||
dfb8e184 MT |
1375 | static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr, |
1376 | unsigned size) | |
1377 | { | |
1378 | VirtIOPCIProxy *proxy = opaque; | |
1379 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); | |
1380 | uint64_t val = vdev->isr; | |
1381 | ||
1382 | vdev->isr = 0; | |
1383 | pci_irq_deassert(&proxy->pci_dev); | |
1384 | ||
1385 | return val; | |
1386 | } | |
1387 | ||
1388 | static void virtio_pci_isr_write(void *opaque, hwaddr addr, | |
1389 | uint64_t val, unsigned size) | |
1390 | { | |
1391 | } | |
1392 | ||
1393 | static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr, | |
1394 | unsigned size) | |
1395 | { | |
1396 | VirtIODevice *vdev = opaque; | |
1397 | uint64_t val = 0; | |
1398 | ||
1399 | switch (size) { | |
1400 | case 1: | |
54c720d4 | 1401 | val = virtio_config_modern_readb(vdev, addr); |
dfb8e184 MT |
1402 | break; |
1403 | case 2: | |
54c720d4 | 1404 | val = virtio_config_modern_readw(vdev, addr); |
dfb8e184 MT |
1405 | break; |
1406 | case 4: | |
54c720d4 | 1407 | val = virtio_config_modern_readl(vdev, addr); |
dfb8e184 MT |
1408 | break; |
1409 | } | |
1410 | return val; | |
1411 | } | |
1412 | ||
1413 | static void virtio_pci_device_write(void *opaque, hwaddr addr, | |
1414 | uint64_t val, unsigned size) | |
1415 | { | |
1416 | VirtIODevice *vdev = opaque; | |
1417 | switch (size) { | |
1418 | case 1: | |
54c720d4 | 1419 | virtio_config_modern_writeb(vdev, addr, val); |
dfb8e184 MT |
1420 | break; |
1421 | case 2: | |
54c720d4 | 1422 | virtio_config_modern_writew(vdev, addr, val); |
dfb8e184 MT |
1423 | break; |
1424 | case 4: | |
54c720d4 | 1425 | virtio_config_modern_writel(vdev, addr, val); |
dfb8e184 MT |
1426 | break; |
1427 | } | |
1428 | } | |
1429 | ||
1141ce21 GH |
1430 | static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy) |
1431 | { | |
1432 | static const MemoryRegionOps common_ops = { | |
1433 | .read = virtio_pci_common_read, | |
1434 | .write = virtio_pci_common_write, | |
1435 | .impl = { | |
1436 | .min_access_size = 1, | |
1437 | .max_access_size = 4, | |
1438 | }, | |
1439 | .endianness = DEVICE_LITTLE_ENDIAN, | |
1440 | }; | |
1441 | static const MemoryRegionOps isr_ops = { | |
1442 | .read = virtio_pci_isr_read, | |
1443 | .write = virtio_pci_isr_write, | |
1444 | .impl = { | |
1445 | .min_access_size = 1, | |
1446 | .max_access_size = 4, | |
1447 | }, | |
1448 | .endianness = DEVICE_LITTLE_ENDIAN, | |
1449 | }; | |
1450 | static const MemoryRegionOps device_ops = { | |
1451 | .read = virtio_pci_device_read, | |
1452 | .write = virtio_pci_device_write, | |
1453 | .impl = { | |
1454 | .min_access_size = 1, | |
1455 | .max_access_size = 4, | |
1456 | }, | |
1457 | .endianness = DEVICE_LITTLE_ENDIAN, | |
1458 | }; | |
1459 | static const MemoryRegionOps notify_ops = { | |
1460 | .read = virtio_pci_notify_read, | |
1461 | .write = virtio_pci_notify_write, | |
1462 | .impl = { | |
1463 | .min_access_size = 1, | |
1464 | .max_access_size = 4, | |
1465 | }, | |
1466 | .endianness = DEVICE_LITTLE_ENDIAN, | |
1467 | }; | |
9824d2a3 JW |
1468 | static const MemoryRegionOps notify_pio_ops = { |
1469 | .read = virtio_pci_notify_read, | |
1470 | .write = virtio_pci_notify_write_pio, | |
1471 | .impl = { | |
1472 | .min_access_size = 1, | |
1473 | .max_access_size = 4, | |
1474 | }, | |
1475 | .endianness = DEVICE_LITTLE_ENDIAN, | |
1476 | }; | |
1477 | ||
1141ce21 GH |
1478 | |
1479 | memory_region_init_io(&proxy->common.mr, OBJECT(proxy), | |
1480 | &common_ops, | |
1481 | proxy, | |
b6ce27a5 GH |
1482 | "virtio-pci-common", |
1483 | proxy->common.size); | |
a3cc2e81 | 1484 | |
1141ce21 GH |
1485 | memory_region_init_io(&proxy->isr.mr, OBJECT(proxy), |
1486 | &isr_ops, | |
1487 | proxy, | |
b6ce27a5 GH |
1488 | "virtio-pci-isr", |
1489 | proxy->isr.size); | |
a3cc2e81 | 1490 | |
1141ce21 GH |
1491 | memory_region_init_io(&proxy->device.mr, OBJECT(proxy), |
1492 | &device_ops, | |
1493 | virtio_bus_get_device(&proxy->bus), | |
b6ce27a5 GH |
1494 | "virtio-pci-device", |
1495 | proxy->device.size); | |
a3cc2e81 | 1496 | |
1141ce21 GH |
1497 | memory_region_init_io(&proxy->notify.mr, OBJECT(proxy), |
1498 | ¬ify_ops, | |
1499 | virtio_bus_get_device(&proxy->bus), | |
1500 | "virtio-pci-notify", | |
b6ce27a5 | 1501 | proxy->notify.size); |
9824d2a3 JW |
1502 | |
1503 | memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy), | |
1504 | ¬ify_pio_ops, | |
1505 | virtio_bus_get_device(&proxy->bus), | |
1506 | "virtio-pci-notify-pio", | |
e3aab6c7 | 1507 | proxy->notify_pio.size); |
a3cc2e81 GH |
1508 | } |
1509 | ||
1510 | static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy, | |
54790d71 | 1511 | VirtIOPCIRegion *region, |
9824d2a3 JW |
1512 | struct virtio_pci_cap *cap, |
1513 | MemoryRegion *mr, | |
1514 | uint8_t bar) | |
a3cc2e81 | 1515 | { |
9824d2a3 | 1516 | memory_region_add_subregion(mr, region->offset, ®ion->mr); |
54790d71 | 1517 | |
fc004905 | 1518 | cap->cfg_type = region->type; |
9824d2a3 | 1519 | cap->bar = bar; |
54790d71 | 1520 | cap->offset = cpu_to_le32(region->offset); |
b6ce27a5 | 1521 | cap->length = cpu_to_le32(region->size); |
54790d71 | 1522 | virtio_pci_add_mem_cap(proxy, cap); |
9824d2a3 JW |
1523 | |
1524 | } | |
1525 | ||
1526 | static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy, | |
1527 | VirtIOPCIRegion *region, | |
1528 | struct virtio_pci_cap *cap) | |
1529 | { | |
1530 | virtio_pci_modern_region_map(proxy, region, cap, | |
7a25126d | 1531 | &proxy->modern_bar, proxy->modern_mem_bar_idx); |
1141ce21 | 1532 | } |
dfb8e184 | 1533 | |
9824d2a3 JW |
1534 | static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy, |
1535 | VirtIOPCIRegion *region, | |
1536 | struct virtio_pci_cap *cap) | |
1537 | { | |
1538 | virtio_pci_modern_region_map(proxy, region, cap, | |
7a25126d | 1539 | &proxy->io_bar, proxy->modern_io_bar_idx); |
9824d2a3 JW |
1540 | } |
1541 | ||
1542 | static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy, | |
1543 | VirtIOPCIRegion *region) | |
27462695 MT |
1544 | { |
1545 | memory_region_del_subregion(&proxy->modern_bar, | |
1546 | ®ion->mr); | |
1547 | } | |
1548 | ||
9824d2a3 JW |
1549 | static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy, |
1550 | VirtIOPCIRegion *region) | |
1551 | { | |
1552 | memory_region_del_subregion(&proxy->io_bar, | |
1553 | ®ion->mr); | |
1554 | } | |
1555 | ||
d1b4259f MC |
1556 | static void virtio_pci_pre_plugged(DeviceState *d, Error **errp) |
1557 | { | |
1558 | VirtIOPCIProxy *proxy = VIRTIO_PCI(d); | |
1559 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); | |
1560 | ||
1561 | if (virtio_pci_modern(proxy)) { | |
1562 | virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1); | |
1563 | } | |
1564 | ||
1565 | virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE); | |
1566 | } | |
1567 | ||
085bccb7 | 1568 | /* This is called by virtio-bus just after the device is plugged. */ |
e8398045 | 1569 | static void virtio_pci_device_plugged(DeviceState *d, Error **errp) |
085bccb7 FK |
1570 | { |
1571 | VirtIOPCIProxy *proxy = VIRTIO_PCI(d); | |
1572 | VirtioBusState *bus = &proxy->bus; | |
9a4c0e22 | 1573 | bool legacy = virtio_pci_legacy(proxy); |
d1b4259f | 1574 | bool modern; |
9824d2a3 | 1575 | bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; |
085bccb7 FK |
1576 | uint8_t *config; |
1577 | uint32_t size; | |
6b8f1020 | 1578 | VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); |
085bccb7 | 1579 | |
d1b4259f MC |
1580 | /* |
1581 | * Virtio capabilities present without | |
1582 | * VIRTIO_F_VERSION_1 confuses guests | |
1583 | */ | |
1584 | if (!virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) { | |
1585 | virtio_pci_disable_modern(proxy); | |
1586 | ||
1587 | if (!legacy) { | |
1588 | error_setg(errp, "Device doesn't support modern mode, and legacy" | |
1589 | " mode is disabled"); | |
1590 | error_append_hint(errp, "Set disable-legacy to off\n"); | |
1591 | ||
1592 | return; | |
1593 | } | |
1594 | } | |
1595 | ||
1596 | modern = virtio_pci_modern(proxy); | |
1597 | ||
085bccb7 FK |
1598 | config = proxy->pci_dev.config; |
1599 | if (proxy->class_code) { | |
1600 | pci_config_set_class(config, proxy->class_code); | |
1601 | } | |
e266d421 GH |
1602 | |
1603 | if (legacy) { | |
1604 | /* legacy and transitional */ | |
1605 | pci_set_word(config + PCI_SUBSYSTEM_VENDOR_ID, | |
1606 | pci_get_word(config + PCI_VENDOR_ID)); | |
1607 | pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus)); | |
1608 | } else { | |
1609 | /* pure virtio-1.0 */ | |
1610 | pci_set_word(config + PCI_VENDOR_ID, | |
1611 | PCI_VENDOR_ID_REDHAT_QUMRANET); | |
1612 | pci_set_word(config + PCI_DEVICE_ID, | |
1613 | 0x1040 + virtio_bus_get_vdev_id(bus)); | |
1614 | pci_config_set_revision(config, 1); | |
1615 | } | |
085bccb7 FK |
1616 | config[PCI_INTERRUPT_PIN] = 1; |
1617 | ||
dfb8e184 | 1618 | |
e266d421 | 1619 | if (modern) { |
cc52ea90 GH |
1620 | struct virtio_pci_cap cap = { |
1621 | .cap_len = sizeof cap, | |
dfb8e184 MT |
1622 | }; |
1623 | struct virtio_pci_notify_cap notify = { | |
dfb8e184 | 1624 | .cap.cap_len = sizeof notify, |
dfb8e184 | 1625 | .notify_off_multiplier = |
d9997d89 | 1626 | cpu_to_le32(virtio_pci_queue_mem_mult(proxy)), |
dfb8e184 | 1627 | }; |
ada434cd MT |
1628 | struct virtio_pci_cfg_cap cfg = { |
1629 | .cap.cap_len = sizeof cfg, | |
1630 | .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG, | |
1631 | }; | |
9824d2a3 JW |
1632 | struct virtio_pci_notify_cap notify_pio = { |
1633 | .cap.cap_len = sizeof notify, | |
1634 | .notify_off_multiplier = cpu_to_le32(0x0), | |
1635 | }; | |
dfb8e184 | 1636 | |
9824d2a3 | 1637 | struct virtio_pci_cfg_cap *cfg_mask; |
dfb8e184 | 1638 | |
1141ce21 | 1639 | virtio_pci_modern_regions_init(proxy); |
9824d2a3 JW |
1640 | |
1641 | virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap); | |
1642 | virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap); | |
1643 | virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap); | |
1644 | virtio_pci_modern_mem_region_map(proxy, &proxy->notify, ¬ify.cap); | |
1645 | ||
1646 | if (modern_pio) { | |
1647 | memory_region_init(&proxy->io_bar, OBJECT(proxy), | |
1648 | "virtio-pci-io", 0x4); | |
1649 | ||
7a25126d | 1650 | pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx, |
9824d2a3 JW |
1651 | PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar); |
1652 | ||
1653 | virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio, | |
1654 | ¬ify_pio.cap); | |
1655 | } | |
ada434cd | 1656 | |
7a25126d | 1657 | pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx, |
4e93a68e GH |
1658 | PCI_BASE_ADDRESS_SPACE_MEMORY | |
1659 | PCI_BASE_ADDRESS_MEM_PREFETCH | | |
1660 | PCI_BASE_ADDRESS_MEM_TYPE_64, | |
dfb8e184 | 1661 | &proxy->modern_bar); |
ada434cd MT |
1662 | |
1663 | proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap); | |
1664 | cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap); | |
1665 | pci_set_byte(&cfg_mask->cap.bar, ~0x0); | |
1666 | pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0); | |
1667 | pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0); | |
1668 | pci_set_long(cfg_mask->pci_cfg_data, ~0x0); | |
dfb8e184 MT |
1669 | } |
1670 | ||
0d583647 RH |
1671 | if (proxy->nvectors) { |
1672 | int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors, | |
7a25126d | 1673 | proxy->msix_bar_idx); |
0d583647 RH |
1674 | if (err) { |
1675 | /* Notice when a system that supports MSIx can't initialize it. */ | |
1676 | if (err != -ENOTSUP) { | |
1677 | error_report("unable to init msix vectors to %" PRIu32, | |
1678 | proxy->nvectors); | |
1679 | } | |
1680 | proxy->nvectors = 0; | |
1681 | } | |
085bccb7 FK |
1682 | } |
1683 | ||
1684 | proxy->pci_dev.config_write = virtio_write_config; | |
ada434cd | 1685 | proxy->pci_dev.config_read = virtio_read_config; |
085bccb7 | 1686 | |
e266d421 GH |
1687 | if (legacy) { |
1688 | size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) | |
1689 | + virtio_bus_get_vdev_config_len(bus); | |
1d0148fe | 1690 | size = pow2ceil(size); |
085bccb7 | 1691 | |
e266d421 GH |
1692 | memory_region_init_io(&proxy->bar, OBJECT(proxy), |
1693 | &virtio_pci_config_ops, | |
1694 | proxy, "virtio-pci", size); | |
dfb8e184 | 1695 | |
7a25126d | 1696 | pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx, |
23c5e397 | 1697 | PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar); |
e266d421 | 1698 | } |
085bccb7 FK |
1699 | } |
1700 | ||
06a13073 PB |
1701 | static void virtio_pci_device_unplugged(DeviceState *d) |
1702 | { | |
06a13073 | 1703 | VirtIOPCIProxy *proxy = VIRTIO_PCI(d); |
9a4c0e22 | 1704 | bool modern = virtio_pci_modern(proxy); |
9824d2a3 | 1705 | bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; |
06a13073 PB |
1706 | |
1707 | virtio_pci_stop_ioeventfd(proxy); | |
27462695 MT |
1708 | |
1709 | if (modern) { | |
9824d2a3 JW |
1710 | virtio_pci_modern_mem_region_unmap(proxy, &proxy->common); |
1711 | virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr); | |
1712 | virtio_pci_modern_mem_region_unmap(proxy, &proxy->device); | |
1713 | virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify); | |
1714 | if (modern_pio) { | |
1715 | virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio); | |
1716 | } | |
27462695 | 1717 | } |
06a13073 PB |
1718 | } |
1719 | ||
fc079951 | 1720 | static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) |
085bccb7 | 1721 | { |
b6ce27a5 | 1722 | VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); |
085bccb7 | 1723 | VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev); |
9a4c0e22 MA |
1724 | bool pcie_port = pci_bus_is_express(pci_dev->bus) && |
1725 | !pci_bus_is_root(pci_dev->bus); | |
fc079951 | 1726 | |
ca2b413c PB |
1727 | if (!kvm_has_many_ioeventfds()) { |
1728 | proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD; | |
1729 | } | |
1730 | ||
b6ce27a5 GH |
1731 | /* |
1732 | * virtio pci bar layout used by default. | |
1733 | * subclasses can re-arrange things if needed. | |
1734 | * | |
1735 | * region 0 -- virtio legacy io bar | |
1736 | * region 1 -- msi-x bar | |
1737 | * region 4+5 -- virtio modern memory (64bit) bar | |
1738 | * | |
1739 | */ | |
7a25126d CF |
1740 | proxy->legacy_io_bar_idx = 0; |
1741 | proxy->msix_bar_idx = 1; | |
1742 | proxy->modern_io_bar_idx = 2; | |
1743 | proxy->modern_mem_bar_idx = 4; | |
b6ce27a5 GH |
1744 | |
1745 | proxy->common.offset = 0x0; | |
1746 | proxy->common.size = 0x1000; | |
1747 | proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG; | |
1748 | ||
1749 | proxy->isr.offset = 0x1000; | |
1750 | proxy->isr.size = 0x1000; | |
1751 | proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG; | |
1752 | ||
1753 | proxy->device.offset = 0x2000; | |
1754 | proxy->device.size = 0x1000; | |
1755 | proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG; | |
1756 | ||
1757 | proxy->notify.offset = 0x3000; | |
d9997d89 | 1758 | proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX; |
b6ce27a5 GH |
1759 | proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG; |
1760 | ||
9824d2a3 JW |
1761 | proxy->notify_pio.offset = 0x0; |
1762 | proxy->notify_pio.size = 0x4; | |
1763 | proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG; | |
1764 | ||
b6ce27a5 GH |
1765 | /* subclasses can enforce modern, so do this unconditionally */ |
1766 | memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci", | |
d9997d89 MA |
1767 | /* PCI BAR regions must be powers of 2 */ |
1768 | pow2ceil(proxy->notify.offset + proxy->notify.size)); | |
b6ce27a5 | 1769 | |
ada434cd MT |
1770 | memory_region_init_alias(&proxy->modern_cfg, |
1771 | OBJECT(proxy), | |
1772 | "virtio-pci-cfg", | |
1773 | &proxy->modern_bar, | |
1774 | 0, | |
1775 | memory_region_size(&proxy->modern_bar)); | |
1776 | ||
1777 | address_space_init(&proxy->modern_as, &proxy->modern_cfg, "virtio-pci-cfg-as"); | |
1778 | ||
9a4c0e22 MA |
1779 | if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) { |
1780 | proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; | |
1781 | } | |
1782 | ||
71d19fc5 | 1783 | if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) { |
3eff3769 GK |
1784 | error_setg(errp, "device cannot work as neither modern nor legacy mode" |
1785 | " is enabled"); | |
1786 | error_append_hint(errp, "Set either disable-modern or disable-legacy" | |
1787 | " to off\n"); | |
1788 | return; | |
1789 | } | |
1790 | ||
9a4c0e22 | 1791 | if (pcie_port && pci_is_express(pci_dev)) { |
1811e64c MA |
1792 | int pos; |
1793 | ||
1811e64c MA |
1794 | pos = pcie_endpoint_cap_init(pci_dev, 0); |
1795 | assert(pos > 0); | |
1796 | ||
1797 | pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF); | |
1798 | assert(pos > 0); | |
1799 | ||
1800 | /* | |
1801 | * Indicates that this function complies with revision 1.2 of the | |
1802 | * PCI Power Management Interface Specification. | |
1803 | */ | |
1804 | pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); | |
0560b0e9 SL |
1805 | } else { |
1806 | /* | |
1807 | * make future invocations of pci_is_express() return false | |
1808 | * and pci_config_size() return PCI_CONFIG_SPACE_SIZE. | |
1809 | */ | |
1810 | pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS; | |
1811e64c MA |
1811 | } |
1812 | ||
b6ce27a5 | 1813 | virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy); |
fc079951 | 1814 | if (k->realize) { |
b6ce27a5 | 1815 | k->realize(proxy, errp); |
085bccb7 | 1816 | } |
085bccb7 FK |
1817 | } |
1818 | ||
1819 | static void virtio_pci_exit(PCIDevice *pci_dev) | |
1820 | { | |
ada434cd MT |
1821 | VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); |
1822 | ||
8b81bb3b | 1823 | msix_uninit_exclusive_bar(pci_dev); |
ada434cd | 1824 | address_space_destroy(&proxy->modern_as); |
085bccb7 FK |
1825 | } |
1826 | ||
59ccd20a | 1827 | static void virtio_pci_reset(DeviceState *qdev) |
085bccb7 FK |
1828 | { |
1829 | VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); | |
1830 | VirtioBusState *bus = VIRTIO_BUS(&proxy->bus); | |
393f04d3 JW |
1831 | int i; |
1832 | ||
085bccb7 FK |
1833 | virtio_pci_stop_ioeventfd(proxy); |
1834 | virtio_bus_reset(bus); | |
1835 | msix_unuse_all_vectors(&proxy->pci_dev); | |
393f04d3 JW |
1836 | |
1837 | for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { | |
1838 | proxy->vqs[i].enabled = 0; | |
1839 | } | |
085bccb7 FK |
1840 | } |
1841 | ||
85d1277e | 1842 | static Property virtio_pci_properties[] = { |
68a27b20 MT |
1843 | DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags, |
1844 | VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false), | |
9a4c0e22 MA |
1845 | DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy, |
1846 | ON_OFF_AUTO_AUTO), | |
1847 | DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false), | |
a6df8adf JW |
1848 | DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags, |
1849 | VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true), | |
9824d2a3 JW |
1850 | DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags, |
1851 | VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false), | |
1811e64c MA |
1852 | DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags, |
1853 | VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false), | |
d9997d89 MA |
1854 | DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags, |
1855 | VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false), | |
85d1277e ML |
1856 | DEFINE_PROP_END_OF_LIST(), |
1857 | }; | |
1858 | ||
0560b0e9 SL |
1859 | static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp) |
1860 | { | |
1861 | VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev); | |
1862 | VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); | |
1863 | PCIDevice *pci_dev = &proxy->pci_dev; | |
1864 | ||
1865 | if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) && | |
9a4c0e22 | 1866 | virtio_pci_modern(proxy)) { |
0560b0e9 SL |
1867 | pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; |
1868 | } | |
1869 | ||
1870 | vpciklass->parent_dc_realize(qdev, errp); | |
1871 | } | |
1872 | ||
085bccb7 FK |
1873 | static void virtio_pci_class_init(ObjectClass *klass, void *data) |
1874 | { | |
1875 | DeviceClass *dc = DEVICE_CLASS(klass); | |
1876 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); | |
0560b0e9 | 1877 | VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass); |
085bccb7 | 1878 | |
85d1277e | 1879 | dc->props = virtio_pci_properties; |
fc079951 | 1880 | k->realize = virtio_pci_realize; |
085bccb7 FK |
1881 | k->exit = virtio_pci_exit; |
1882 | k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; | |
1883 | k->revision = VIRTIO_PCI_ABI_VERSION; | |
1884 | k->class_id = PCI_CLASS_OTHERS; | |
0560b0e9 SL |
1885 | vpciklass->parent_dc_realize = dc->realize; |
1886 | dc->realize = virtio_pci_dc_realize; | |
59ccd20a | 1887 | dc->reset = virtio_pci_reset; |
085bccb7 FK |
1888 | } |
1889 | ||
1890 | static const TypeInfo virtio_pci_info = { | |
1891 | .name = TYPE_VIRTIO_PCI, | |
1892 | .parent = TYPE_PCI_DEVICE, | |
1893 | .instance_size = sizeof(VirtIOPCIProxy), | |
1894 | .class_init = virtio_pci_class_init, | |
1895 | .class_size = sizeof(VirtioPCIClass), | |
1896 | .abstract = true, | |
1897 | }; | |
1898 | ||
653ced07 FK |
1899 | /* virtio-blk-pci */ |
1900 | ||
1901 | static Property virtio_blk_pci_properties[] = { | |
c7bcc85d | 1902 | DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), |
653ced07 FK |
1903 | DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, |
1904 | VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), | |
1905 | DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), | |
653ced07 FK |
1906 | DEFINE_PROP_END_OF_LIST(), |
1907 | }; | |
1908 | ||
fc079951 | 1909 | static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) |
653ced07 FK |
1910 | { |
1911 | VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(vpci_dev); | |
1912 | DeviceState *vdev = DEVICE(&dev->vdev); | |
fc079951 | 1913 | |
653ced07 | 1914 | qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); |
fc079951 | 1915 | object_property_set_bool(OBJECT(vdev), true, "realized", errp); |
653ced07 FK |
1916 | } |
1917 | ||
1918 | static void virtio_blk_pci_class_init(ObjectClass *klass, void *data) | |
1919 | { | |
1920 | DeviceClass *dc = DEVICE_CLASS(klass); | |
1921 | VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); | |
1922 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); | |
1923 | ||
125ee0ed | 1924 | set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); |
653ced07 | 1925 | dc->props = virtio_blk_pci_properties; |
fc079951 | 1926 | k->realize = virtio_blk_pci_realize; |
653ced07 FK |
1927 | pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; |
1928 | pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BLOCK; | |
1929 | pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; | |
1930 | pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI; | |
1931 | } | |
1932 | ||
1933 | static void virtio_blk_pci_instance_init(Object *obj) | |
1934 | { | |
1935 | VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(obj); | |
c8075caf GA |
1936 | |
1937 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
1938 | TYPE_VIRTIO_BLK); | |
467b3f33 SH |
1939 | object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev),"iothread", |
1940 | &error_abort); | |
aeb98ddc GA |
1941 | object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev), |
1942 | "bootindex", &error_abort); | |
653ced07 FK |
1943 | } |
1944 | ||
1945 | static const TypeInfo virtio_blk_pci_info = { | |
1946 | .name = TYPE_VIRTIO_BLK_PCI, | |
1947 | .parent = TYPE_VIRTIO_PCI, | |
1948 | .instance_size = sizeof(VirtIOBlkPCI), | |
1949 | .instance_init = virtio_blk_pci_instance_init, | |
1950 | .class_init = virtio_blk_pci_class_init, | |
1951 | }; | |
1952 | ||
bc7b90a0 FK |
1953 | /* virtio-scsi-pci */ |
1954 | ||
1955 | static Property virtio_scsi_pci_properties[] = { | |
1956 | DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, | |
1957 | VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), | |
1958 | DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, | |
1959 | DEV_NVECTORS_UNSPECIFIED), | |
bc7b90a0 FK |
1960 | DEFINE_PROP_END_OF_LIST(), |
1961 | }; | |
1962 | ||
fc079951 | 1963 | static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) |
bc7b90a0 FK |
1964 | { |
1965 | VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(vpci_dev); | |
1966 | DeviceState *vdev = DEVICE(&dev->vdev); | |
292c8e50 | 1967 | VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev); |
6f32a6b4 FK |
1968 | DeviceState *proxy = DEVICE(vpci_dev); |
1969 | char *bus_name; | |
bc7b90a0 FK |
1970 | |
1971 | if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) { | |
292c8e50 | 1972 | vpci_dev->nvectors = vs->conf.num_queues + 3; |
bc7b90a0 FK |
1973 | } |
1974 | ||
6f32a6b4 FK |
1975 | /* |
1976 | * For command line compatibility, this sets the virtio-scsi-device bus | |
1977 | * name as before. | |
1978 | */ | |
1979 | if (proxy->id) { | |
1980 | bus_name = g_strdup_printf("%s.0", proxy->id); | |
1981 | virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name); | |
1982 | g_free(bus_name); | |
1983 | } | |
1984 | ||
bc7b90a0 | 1985 | qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); |
fc079951 | 1986 | object_property_set_bool(OBJECT(vdev), true, "realized", errp); |
bc7b90a0 FK |
1987 | } |
1988 | ||
1989 | static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data) | |
1990 | { | |
1991 | DeviceClass *dc = DEVICE_CLASS(klass); | |
1992 | VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); | |
1993 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); | |
fc079951 MA |
1994 | |
1995 | k->realize = virtio_scsi_pci_realize; | |
125ee0ed | 1996 | set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); |
bc7b90a0 FK |
1997 | dc->props = virtio_scsi_pci_properties; |
1998 | pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; | |
1999 | pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI; | |
2000 | pcidev_k->revision = 0x00; | |
2001 | pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI; | |
2002 | } | |
2003 | ||
2004 | static void virtio_scsi_pci_instance_init(Object *obj) | |
2005 | { | |
2006 | VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(obj); | |
c8075caf GA |
2007 | |
2008 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
2009 | TYPE_VIRTIO_SCSI); | |
19d339f1 FZ |
2010 | object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev), "iothread", |
2011 | &error_abort); | |
bc7b90a0 FK |
2012 | } |
2013 | ||
2014 | static const TypeInfo virtio_scsi_pci_info = { | |
2015 | .name = TYPE_VIRTIO_SCSI_PCI, | |
2016 | .parent = TYPE_VIRTIO_PCI, | |
2017 | .instance_size = sizeof(VirtIOSCSIPCI), | |
2018 | .instance_init = virtio_scsi_pci_instance_init, | |
2019 | .class_init = virtio_scsi_pci_class_init, | |
2020 | }; | |
2021 | ||
50787628 NB |
2022 | /* vhost-scsi-pci */ |
2023 | ||
2024 | #ifdef CONFIG_VHOST_SCSI | |
2025 | static Property vhost_scsi_pci_properties[] = { | |
2026 | DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, | |
2027 | DEV_NVECTORS_UNSPECIFIED), | |
50787628 NB |
2028 | DEFINE_PROP_END_OF_LIST(), |
2029 | }; | |
2030 | ||
fc079951 | 2031 | static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) |
50787628 NB |
2032 | { |
2033 | VHostSCSIPCI *dev = VHOST_SCSI_PCI(vpci_dev); | |
2034 | DeviceState *vdev = DEVICE(&dev->vdev); | |
2035 | VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev); | |
2036 | ||
2037 | if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) { | |
2038 | vpci_dev->nvectors = vs->conf.num_queues + 3; | |
2039 | } | |
2040 | ||
2041 | qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); | |
fc079951 | 2042 | object_property_set_bool(OBJECT(vdev), true, "realized", errp); |
50787628 NB |
2043 | } |
2044 | ||
2045 | static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data) | |
2046 | { | |
2047 | DeviceClass *dc = DEVICE_CLASS(klass); | |
2048 | VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); | |
2049 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); | |
fc079951 | 2050 | k->realize = vhost_scsi_pci_realize; |
125ee0ed | 2051 | set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); |
50787628 NB |
2052 | dc->props = vhost_scsi_pci_properties; |
2053 | pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; | |
2054 | pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI; | |
2055 | pcidev_k->revision = 0x00; | |
2056 | pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI; | |
2057 | } | |
2058 | ||
2059 | static void vhost_scsi_pci_instance_init(Object *obj) | |
2060 | { | |
2061 | VHostSCSIPCI *dev = VHOST_SCSI_PCI(obj); | |
c8075caf GA |
2062 | |
2063 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
2064 | TYPE_VHOST_SCSI); | |
d4433f32 GA |
2065 | object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev), |
2066 | "bootindex", &error_abort); | |
50787628 NB |
2067 | } |
2068 | ||
2069 | static const TypeInfo vhost_scsi_pci_info = { | |
2070 | .name = TYPE_VHOST_SCSI_PCI, | |
2071 | .parent = TYPE_VIRTIO_PCI, | |
2072 | .instance_size = sizeof(VHostSCSIPCI), | |
2073 | .instance_init = vhost_scsi_pci_instance_init, | |
2074 | .class_init = vhost_scsi_pci_class_init, | |
2075 | }; | |
2076 | #endif | |
2077 | ||
fc0b9b0e SH |
2078 | /* vhost-vsock-pci */ |
2079 | ||
2080 | #ifdef CONFIG_VHOST_VSOCK | |
2081 | static Property vhost_vsock_pci_properties[] = { | |
2082 | DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3), | |
2083 | DEFINE_PROP_END_OF_LIST(), | |
2084 | }; | |
2085 | ||
2086 | static void vhost_vsock_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) | |
2087 | { | |
2088 | VHostVSockPCI *dev = VHOST_VSOCK_PCI(vpci_dev); | |
2089 | DeviceState *vdev = DEVICE(&dev->vdev); | |
2090 | ||
2091 | qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); | |
2092 | object_property_set_bool(OBJECT(vdev), true, "realized", errp); | |
2093 | } | |
2094 | ||
2095 | static void vhost_vsock_pci_class_init(ObjectClass *klass, void *data) | |
2096 | { | |
2097 | DeviceClass *dc = DEVICE_CLASS(klass); | |
2098 | VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); | |
2099 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); | |
2100 | k->realize = vhost_vsock_pci_realize; | |
2101 | set_bit(DEVICE_CATEGORY_MISC, dc->categories); | |
2102 | dc->props = vhost_vsock_pci_properties; | |
2103 | pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; | |
2104 | pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_VSOCK; | |
2105 | pcidev_k->revision = 0x00; | |
2106 | pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER; | |
2107 | } | |
2108 | ||
2109 | static void vhost_vsock_pci_instance_init(Object *obj) | |
2110 | { | |
2111 | VHostVSockPCI *dev = VHOST_VSOCK_PCI(obj); | |
2112 | ||
2113 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
2114 | TYPE_VHOST_VSOCK); | |
2115 | } | |
2116 | ||
2117 | static const TypeInfo vhost_vsock_pci_info = { | |
2118 | .name = TYPE_VHOST_VSOCK_PCI, | |
2119 | .parent = TYPE_VIRTIO_PCI, | |
2120 | .instance_size = sizeof(VHostVSockPCI), | |
2121 | .instance_init = vhost_vsock_pci_instance_init, | |
2122 | .class_init = vhost_vsock_pci_class_init, | |
2123 | }; | |
2124 | #endif | |
2125 | ||
e378e88d FK |
2126 | /* virtio-balloon-pci */ |
2127 | ||
2128 | static Property virtio_balloon_pci_properties[] = { | |
c7bcc85d | 2129 | DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), |
e378e88d FK |
2130 | DEFINE_PROP_END_OF_LIST(), |
2131 | }; | |
2132 | ||
fc079951 | 2133 | static void virtio_balloon_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) |
e378e88d FK |
2134 | { |
2135 | VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(vpci_dev); | |
2136 | DeviceState *vdev = DEVICE(&dev->vdev); | |
2137 | ||
2138 | if (vpci_dev->class_code != PCI_CLASS_OTHERS && | |
2139 | vpci_dev->class_code != PCI_CLASS_MEMORY_RAM) { /* qemu < 1.1 */ | |
2140 | vpci_dev->class_code = PCI_CLASS_OTHERS; | |
2141 | } | |
2142 | ||
2143 | qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); | |
fc079951 | 2144 | object_property_set_bool(OBJECT(vdev), true, "realized", errp); |
e378e88d FK |
2145 | } |
2146 | ||
2147 | static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data) | |
2148 | { | |
2149 | DeviceClass *dc = DEVICE_CLASS(klass); | |
2150 | VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); | |
2151 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); | |
fc079951 | 2152 | k->realize = virtio_balloon_pci_realize; |
125ee0ed | 2153 | set_bit(DEVICE_CATEGORY_MISC, dc->categories); |
e378e88d FK |
2154 | dc->props = virtio_balloon_pci_properties; |
2155 | pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; | |
2156 | pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BALLOON; | |
2157 | pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; | |
2158 | pcidev_k->class_id = PCI_CLASS_OTHERS; | |
2159 | } | |
2160 | ||
2161 | static void virtio_balloon_pci_instance_init(Object *obj) | |
2162 | { | |
2163 | VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(obj); | |
39b87c7b | 2164 | |
a6027b0f DL |
2165 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), |
2166 | TYPE_VIRTIO_BALLOON); | |
39b87c7b SZ |
2167 | object_property_add_alias(obj, "guest-stats", OBJECT(&dev->vdev), |
2168 | "guest-stats", &error_abort); | |
2169 | object_property_add_alias(obj, "guest-stats-polling-interval", | |
2170 | OBJECT(&dev->vdev), | |
2171 | "guest-stats-polling-interval", &error_abort); | |
e378e88d FK |
2172 | } |
2173 | ||
2174 | static const TypeInfo virtio_balloon_pci_info = { | |
2175 | .name = TYPE_VIRTIO_BALLOON_PCI, | |
2176 | .parent = TYPE_VIRTIO_PCI, | |
2177 | .instance_size = sizeof(VirtIOBalloonPCI), | |
2178 | .instance_init = virtio_balloon_pci_instance_init, | |
2179 | .class_init = virtio_balloon_pci_class_init, | |
2180 | }; | |
2181 | ||
f7f7464a FK |
2182 | /* virtio-serial-pci */ |
2183 | ||
fc079951 | 2184 | static void virtio_serial_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) |
f7f7464a FK |
2185 | { |
2186 | VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(vpci_dev); | |
2187 | DeviceState *vdev = DEVICE(&dev->vdev); | |
80270a19 FK |
2188 | DeviceState *proxy = DEVICE(vpci_dev); |
2189 | char *bus_name; | |
f7f7464a FK |
2190 | |
2191 | if (vpci_dev->class_code != PCI_CLASS_COMMUNICATION_OTHER && | |
2192 | vpci_dev->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */ | |
2193 | vpci_dev->class_code != PCI_CLASS_OTHERS) { /* qemu-kvm */ | |
2194 | vpci_dev->class_code = PCI_CLASS_COMMUNICATION_OTHER; | |
2195 | } | |
2196 | ||
2197 | /* backwards-compatibility with machines that were created with | |
2198 | DEV_NVECTORS_UNSPECIFIED */ | |
2199 | if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) { | |
2200 | vpci_dev->nvectors = dev->vdev.serial.max_virtserial_ports + 1; | |
2201 | } | |
2202 | ||
80270a19 FK |
2203 | /* |
2204 | * For command line compatibility, this sets the virtio-serial-device bus | |
2205 | * name as before. | |
2206 | */ | |
2207 | if (proxy->id) { | |
2208 | bus_name = g_strdup_printf("%s.0", proxy->id); | |
2209 | virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name); | |
2210 | g_free(bus_name); | |
2211 | } | |
2212 | ||
f7f7464a | 2213 | qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); |
fc079951 | 2214 | object_property_set_bool(OBJECT(vdev), true, "realized", errp); |
f7f7464a FK |
2215 | } |
2216 | ||
2217 | static Property virtio_serial_pci_properties[] = { | |
2218 | DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, | |
2219 | VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), | |
2220 | DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), | |
c7bcc85d | 2221 | DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), |
f7f7464a FK |
2222 | DEFINE_PROP_END_OF_LIST(), |
2223 | }; | |
2224 | ||
2225 | static void virtio_serial_pci_class_init(ObjectClass *klass, void *data) | |
2226 | { | |
2227 | DeviceClass *dc = DEVICE_CLASS(klass); | |
2228 | VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); | |
2229 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); | |
fc079951 | 2230 | k->realize = virtio_serial_pci_realize; |
125ee0ed | 2231 | set_bit(DEVICE_CATEGORY_INPUT, dc->categories); |
f7f7464a FK |
2232 | dc->props = virtio_serial_pci_properties; |
2233 | pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; | |
2234 | pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_CONSOLE; | |
2235 | pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; | |
2236 | pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER; | |
2237 | } | |
2238 | ||
2239 | static void virtio_serial_pci_instance_init(Object *obj) | |
2240 | { | |
2241 | VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(obj); | |
c8075caf GA |
2242 | |
2243 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
2244 | TYPE_VIRTIO_SERIAL); | |
f7f7464a FK |
2245 | } |
2246 | ||
2247 | static const TypeInfo virtio_serial_pci_info = { | |
2248 | .name = TYPE_VIRTIO_SERIAL_PCI, | |
2249 | .parent = TYPE_VIRTIO_PCI, | |
2250 | .instance_size = sizeof(VirtIOSerialPCI), | |
2251 | .instance_init = virtio_serial_pci_instance_init, | |
2252 | .class_init = virtio_serial_pci_class_init, | |
2253 | }; | |
2254 | ||
e37da394 FK |
2255 | /* virtio-net-pci */ |
2256 | ||
2257 | static Property virtio_net_properties[] = { | |
2258 | DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, | |
2259 | VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false), | |
2260 | DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3), | |
e37da394 FK |
2261 | DEFINE_PROP_END_OF_LIST(), |
2262 | }; | |
2263 | ||
fc079951 | 2264 | static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) |
e37da394 | 2265 | { |
800ced8c | 2266 | DeviceState *qdev = DEVICE(vpci_dev); |
e37da394 FK |
2267 | VirtIONetPCI *dev = VIRTIO_NET_PCI(vpci_dev); |
2268 | DeviceState *vdev = DEVICE(&dev->vdev); | |
2269 | ||
800ced8c FK |
2270 | virtio_net_set_netclient_name(&dev->vdev, qdev->id, |
2271 | object_get_typename(OBJECT(qdev))); | |
e37da394 | 2272 | qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); |
fc079951 | 2273 | object_property_set_bool(OBJECT(vdev), true, "realized", errp); |
e37da394 FK |
2274 | } |
2275 | ||
2276 | static void virtio_net_pci_class_init(ObjectClass *klass, void *data) | |
2277 | { | |
2278 | DeviceClass *dc = DEVICE_CLASS(klass); | |
2279 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); | |
2280 | VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass); | |
2281 | ||
2282 | k->romfile = "efi-virtio.rom"; | |
2283 | k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; | |
2284 | k->device_id = PCI_DEVICE_ID_VIRTIO_NET; | |
2285 | k->revision = VIRTIO_PCI_ABI_VERSION; | |
2286 | k->class_id = PCI_CLASS_NETWORK_ETHERNET; | |
125ee0ed | 2287 | set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); |
e37da394 | 2288 | dc->props = virtio_net_properties; |
fc079951 | 2289 | vpciklass->realize = virtio_net_pci_realize; |
e37da394 FK |
2290 | } |
2291 | ||
2292 | static void virtio_net_pci_instance_init(Object *obj) | |
2293 | { | |
2294 | VirtIONetPCI *dev = VIRTIO_NET_PCI(obj); | |
c8075caf GA |
2295 | |
2296 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
2297 | TYPE_VIRTIO_NET); | |
0cf63c3e GA |
2298 | object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev), |
2299 | "bootindex", &error_abort); | |
e37da394 FK |
2300 | } |
2301 | ||
2302 | static const TypeInfo virtio_net_pci_info = { | |
2303 | .name = TYPE_VIRTIO_NET_PCI, | |
2304 | .parent = TYPE_VIRTIO_PCI, | |
2305 | .instance_size = sizeof(VirtIONetPCI), | |
2306 | .instance_init = virtio_net_pci_instance_init, | |
2307 | .class_init = virtio_net_pci_class_init, | |
2308 | }; | |
2309 | ||
59ccd20a FK |
2310 | /* virtio-rng-pci */ |
2311 | ||
fc079951 | 2312 | static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) |
59ccd20a FK |
2313 | { |
2314 | VirtIORngPCI *vrng = VIRTIO_RNG_PCI(vpci_dev); | |
2315 | DeviceState *vdev = DEVICE(&vrng->vdev); | |
fc079951 | 2316 | Error *err = NULL; |
59ccd20a FK |
2317 | |
2318 | qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); | |
fc079951 MA |
2319 | object_property_set_bool(OBJECT(vdev), true, "realized", &err); |
2320 | if (err) { | |
2321 | error_propagate(errp, err); | |
2322 | return; | |
59ccd20a FK |
2323 | } |
2324 | ||
2325 | object_property_set_link(OBJECT(vrng), | |
5b456438 | 2326 | OBJECT(vrng->vdev.conf.rng), "rng", |
59ccd20a | 2327 | NULL); |
59ccd20a FK |
2328 | } |
2329 | ||
2330 | static void virtio_rng_pci_class_init(ObjectClass *klass, void *data) | |
2331 | { | |
2332 | DeviceClass *dc = DEVICE_CLASS(klass); | |
2333 | VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); | |
2334 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); | |
2335 | ||
fc079951 | 2336 | k->realize = virtio_rng_pci_realize; |
125ee0ed | 2337 | set_bit(DEVICE_CATEGORY_MISC, dc->categories); |
59ccd20a FK |
2338 | |
2339 | pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; | |
2340 | pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_RNG; | |
2341 | pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; | |
2342 | pcidev_k->class_id = PCI_CLASS_OTHERS; | |
2343 | } | |
2344 | ||
2345 | static void virtio_rng_initfn(Object *obj) | |
2346 | { | |
2347 | VirtIORngPCI *dev = VIRTIO_RNG_PCI(obj); | |
c8075caf GA |
2348 | |
2349 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
2350 | TYPE_VIRTIO_RNG); | |
cbd5ac69 PB |
2351 | object_property_add_alias(obj, "rng", OBJECT(&dev->vdev), "rng", |
2352 | &error_abort); | |
59ccd20a FK |
2353 | } |
2354 | ||
2355 | static const TypeInfo virtio_rng_pci_info = { | |
2356 | .name = TYPE_VIRTIO_RNG_PCI, | |
2357 | .parent = TYPE_VIRTIO_PCI, | |
2358 | .instance_size = sizeof(VirtIORngPCI), | |
2359 | .instance_init = virtio_rng_initfn, | |
2360 | .class_init = virtio_rng_pci_class_init, | |
2361 | }; | |
2362 | ||
f958c8aa GH |
2363 | /* virtio-input-pci */ |
2364 | ||
6f2b9a5b | 2365 | static Property virtio_input_pci_properties[] = { |
710e2d90 GH |
2366 | DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), |
2367 | DEFINE_PROP_END_OF_LIST(), | |
2368 | }; | |
2369 | ||
f958c8aa GH |
2370 | static void virtio_input_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) |
2371 | { | |
2372 | VirtIOInputPCI *vinput = VIRTIO_INPUT_PCI(vpci_dev); | |
2373 | DeviceState *vdev = DEVICE(&vinput->vdev); | |
2374 | ||
2375 | qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); | |
9a4c0e22 | 2376 | virtio_pci_force_virtio_1(vpci_dev); |
f958c8aa GH |
2377 | object_property_set_bool(OBJECT(vdev), true, "realized", errp); |
2378 | } | |
2379 | ||
2380 | static void virtio_input_pci_class_init(ObjectClass *klass, void *data) | |
2381 | { | |
2382 | DeviceClass *dc = DEVICE_CLASS(klass); | |
2383 | VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); | |
2384 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); | |
2385 | ||
6f2b9a5b | 2386 | dc->props = virtio_input_pci_properties; |
f958c8aa GH |
2387 | k->realize = virtio_input_pci_realize; |
2388 | set_bit(DEVICE_CATEGORY_INPUT, dc->categories); | |
2389 | ||
2390 | pcidev_k->class_id = PCI_CLASS_INPUT_OTHER; | |
2391 | } | |
2392 | ||
710e2d90 GH |
2393 | static void virtio_input_hid_kbd_pci_class_init(ObjectClass *klass, void *data) |
2394 | { | |
2395 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); | |
2396 | ||
2397 | pcidev_k->class_id = PCI_CLASS_INPUT_KEYBOARD; | |
2398 | } | |
2399 | ||
2400 | static void virtio_input_hid_mouse_pci_class_init(ObjectClass *klass, | |
2401 | void *data) | |
2402 | { | |
2403 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); | |
2404 | ||
2405 | pcidev_k->class_id = PCI_CLASS_INPUT_MOUSE; | |
2406 | } | |
2407 | ||
2408 | static void virtio_keyboard_initfn(Object *obj) | |
2409 | { | |
2410 | VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj); | |
6f2b9a5b GH |
2411 | |
2412 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
2413 | TYPE_VIRTIO_KEYBOARD); | |
710e2d90 GH |
2414 | } |
2415 | ||
2416 | static void virtio_mouse_initfn(Object *obj) | |
2417 | { | |
2418 | VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj); | |
6f2b9a5b GH |
2419 | |
2420 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
2421 | TYPE_VIRTIO_MOUSE); | |
710e2d90 GH |
2422 | } |
2423 | ||
2424 | static void virtio_tablet_initfn(Object *obj) | |
2425 | { | |
2426 | VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj); | |
6f2b9a5b GH |
2427 | |
2428 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
2429 | TYPE_VIRTIO_TABLET); | |
710e2d90 GH |
2430 | } |
2431 | ||
f958c8aa GH |
2432 | static const TypeInfo virtio_input_pci_info = { |
2433 | .name = TYPE_VIRTIO_INPUT_PCI, | |
2434 | .parent = TYPE_VIRTIO_PCI, | |
2435 | .instance_size = sizeof(VirtIOInputPCI), | |
2436 | .class_init = virtio_input_pci_class_init, | |
2437 | .abstract = true, | |
2438 | }; | |
2439 | ||
710e2d90 GH |
2440 | static const TypeInfo virtio_input_hid_pci_info = { |
2441 | .name = TYPE_VIRTIO_INPUT_HID_PCI, | |
2442 | .parent = TYPE_VIRTIO_INPUT_PCI, | |
2443 | .instance_size = sizeof(VirtIOInputHIDPCI), | |
710e2d90 GH |
2444 | .abstract = true, |
2445 | }; | |
2446 | ||
2447 | static const TypeInfo virtio_keyboard_pci_info = { | |
2448 | .name = TYPE_VIRTIO_KEYBOARD_PCI, | |
2449 | .parent = TYPE_VIRTIO_INPUT_HID_PCI, | |
2450 | .class_init = virtio_input_hid_kbd_pci_class_init, | |
2451 | .instance_size = sizeof(VirtIOInputHIDPCI), | |
2452 | .instance_init = virtio_keyboard_initfn, | |
2453 | }; | |
2454 | ||
2455 | static const TypeInfo virtio_mouse_pci_info = { | |
2456 | .name = TYPE_VIRTIO_MOUSE_PCI, | |
2457 | .parent = TYPE_VIRTIO_INPUT_HID_PCI, | |
2458 | .class_init = virtio_input_hid_mouse_pci_class_init, | |
2459 | .instance_size = sizeof(VirtIOInputHIDPCI), | |
2460 | .instance_init = virtio_mouse_initfn, | |
2461 | }; | |
2462 | ||
2463 | static const TypeInfo virtio_tablet_pci_info = { | |
2464 | .name = TYPE_VIRTIO_TABLET_PCI, | |
2465 | .parent = TYPE_VIRTIO_INPUT_HID_PCI, | |
2466 | .instance_size = sizeof(VirtIOInputHIDPCI), | |
2467 | .instance_init = virtio_tablet_initfn, | |
2468 | }; | |
2469 | ||
c6047e96 MA |
2470 | #ifdef CONFIG_LINUX |
2471 | static void virtio_host_initfn(Object *obj) | |
2472 | { | |
2473 | VirtIOInputHostPCI *dev = VIRTIO_INPUT_HOST_PCI(obj); | |
2474 | ||
2475 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
2476 | TYPE_VIRTIO_INPUT_HOST); | |
2477 | } | |
2478 | ||
006a5ede GH |
2479 | static const TypeInfo virtio_host_pci_info = { |
2480 | .name = TYPE_VIRTIO_INPUT_HOST_PCI, | |
2481 | .parent = TYPE_VIRTIO_INPUT_PCI, | |
2482 | .instance_size = sizeof(VirtIOInputHostPCI), | |
2483 | .instance_init = virtio_host_initfn, | |
2484 | }; | |
c6047e96 | 2485 | #endif |
006a5ede | 2486 | |
0a2acf5e FK |
2487 | /* virtio-pci-bus */ |
2488 | ||
ac7af112 AF |
2489 | static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, |
2490 | VirtIOPCIProxy *dev) | |
0a2acf5e FK |
2491 | { |
2492 | DeviceState *qdev = DEVICE(dev); | |
f4dd69aa FK |
2493 | char virtio_bus_name[] = "virtio-bus"; |
2494 | ||
fb17dfe0 | 2495 | qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev, |
f4dd69aa | 2496 | virtio_bus_name); |
0a2acf5e FK |
2497 | } |
2498 | ||
2499 | static void virtio_pci_bus_class_init(ObjectClass *klass, void *data) | |
2500 | { | |
2501 | BusClass *bus_class = BUS_CLASS(klass); | |
2502 | VirtioBusClass *k = VIRTIO_BUS_CLASS(klass); | |
2503 | bus_class->max_dev = 1; | |
2504 | k->notify = virtio_pci_notify; | |
2505 | k->save_config = virtio_pci_save_config; | |
2506 | k->load_config = virtio_pci_load_config; | |
2507 | k->save_queue = virtio_pci_save_queue; | |
2508 | k->load_queue = virtio_pci_load_queue; | |
a6df8adf JW |
2509 | k->save_extra_state = virtio_pci_save_extra_state; |
2510 | k->load_extra_state = virtio_pci_load_extra_state; | |
2511 | k->has_extra_state = virtio_pci_has_extra_state; | |
0a2acf5e | 2512 | k->query_guest_notifiers = virtio_pci_query_guest_notifiers; |
0a2acf5e FK |
2513 | k->set_guest_notifiers = virtio_pci_set_guest_notifiers; |
2514 | k->vmstate_change = virtio_pci_vmstate_change; | |
d1b4259f | 2515 | k->pre_plugged = virtio_pci_pre_plugged; |
085bccb7 | 2516 | k->device_plugged = virtio_pci_device_plugged; |
06a13073 | 2517 | k->device_unplugged = virtio_pci_device_unplugged; |
e0d686bf | 2518 | k->query_nvectors = virtio_pci_query_nvectors; |
8e93cef1 | 2519 | k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled; |
9f06e71a | 2520 | k->ioeventfd_assign = virtio_pci_ioeventfd_assign; |
0a2acf5e FK |
2521 | } |
2522 | ||
2523 | static const TypeInfo virtio_pci_bus_info = { | |
2524 | .name = TYPE_VIRTIO_PCI_BUS, | |
2525 | .parent = TYPE_VIRTIO_BUS, | |
2526 | .instance_size = sizeof(VirtioPCIBusState), | |
2527 | .class_init = virtio_pci_bus_class_init, | |
2528 | }; | |
2529 | ||
83f7d43a | 2530 | static void virtio_pci_register_types(void) |
53c25cea | 2531 | { |
59ccd20a | 2532 | type_register_static(&virtio_rng_pci_info); |
f958c8aa | 2533 | type_register_static(&virtio_input_pci_info); |
710e2d90 GH |
2534 | type_register_static(&virtio_input_hid_pci_info); |
2535 | type_register_static(&virtio_keyboard_pci_info); | |
2536 | type_register_static(&virtio_mouse_pci_info); | |
2537 | type_register_static(&virtio_tablet_pci_info); | |
c6047e96 | 2538 | #ifdef CONFIG_LINUX |
006a5ede | 2539 | type_register_static(&virtio_host_pci_info); |
c6047e96 | 2540 | #endif |
0a2acf5e | 2541 | type_register_static(&virtio_pci_bus_info); |
085bccb7 | 2542 | type_register_static(&virtio_pci_info); |
60653b28 | 2543 | #ifdef CONFIG_VIRTFS |
234a336f | 2544 | type_register_static(&virtio_9p_pci_info); |
60653b28 | 2545 | #endif |
653ced07 | 2546 | type_register_static(&virtio_blk_pci_info); |
bc7b90a0 | 2547 | type_register_static(&virtio_scsi_pci_info); |
e378e88d | 2548 | type_register_static(&virtio_balloon_pci_info); |
f7f7464a | 2549 | type_register_static(&virtio_serial_pci_info); |
e37da394 | 2550 | type_register_static(&virtio_net_pci_info); |
50787628 NB |
2551 | #ifdef CONFIG_VHOST_SCSI |
2552 | type_register_static(&vhost_scsi_pci_info); | |
2553 | #endif | |
fc0b9b0e SH |
2554 | #ifdef CONFIG_VHOST_VSOCK |
2555 | type_register_static(&vhost_vsock_pci_info); | |
2556 | #endif | |
53c25cea PB |
2557 | } |
2558 | ||
83f7d43a | 2559 | type_init(virtio_pci_register_types) |