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fpu: add mechanism to check for invalid long double formats
[mirror_qemu.git] / hw / virtio / virtio-pci.c
CommitLineData
53c25cea
PB		 1/*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
6b620ca3
PB		 14 * Contributions after 2012-01-13 are licensed under the terms of the
15 * GNU GPL, version 2 or (at your option) any later version.
53c25cea
PB		 16 */
17
9b8bfe21 18#include "qemu/osdep.h"
53c25cea 19
cbbe4f50 20#include "standard-headers/linux/virtio_pci.h"
0d09e41a
PB		 21#include "hw/virtio/virtio.h"
22#include "hw/virtio/virtio-blk.h"
23#include "hw/virtio/virtio-net.h"
24#include "hw/virtio/virtio-serial.h"
25#include "hw/virtio/virtio-scsi.h"
26#include "hw/virtio/virtio-balloon.h"
f958c8aa 27#include "hw/virtio/virtio-input.h"
83c9f4ca 28#include "hw/pci/pci.h"
da34e65c 29#include "qapi/error.h"
1de7afc9 30#include "qemu/error-report.h"
83c9f4ca
PB		 31#include "hw/pci/msi.h"
32#include "hw/pci/msix.h"
33#include "hw/loader.h"
9c17d615 34#include "sysemu/kvm.h"
4be74634 35#include "sysemu/block-backend.h"
47b43a1f 36#include "virtio-pci.h"
1de7afc9 37#include "qemu/range.h"
0d09e41a 38#include "hw/virtio/virtio-bus.h"
24a6e7f4 39#include "qapi/visitor.h"
53c25cea 40
cbbe4f50 41#define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev))
aba800a3 42
c17bef33
MT		 43#undef VIRTIO_PCI_CONFIG
44
aba800a3
MT		 45/* The remaining space is defined by each driver as the per-driver
46 * configuration space */
cbbe4f50 47#define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev))
53c25cea 48
ac7af112
AF		 49static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
50 VirtIOPCIProxy *dev);
75fd6f13 51static void virtio_pci_reset(DeviceState *qdev);
d51fcfac 52
53c25cea 53/* virtio device */
d2a0ccc6
MT		 54/* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */
55static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d)
56{
57 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
58}
53c25cea 59
d2a0ccc6
MT		 60/* DeviceState to VirtIOPCIProxy. Note: used on datapath,
61 * be careful and test performance if you change this.
62 */
63static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d)
53c25cea 64{
d2a0ccc6
MT		 65 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
66}
67
68static void virtio_pci_notify(DeviceState *d, uint16_t vector)
69{
70 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d);
a3fc66d9 71
aba800a3
MT		 72 if (msix_enabled(&proxy->pci_dev))
73 msix_notify(&proxy->pci_dev, vector);
a3fc66d9
PB		 74 else {
75 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
76 pci_set_irq(&proxy->pci_dev, vdev->isr & 1);
77 }
53c25cea
PB		 78}
79
d2a0ccc6 80static void virtio_pci_save_config(DeviceState *d, QEMUFile *f)
ff24bd58 81{
d2a0ccc6 82 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 83 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
84
ff24bd58
MT		 85 pci_device_save(&proxy->pci_dev, f);
86 msix_save(&proxy->pci_dev, f);
87 if (msix_present(&proxy->pci_dev))
a3fc66d9 88 qemu_put_be16(f, vdev->config_vector);
ff24bd58
MT		 89}
90
a6df8adf
JW		 91static void virtio_pci_load_modern_queue_state(VirtIOPCIQueue *vq,
92 QEMUFile *f)
93{
94 vq->num = qemu_get_be16(f);
95 vq->enabled = qemu_get_be16(f);
96 vq->desc[0] = qemu_get_be32(f);
97 vq->desc[1] = qemu_get_be32(f);
98 vq->avail[0] = qemu_get_be32(f);
99 vq->avail[1] = qemu_get_be32(f);
100 vq->used[0] = qemu_get_be32(f);
101 vq->used[1] = qemu_get_be32(f);
102}
103
104static bool virtio_pci_has_extra_state(DeviceState *d)
105{
106 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
107
108 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA;
109}
110
111static int get_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size)
112{
113 VirtIOPCIProxy *proxy = pv;
114 int i;
115
116 proxy->dfselect = qemu_get_be32(f);
117 proxy->gfselect = qemu_get_be32(f);
118 proxy->guest_features[0] = qemu_get_be32(f);
119 proxy->guest_features[1] = qemu_get_be32(f);
120 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
121 virtio_pci_load_modern_queue_state(&proxy->vqs[i], f);
122 }
123
124 return 0;
125}
126
127static void virtio_pci_save_modern_queue_state(VirtIOPCIQueue *vq,
128 QEMUFile *f)
129{
130 qemu_put_be16(f, vq->num);
131 qemu_put_be16(f, vq->enabled);
132 qemu_put_be32(f, vq->desc[0]);
133 qemu_put_be32(f, vq->desc[1]);
134 qemu_put_be32(f, vq->avail[0]);
135 qemu_put_be32(f, vq->avail[1]);
136 qemu_put_be32(f, vq->used[0]);
137 qemu_put_be32(f, vq->used[1]);
138}
139
140static void put_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size)
141{
142 VirtIOPCIProxy *proxy = pv;
143 int i;
144
145 qemu_put_be32(f, proxy->dfselect);
146 qemu_put_be32(f, proxy->gfselect);
147 qemu_put_be32(f, proxy->guest_features[0]);
148 qemu_put_be32(f, proxy->guest_features[1]);
149 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
150 virtio_pci_save_modern_queue_state(&proxy->vqs[i], f);
151 }
152}
153
154static const VMStateInfo vmstate_info_virtio_pci_modern_state = {
155 .name = "virtqueue_state",
156 .get = get_virtio_pci_modern_state,
157 .put = put_virtio_pci_modern_state,
158};
159
160static bool virtio_pci_modern_state_needed(void *opaque)
161{
162 VirtIOPCIProxy *proxy = opaque;
163
9a4c0e22 164 return virtio_pci_modern(proxy);
a6df8adf
JW		 165}
166
167static const VMStateDescription vmstate_virtio_pci_modern_state = {
168 .name = "virtio_pci/modern_state",
169 .version_id = 1,
170 .minimum_version_id = 1,
171 .needed = &virtio_pci_modern_state_needed,
172 .fields = (VMStateField[]) {
173 {
174 .name = "modern_state",
175 .version_id = 0,
176 .field_exists = NULL,
177 .size = 0,
178 .info = &vmstate_info_virtio_pci_modern_state,
179 .flags = VMS_SINGLE,
180 .offset = 0,
181 },
182 VMSTATE_END_OF_LIST()
183 }
184};
185
186static const VMStateDescription vmstate_virtio_pci = {
187 .name = "virtio_pci",
188 .version_id = 1,
189 .minimum_version_id = 1,
190 .minimum_version_id_old = 1,
191 .fields = (VMStateField[]) {
192 VMSTATE_END_OF_LIST()
193 },
194 .subsections = (const VMStateDescription*[]) {
195 &vmstate_virtio_pci_modern_state,
196 NULL
197 }
198};
199
200static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f)
201{
202 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
203
204 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL);
205}
206
207static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f)
208{
209 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
210
211 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1);
212}
213
d2a0ccc6 214static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f)
ff24bd58 215{
d2a0ccc6 216 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 217 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
218
ff24bd58 219 if (msix_present(&proxy->pci_dev))
a3fc66d9 220 qemu_put_be16(f, virtio_queue_vector(vdev, n));
ff24bd58
MT		 221}
222
d2a0ccc6 223static int virtio_pci_load_config(DeviceState *d, QEMUFile *f)
ff24bd58 224{
d2a0ccc6 225 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 226 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
227
ff24bd58
MT		 228 int ret;
229 ret = pci_device_load(&proxy->pci_dev, f);
e6da7680 230 if (ret) {
ff24bd58 231 return ret;
e6da7680 232 }
3cac001e 233 msix_unuse_all_vectors(&proxy->pci_dev);
ff24bd58 234 msix_load(&proxy->pci_dev, f);
e6da7680 235 if (msix_present(&proxy->pci_dev)) {
a3fc66d9 236 qemu_get_be16s(f, &vdev->config_vector);
e6da7680 237 } else {
a3fc66d9 238 vdev->config_vector = VIRTIO_NO_VECTOR;
e6da7680 239 }
a3fc66d9
PB		 240 if (vdev->config_vector != VIRTIO_NO_VECTOR) {
241 return msix_vector_use(&proxy->pci_dev, vdev->config_vector);
e6da7680 242 }
ff24bd58
MT		 243 return 0;
244}
245
d2a0ccc6 246static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f)
ff24bd58 247{
d2a0ccc6 248 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 249 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
250
ff24bd58 251 uint16_t vector;
e6da7680
MT		 252 if (msix_present(&proxy->pci_dev)) {
253 qemu_get_be16s(f, &vector);
254 } else {
255 vector = VIRTIO_NO_VECTOR;
256 }
a3fc66d9 257 virtio_queue_set_vector(vdev, n, vector);
e6da7680
MT		 258 if (vector != VIRTIO_NO_VECTOR) {
259 return msix_vector_use(&proxy->pci_dev, vector);
260 }
a6df8adf 261
ff24bd58
MT		 262 return 0;
263}
264
9f06e71a
CH		 265static bool virtio_pci_ioeventfd_started(DeviceState *d)
266{
267 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
268
269 return proxy->ioeventfd_started;
270}
271
272static void virtio_pci_ioeventfd_set_started(DeviceState *d, bool started,
273 bool err)
274{
275 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
276
277 proxy->ioeventfd_started = started;
278}
279
280static bool virtio_pci_ioeventfd_disabled(DeviceState *d)
281{
282 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
283
284 return proxy->ioeventfd_disabled ||
285 !(proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD);
286}
287
288static void virtio_pci_ioeventfd_set_disabled(DeviceState *d, bool disabled)
289{
290 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
291
292 proxy->ioeventfd_disabled = disabled;
293}
294
975acc0a
JW		 295#define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000
296
d9997d89
MA		 297static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy)
298{
299 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ?
300 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4;
301}
302
9f06e71a
CH		 303static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier,
304 int n, bool assign)
25db9ebe 305{
9f06e71a 306 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 307 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
308 VirtQueue *vq = virtio_get_queue(vdev, n);
9a4c0e22
MA		 309 bool legacy = virtio_pci_legacy(proxy);
310 bool modern = virtio_pci_modern(proxy);
bc85ccfd 311 bool fast_mmio = kvm_ioeventfd_any_length_enabled();
9824d2a3 312 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
588255ad 313 MemoryRegion *modern_mr = &proxy->notify.mr;
9824d2a3 314 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr;
975acc0a 315 MemoryRegion *legacy_mr = &proxy->bar;
d9997d89 316 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) *
975acc0a
JW		 317 virtio_get_queue_index(vq);
318 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY;
da146d0a 319
25db9ebe 320 if (assign) {
975acc0a 321 if (modern) {
bc85ccfd
JW		 322 if (fast_mmio) {
323 memory_region_add_eventfd(modern_mr, modern_addr, 0,
324 false, n, notifier);
325 } else {
326 memory_region_add_eventfd(modern_mr, modern_addr, 2,
327 false, n, notifier);
328 }
9824d2a3
JW		 329 if (modern_pio) {
330 memory_region_add_eventfd(modern_notify_mr, 0, 2,
331 true, n, notifier);
332 }
975acc0a
JW		 333 }
334 if (legacy) {
335 memory_region_add_eventfd(legacy_mr, legacy_addr, 2,
336 true, n, notifier);
337 }
25db9ebe 338 } else {
975acc0a 339 if (modern) {
bc85ccfd
JW		 340 if (fast_mmio) {
341 memory_region_del_eventfd(modern_mr, modern_addr, 0,
342 false, n, notifier);
343 } else {
344 memory_region_del_eventfd(modern_mr, modern_addr, 2,
345 false, n, notifier);
346 }
9824d2a3
JW		 347 if (modern_pio) {
348 memory_region_del_eventfd(modern_notify_mr, 0, 2,
349 true, n, notifier);
350 }
975acc0a
JW		 351 }
352 if (legacy) {
353 memory_region_del_eventfd(legacy_mr, legacy_addr, 2,
354 true, n, notifier);
355 }
25db9ebe 356 }
9f06e71a 357 return 0;
25db9ebe
SH		 358}
359
b36e3914 360static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy)
25db9ebe 361{
9f06e71a 362 virtio_bus_start_ioeventfd(&proxy->bus);
25db9ebe
SH		 363}
364
b36e3914 365static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy)
25db9ebe 366{
9f06e71a 367 virtio_bus_stop_ioeventfd(&proxy->bus);
25db9ebe
SH		 368}
369
53c25cea
PB		 370static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
371{
372 VirtIOPCIProxy *proxy = opaque;
a3fc66d9 373 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
a8170e5e 374 hwaddr pa;
53c25cea 375
53c25cea
PB		 376 switch (addr) {
377 case VIRTIO_PCI_GUEST_FEATURES:
181103cd
FK		 378 /* Guest does not negotiate properly? We have to assume nothing. */
379 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
380 val = virtio_bus_get_vdev_bad_features(&proxy->bus);
381 }
ad0c9332 382 virtio_set_features(vdev, val);
53c25cea
PB		 383 break;
384 case VIRTIO_PCI_QUEUE_PFN:
a8170e5e 385 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
1b8e9b27 386 if (pa == 0) {
75fd6f13 387 virtio_pci_reset(DEVICE(proxy));
1b8e9b27 388 }
7055e687
MT		 389 else
390 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
53c25cea
PB		 391 break;
392 case VIRTIO_PCI_QUEUE_SEL:
87b3bd1c 393 if (val < VIRTIO_QUEUE_MAX)
53c25cea
PB		 394 vdev->queue_sel = val;
395 break;
396 case VIRTIO_PCI_QUEUE_NOTIFY:
87b3bd1c 397 if (val < VIRTIO_QUEUE_MAX) {
7157e2e2
SH		 398 virtio_queue_notify(vdev, val);
399 }
53c25cea
PB		 400 break;
401 case VIRTIO_PCI_STATUS:
25db9ebe
SH		 402 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
403 virtio_pci_stop_ioeventfd(proxy);
404 }
405
3e607cb5 406 virtio_set_status(vdev, val & 0xFF);
25db9ebe
SH		 407
408 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
409 virtio_pci_start_ioeventfd(proxy);
410 }
411
1b8e9b27 412 if (vdev->status == 0) {
75fd6f13 413 virtio_pci_reset(DEVICE(proxy));
1b8e9b27 414 }
c81131db 415
e43c0b2e
MT		 416 /* Linux before 2.6.34 drives the device without enabling
417 the PCI device bus master bit. Enable it automatically
418 for the guest. This is a PCI spec violation but so is
419 initiating DMA with bus master bit clear. */
420 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) {
421 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
422 proxy->pci_dev.config[PCI_COMMAND] |
423 PCI_COMMAND_MASTER, 1);
424 }
53c25cea 425 break;
aba800a3
MT		 426 case VIRTIO_MSI_CONFIG_VECTOR:
427 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
428 /* Make it possible for guest to discover an error took place. */
429 if (msix_vector_use(&proxy->pci_dev, val) < 0)
430 val = VIRTIO_NO_VECTOR;
431 vdev->config_vector = val;
432 break;
433 case VIRTIO_MSI_QUEUE_VECTOR:
434 msix_vector_unuse(&proxy->pci_dev,
435 virtio_queue_vector(vdev, vdev->queue_sel));
436 /* Make it possible for guest to discover an error took place. */
437 if (msix_vector_use(&proxy->pci_dev, val) < 0)
438 val = VIRTIO_NO_VECTOR;
439 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
440 break;
441 default:
4e02d460
SH		 442 error_report("%s: unexpected address 0x%x value 0x%x",
443 __func__, addr, val);
aba800a3 444 break;
53c25cea
PB		 445 }
446}
447
aba800a3 448static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
53c25cea 449{
a3fc66d9 450 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
53c25cea
PB		 451 uint32_t ret = 0xFFFFFFFF;
452
53c25cea
PB		 453 switch (addr) {
454 case VIRTIO_PCI_HOST_FEATURES:
6b8f1020 455 ret = vdev->host_features;
53c25cea
PB		 456 break;
457 case VIRTIO_PCI_GUEST_FEATURES:
704a76fc 458 ret = vdev->guest_features;
53c25cea
PB		 459 break;
460 case VIRTIO_PCI_QUEUE_PFN:
461 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
462 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
463 break;
464 case VIRTIO_PCI_QUEUE_NUM:
465 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
466 break;
467 case VIRTIO_PCI_QUEUE_SEL:
468 ret = vdev->queue_sel;
469 break;
470 case VIRTIO_PCI_STATUS:
471 ret = vdev->status;
472 break;
473 case VIRTIO_PCI_ISR:
474 /* reading from the ISR also clears it. */
475 ret = vdev->isr;
476 vdev->isr = 0;
9e64f8a3 477 pci_irq_deassert(&proxy->pci_dev);
53c25cea 478 break;
aba800a3
MT		 479 case VIRTIO_MSI_CONFIG_VECTOR:
480 ret = vdev->config_vector;
481 break;
482 case VIRTIO_MSI_QUEUE_VECTOR:
483 ret = virtio_queue_vector(vdev, vdev->queue_sel);
484 break;
53c25cea
PB		 485 default:
486 break;
487 }
488
489 return ret;
490}
491
df6db5b3
AG		 492static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr,
493 unsigned size)
53c25cea
PB		 494{
495 VirtIOPCIProxy *proxy = opaque;
a3fc66d9 496 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
cbbe4f50 497 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
df6db5b3 498 uint64_t val = 0;
aba800a3 499 if (addr < config) {
df6db5b3 500 return virtio_ioport_read(proxy, addr);
aba800a3
MT		 501 }
502 addr -= config;
53c25cea 503
df6db5b3
AG		 504 switch (size) {
505 case 1:
a3fc66d9 506 val = virtio_config_readb(vdev, addr);
df6db5b3
AG		 507 break;
508 case 2:
a3fc66d9 509 val = virtio_config_readw(vdev, addr);
616a6552 510 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 511 val = bswap16(val);
512 }
df6db5b3
AG		 513 break;
514 case 4:
a3fc66d9 515 val = virtio_config_readl(vdev, addr);
616a6552 516 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 517 val = bswap32(val);
518 }
df6db5b3 519 break;
82afa586 520 }
df6db5b3 521 return val;
53c25cea
PB		 522}
523
df6db5b3
AG		 524static void virtio_pci_config_write(void *opaque, hwaddr addr,
525 uint64_t val, unsigned size)
53c25cea
PB		 526{
527 VirtIOPCIProxy *proxy = opaque;
cbbe4f50 528 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
a3fc66d9 529 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
aba800a3
MT		 530 if (addr < config) {
531 virtio_ioport_write(proxy, addr, val);
532 return;
533 }
534 addr -= config;
df6db5b3
AG		 535 /*
536 * Virtio-PCI is odd. Ioports are LE but config space is target native
537 * endian.
538 */
539 switch (size) {
540 case 1:
a3fc66d9 541 virtio_config_writeb(vdev, addr, val);
df6db5b3
AG		 542 break;
543 case 2:
616a6552 544 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 545 val = bswap16(val);
546 }
a3fc66d9 547 virtio_config_writew(vdev, addr, val);
df6db5b3
AG		 548 break;
549 case 4:
616a6552 550 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 551 val = bswap32(val);
552 }
a3fc66d9 553 virtio_config_writel(vdev, addr, val);
df6db5b3 554 break;
82afa586 555 }
53c25cea
PB		 556}
557
da146d0a 558static const MemoryRegionOps virtio_pci_config_ops = {
df6db5b3
AG		 559 .read = virtio_pci_config_read,
560 .write = virtio_pci_config_write,
561 .impl = {
562 .min_access_size = 1,
563 .max_access_size = 4,
564 },
8e4a424b 565 .endianness = DEVICE_LITTLE_ENDIAN,
da146d0a 566};
aba800a3 567
1e40356c
MT		 568/* Below are generic functions to do memcpy from/to an address space,
569 * without byteswaps, with input validation.
570 *
571 * As regular address_space_* APIs all do some kind of byteswap at least for
572 * some host/target combinations, we are forced to explicitly convert to a
573 * known-endianness integer value.
574 * It doesn't really matter which endian format to go through, so the code
575 * below selects the endian that causes the least amount of work on the given
576 * host.
577 *
578 * Note: host pointer must be aligned.
579 */
580static
581void virtio_address_space_write(AddressSpace *as, hwaddr addr,
582 const uint8_t *buf, int len)
583{
584 uint32_t val;
585
586 /* address_space_* APIs assume an aligned address.
587 * As address is under guest control, handle illegal values.
588 */
589 addr &= ~(len - 1);
590
591 /* Make sure caller aligned buf properly */
592 assert(!(((uintptr_t)buf) & (len - 1)));
593
594 switch (len) {
595 case 1:
596 val = pci_get_byte(buf);
597 address_space_stb(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
598 break;
599 case 2:
600 val = pci_get_word(buf);
601 address_space_stw_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
602 break;
603 case 4:
604 val = pci_get_long(buf);
605 address_space_stl_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
606 break;
607 default:
608 /* As length is under guest control, handle illegal values. */
609 break;
610 }
611}
612
613static void
614virtio_address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len)
615{
616 uint32_t val;
617
618 /* address_space_* APIs assume an aligned address.
619 * As address is under guest control, handle illegal values.
620 */
621 addr &= ~(len - 1);
622
623 /* Make sure caller aligned buf properly */
624 assert(!(((uintptr_t)buf) & (len - 1)));
625
626 switch (len) {
627 case 1:
628 val = address_space_ldub(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
629 pci_set_byte(buf, val);
630 break;
631 case 2:
632 val = address_space_lduw_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
633 pci_set_word(buf, val);
634 break;
635 case 4:
636 val = address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
637 pci_set_long(buf, val);
638 break;
639 default:
640 /* As length is under guest control, handle illegal values. */
641 break;
642 }
643}
644
aba800a3
MT		 645static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
646 uint32_t val, int len)
647{
ed757e14 648 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
a3fc66d9 649 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
ada434cd 650 struct virtio_pci_cfg_cap *cfg;
ed757e14 651
1129714f
MT		 652 pci_default_write_config(pci_dev, address, val, len);
653
654 if (range_covers_byte(address, len, PCI_COMMAND) &&
68a27b20 655 !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
1129714f 656 virtio_pci_stop_ioeventfd(proxy);
45363e46 657 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
ed757e14 658 }
ada434cd
MT		 659
660 if (proxy->config_cap &&
661 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
662 pci_cfg_data),
663 sizeof cfg->pci_cfg_data)) {
664 uint32_t off;
665 uint32_t len;
666
667 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
668 off = le32_to_cpu(cfg->cap.offset);
669 len = le32_to_cpu(cfg->cap.length);
670
2a639123
MT		 671 if (len == 1 || len == 2 || len == 4) {
672 assert(len <= sizeof cfg->pci_cfg_data);
1e40356c
MT		 673 virtio_address_space_write(&proxy->modern_as, off,
674 cfg->pci_cfg_data, len);
ada434cd
MT		 675 }
676 }
677}
678
679static uint32_t virtio_read_config(PCIDevice *pci_dev,
680 uint32_t address, int len)
681{
682 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
683 struct virtio_pci_cfg_cap *cfg;
684
685 if (proxy->config_cap &&
686 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
687 pci_cfg_data),
688 sizeof cfg->pci_cfg_data)) {
689 uint32_t off;
690 uint32_t len;
691
692 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
693 off = le32_to_cpu(cfg->cap.offset);
694 len = le32_to_cpu(cfg->cap.length);
695
2a639123
MT		 696 if (len == 1 || len == 2 || len == 4) {
697 assert(len <= sizeof cfg->pci_cfg_data);
1e40356c
MT		 698 virtio_address_space_read(&proxy->modern_as, off,
699 cfg->pci_cfg_data, len);
ada434cd
MT		 700 }
701 }
702
703 return pci_default_read_config(pci_dev, address, len);
53c25cea
PB		 704}
705
7d37d351
JK		 706static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy,
707 unsigned int queue_no,
d1f6af6a 708 unsigned int vector)
7d37d351 709{
7d37d351 710 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
15b2bd18 711 int ret;
7d37d351
JK		 712
713 if (irqfd->users == 0) {
d1f6af6a 714 ret = kvm_irqchip_add_msi_route(kvm_state, vector, &proxy->pci_dev);
7d37d351
JK		 715 if (ret < 0) {
716 return ret;
717 }
718 irqfd->virq = ret;
719 }
720 irqfd->users++;
7d37d351
JK		 721 return 0;
722}
723
724static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy,
7d37d351 725 unsigned int vector)
774345f9
MT		 726{
727 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
728 if (--irqfd->users == 0) {
729 kvm_irqchip_release_virq(kvm_state, irqfd->virq);
730 }
731}
732
f1d0f15a
MT		 733static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy,
734 unsigned int queue_no,
735 unsigned int vector)
736{
737 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
a3fc66d9
PB		 738 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
739 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
f1d0f15a 740 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
9be38598 741 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq);
f1d0f15a
MT		 742}
743
744static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy,
745 unsigned int queue_no,
746 unsigned int vector)
7d37d351 747{
a3fc66d9
PB		 748 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
749 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
15b2bd18 750 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
7d37d351 751 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
15b2bd18 752 int ret;
7d37d351 753
1c9b71a7 754 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq);
7d37d351 755 assert(ret == 0);
f1d0f15a 756}
7d37d351 757
774345f9
MT		 758static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs)
759{
760 PCIDevice *dev = &proxy->pci_dev;
a3fc66d9 761 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
181103cd 762 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
774345f9
MT		 763 unsigned int vector;
764 int ret, queue_no;
774345f9
MT		 765
766 for (queue_no = 0; queue_no < nvqs; queue_no++) {
767 if (!virtio_queue_get_num(vdev, queue_no)) {
768 break;
769 }
770 vector = virtio_queue_vector(vdev, queue_no);
771 if (vector >= msix_nr_vectors_allocated(dev)) {
772 continue;
773 }
d1f6af6a 774 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector);
774345f9
MT		 775 if (ret < 0) {
776 goto undo;
7d37d351 777 }
f1d0f15a
MT		 778 /* If guest supports masking, set up irqfd now.
779 * Otherwise, delay until unmasked in the frontend.
780 */
5669655a 781 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
f1d0f15a
MT		 782 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
783 if (ret < 0) {
784 kvm_virtio_pci_vq_vector_release(proxy, vector);
785 goto undo;
786 }
787 }
7d37d351 788 }
7d37d351 789 return 0;
774345f9
MT		 790
791undo:
792 while (--queue_no >= 0) {
793 vector = virtio_queue_vector(vdev, queue_no);
794 if (vector >= msix_nr_vectors_allocated(dev)) {
795 continue;
796 }
5669655a 797 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
e387f99e 798 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 799 }
774345f9
MT		 800 kvm_virtio_pci_vq_vector_release(proxy, vector);
801 }
802 return ret;
7d37d351
JK		 803}
804
774345f9
MT		 805static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs)
806{
807 PCIDevice *dev = &proxy->pci_dev;
a3fc66d9 808 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
774345f9
MT		 809 unsigned int vector;
810 int queue_no;
181103cd 811 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
774345f9
MT		 812
813 for (queue_no = 0; queue_no < nvqs; queue_no++) {
814 if (!virtio_queue_get_num(vdev, queue_no)) {
815 break;
816 }
817 vector = virtio_queue_vector(vdev, queue_no);
818 if (vector >= msix_nr_vectors_allocated(dev)) {
819 continue;
820 }
f1d0f15a
MT		 821 /* If guest supports masking, clean up irqfd now.
822 * Otherwise, it was cleaned when masked in the frontend.
823 */
5669655a 824 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
e387f99e 825 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 826 }
774345f9
MT		 827 kvm_virtio_pci_vq_vector_release(proxy, vector);
828 }
829}
830
a38b2c49
MT		 831static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy,
832 unsigned int queue_no,
833 unsigned int vector,
834 MSIMessage msg)
774345f9 835{
a3fc66d9
PB		 836 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
837 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
838 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
774345f9 839 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
a38b2c49 840 VirtIOIRQFD *irqfd;
53510bfc 841 int ret = 0;
774345f9 842
a38b2c49
MT		 843 if (proxy->vector_irqfd) {
844 irqfd = &proxy->vector_irqfd[vector];
845 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) {
dc9f06ca
PF		 846 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg,
847 &proxy->pci_dev);
a38b2c49
MT		 848 if (ret < 0) {
849 return ret;
850 }
3f1fea0f 851 kvm_irqchip_commit_routes(kvm_state);
774345f9
MT		 852 }
853 }
854
f1d0f15a
MT		 855 /* If guest supports masking, irqfd is already setup, unmask it.
856 * Otherwise, set it up now.
857 */
5669655a 858 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
a3fc66d9 859 k->guest_notifier_mask(vdev, queue_no, false);
f1d0f15a 860 /* Test after unmasking to avoid losing events. */
181103cd 861 if (k->guest_notifier_pending &&
a3fc66d9 862 k->guest_notifier_pending(vdev, queue_no)) {
f1d0f15a
MT		 863 event_notifier_set(n);
864 }
865 } else {
866 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
7d37d351 867 }
774345f9 868 return ret;
7d37d351
JK		 869}
870
a38b2c49 871static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy,
7d37d351
JK		 872 unsigned int queue_no,
873 unsigned int vector)
874{
a3fc66d9
PB		 875 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
876 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
181103cd 877
f1d0f15a
MT		 878 /* If guest supports masking, keep irqfd but mask it.
879 * Otherwise, clean it up now.
880 */
5669655a 881 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
a3fc66d9 882 k->guest_notifier_mask(vdev, queue_no, true);
f1d0f15a 883 } else {
e387f99e 884 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 885 }
7d37d351
JK		 886}
887
a38b2c49
MT		 888static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector,
889 MSIMessage msg)
7d37d351
JK		 890{
891 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
a3fc66d9 892 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
851c2a75
JW		 893 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
894 int ret, index, unmasked = 0;
7d37d351 895
851c2a75
JW		 896 while (vq) {
897 index = virtio_get_queue_index(vq);
898 if (!virtio_queue_get_num(vdev, index)) {
7d37d351
JK		 899 break;
900 }
6652d081
JW		 901 if (index < proxy->nvqs_with_notifiers) {
902 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg);
903 if (ret < 0) {
904 goto undo;
905 }
906 ++unmasked;
7d37d351 907 }
851c2a75 908 vq = virtio_vector_next_queue(vq);
7d37d351 909 }
851c2a75 910
7d37d351
JK		 911 return 0;
912
913undo:
851c2a75 914 vq = virtio_vector_first_queue(vdev, vector);
6652d081 915 while (vq && unmasked >= 0) {
851c2a75 916 index = virtio_get_queue_index(vq);
6652d081
JW		 917 if (index < proxy->nvqs_with_notifiers) {
918 virtio_pci_vq_vector_mask(proxy, index, vector);
919 --unmasked;
920 }
851c2a75 921 vq = virtio_vector_next_queue(vq);
7d37d351
JK		 922 }
923 return ret;
924}
925
a38b2c49 926static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector)
7d37d351
JK		 927{
928 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
a3fc66d9 929 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
851c2a75
JW		 930 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
931 int index;
7d37d351 932
851c2a75
JW		 933 while (vq) {
934 index = virtio_get_queue_index(vq);
935 if (!virtio_queue_get_num(vdev, index)) {
7d37d351
JK		 936 break;
937 }
6652d081
JW		 938 if (index < proxy->nvqs_with_notifiers) {
939 virtio_pci_vq_vector_mask(proxy, index, vector);
940 }
851c2a75 941 vq = virtio_vector_next_queue(vq);
7d37d351
JK		 942 }
943}
944
a38b2c49
MT		 945static void virtio_pci_vector_poll(PCIDevice *dev,
946 unsigned int vector_start,
947 unsigned int vector_end)
89d62be9
MT		 948{
949 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
a3fc66d9 950 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
181103cd 951 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
89d62be9
MT		 952 int queue_no;
953 unsigned int vector;
954 EventNotifier *notifier;
955 VirtQueue *vq;
956
2d620f59 957 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
89d62be9
MT		 958 if (!virtio_queue_get_num(vdev, queue_no)) {
959 break;
960 }
961 vector = virtio_queue_vector(vdev, queue_no);
962 if (vector < vector_start || vector >= vector_end ||
963 !msix_is_masked(dev, vector)) {
964 continue;
965 }
966 vq = virtio_get_queue(vdev, queue_no);
967 notifier = virtio_queue_get_guest_notifier(vq);
181103cd
FK		 968 if (k->guest_notifier_pending) {
969 if (k->guest_notifier_pending(vdev, queue_no)) {
f1d0f15a
MT		 970 msix_set_pending(dev, vector);
971 }
972 } else if (event_notifier_test_and_clear(notifier)) {
89d62be9
MT		 973 msix_set_pending(dev, vector);
974 }
975 }
976}
977
978static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign,
979 bool with_irqfd)
ade80dc8 980{
d2a0ccc6 981 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 982 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
983 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
984 VirtQueue *vq = virtio_get_queue(vdev, n);
ade80dc8
MT		 985 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq);
986
987 if (assign) {
988 int r = event_notifier_init(notifier, 0);
989 if (r < 0) {
990 return r;
991 }
89d62be9 992 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd);
ade80dc8 993 } else {
89d62be9 994 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd);
ade80dc8
MT		 995 event_notifier_cleanup(notifier);
996 }
997
5669655a
VK		 998 if (!msix_enabled(&proxy->pci_dev) &&
999 vdev->use_guest_notifier_mask &&
1000 vdc->guest_notifier_mask) {
a3fc66d9 1001 vdc->guest_notifier_mask(vdev, n, !assign);
62c96360
MT		 1002 }
1003
ade80dc8
MT		 1004 return 0;
1005}
1006
d2a0ccc6 1007static bool virtio_pci_query_guest_notifiers(DeviceState *d)
5430a28f 1008{
d2a0ccc6 1009 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
5430a28f
MT		 1010 return msix_enabled(&proxy->pci_dev);
1011}
1012
2d620f59 1013static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign)
54dd9321 1014{
d2a0ccc6 1015 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9 1016 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
181103cd 1017 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
54dd9321 1018 int r, n;
89d62be9
MT		 1019 bool with_irqfd = msix_enabled(&proxy->pci_dev) &&
1020 kvm_msi_via_irqfd_enabled();
54dd9321 1021
87b3bd1c 1022 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX);
2d620f59
MT		 1023
1024 /* When deassigning, pass a consistent nvqs value
1025 * to avoid leaking notifiers.
1026 */
1027 assert(assign || nvqs == proxy->nvqs_with_notifiers);
1028
1029 proxy->nvqs_with_notifiers = nvqs;
1030
7d37d351 1031 /* Must unset vector notifier while guest notifier is still assigned */
181103cd 1032 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) {
7d37d351 1033 msix_unset_vector_notifiers(&proxy->pci_dev);
a38b2c49
MT		 1034 if (proxy->vector_irqfd) {
1035 kvm_virtio_pci_vector_release(proxy, nvqs);
1036 g_free(proxy->vector_irqfd);
1037 proxy->vector_irqfd = NULL;
1038 }
7d37d351
JK		 1039 }
1040
2d620f59 1041 for (n = 0; n < nvqs; n++) {
54dd9321
MT		 1042 if (!virtio_queue_get_num(vdev, n)) {
1043 break;
1044 }
1045
23fe2b3f 1046 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd);
54dd9321
MT		 1047 if (r < 0) {
1048 goto assign_error;
1049 }
1050 }
1051
7d37d351 1052 /* Must set vector notifier after guest notifier has been assigned */
181103cd 1053 if ((with_irqfd || k->guest_notifier_mask) && assign) {
a38b2c49
MT		 1054 if (with_irqfd) {
1055 proxy->vector_irqfd =
1056 g_malloc0(sizeof(*proxy->vector_irqfd) *
1057 msix_nr_vectors_allocated(&proxy->pci_dev));
1058 r = kvm_virtio_pci_vector_use(proxy, nvqs);
1059 if (r < 0) {
1060 goto assign_error;
1061 }
774345f9 1062 }
7d37d351 1063 r = msix_set_vector_notifiers(&proxy->pci_dev,
a38b2c49
MT		 1064 virtio_pci_vector_unmask,
1065 virtio_pci_vector_mask,
1066 virtio_pci_vector_poll);
7d37d351 1067 if (r < 0) {
774345f9 1068 goto notifiers_error;
7d37d351
JK		 1069 }
1070 }
1071
54dd9321
MT		 1072 return 0;
1073
774345f9 1074notifiers_error:
a38b2c49
MT		 1075 if (with_irqfd) {
1076 assert(assign);
1077 kvm_virtio_pci_vector_release(proxy, nvqs);
1078 }
774345f9 1079
54dd9321
MT		 1080assign_error:
1081 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */
7d37d351 1082 assert(assign);
54dd9321 1083 while (--n >= 0) {
89d62be9 1084 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd);
54dd9321
MT		 1085 }
1086 return r;
1087}
1088
d2a0ccc6 1089static void virtio_pci_vmstate_change(DeviceState *d, bool running)
25db9ebe 1090{
d2a0ccc6 1091 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9 1092 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
25db9ebe
SH		 1093
1094 if (running) {
68a27b20
MT		 1095 /* Old QEMU versions did not set bus master enable on status write.
1096 * Detect DRIVER set and enable it.
1097 */
1098 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) &&
1099 (vdev->status & VIRTIO_CONFIG_S_DRIVER) &&
45363e46 1100 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
68a27b20
MT		 1101 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
1102 proxy->pci_dev.config[PCI_COMMAND] |
1103 PCI_COMMAND_MASTER, 1);
89c473fd 1104 }
25db9ebe 1105 virtio_pci_start_ioeventfd(proxy);
ade80dc8 1106 } else {
25db9ebe 1107 virtio_pci_stop_ioeventfd(proxy);
ade80dc8 1108 }
ade80dc8
MT		 1109}
1110
60653b28 1111#ifdef CONFIG_VIRTFS
fc079951 1112static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
60653b28 1113{
234a336f
FK		 1114 V9fsPCIState *dev = VIRTIO_9P_PCI(vpci_dev);
1115 DeviceState *vdev = DEVICE(&dev->vdev);
60653b28 1116
234a336f 1117 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 1118 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
60653b28
PB		 1119}
1120
234a336f
FK		 1121static Property virtio_9p_pci_properties[] = {
1122 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1123 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
60653b28 1124 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
60653b28
PB		 1125 DEFINE_PROP_END_OF_LIST(),
1126};
1127
234a336f 1128static void virtio_9p_pci_class_init(ObjectClass *klass, void *data)
60653b28
PB		 1129{
1130 DeviceClass *dc = DEVICE_CLASS(klass);
234a336f
FK		 1131 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
1132 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
60653b28 1133
fc079951 1134 k->realize = virtio_9p_pci_realize;
234a336f
FK		 1135 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1136 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_9P;
1137 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
1138 pcidev_k->class_id = 0x2;
125ee0ed 1139 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
234a336f 1140 dc->props = virtio_9p_pci_properties;
60653b28
PB		 1141}
1142
234a336f
FK		 1143static void virtio_9p_pci_instance_init(Object *obj)
1144{
1145 V9fsPCIState *dev = VIRTIO_9P_PCI(obj);
c8075caf
GA		 1146
1147 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
1148 TYPE_VIRTIO_9P);
234a336f
FK		 1149}
1150
1151static const TypeInfo virtio_9p_pci_info = {
1152 .name = TYPE_VIRTIO_9P_PCI,
1153 .parent = TYPE_VIRTIO_PCI,
1154 .instance_size = sizeof(V9fsPCIState),
1155 .instance_init = virtio_9p_pci_instance_init,
1156 .class_init = virtio_9p_pci_class_init,
60653b28 1157};
234a336f 1158#endif /* CONFIG_VIRTFS */
60653b28 1159
085bccb7
FK		 1160/*
1161 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus.
1162 */
1163
e0d686bf
JW		 1164static int virtio_pci_query_nvectors(DeviceState *d)
1165{
1166 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1167
1168 return proxy->nvectors;
1169}
1170
ada434cd 1171static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
dfb8e184
MT		 1172 struct virtio_pci_cap *cap)
1173{
1174 PCIDevice *dev = &proxy->pci_dev;
1175 int offset;
1176
dfb8e184
MT		 1177 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0, cap->cap_len);
1178 assert(offset > 0);
1179
1180 assert(cap->cap_len >= sizeof *cap);
1181 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len,
1182 cap->cap_len - PCI_CAP_FLAGS);
ada434cd
MT		 1183
1184 return offset;
dfb8e184
MT		 1185}
1186
dfb8e184
MT		 1187static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
1188 unsigned size)
1189{
1190 VirtIOPCIProxy *proxy = opaque;
1191 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1192 uint32_t val = 0;
1193 int i;
1194
1195 switch (addr) {
1196 case VIRTIO_PCI_COMMON_DFSELECT:
1197 val = proxy->dfselect;
1198 break;
1199 case VIRTIO_PCI_COMMON_DF:
1200 if (proxy->dfselect <= 1) {
5f456073
MT		 1201 val = (vdev->host_features & ~VIRTIO_LEGACY_FEATURES) >>
1202 (32 * proxy->dfselect);
dfb8e184
MT		 1203 }
1204 break;
1205 case VIRTIO_PCI_COMMON_GFSELECT:
1206 val = proxy->gfselect;
1207 break;
1208 case VIRTIO_PCI_COMMON_GF:
3750dabc 1209 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
dfb8e184
MT		 1210 val = proxy->guest_features[proxy->gfselect];
1211 }
1212 break;
1213 case VIRTIO_PCI_COMMON_MSIX:
1214 val = vdev->config_vector;
1215 break;
1216 case VIRTIO_PCI_COMMON_NUMQ:
1217 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) {
1218 if (virtio_queue_get_num(vdev, i)) {
1219 val = i + 1;
1220 }
1221 }
1222 break;
1223 case VIRTIO_PCI_COMMON_STATUS:
1224 val = vdev->status;
1225 break;
1226 case VIRTIO_PCI_COMMON_CFGGENERATION:
b8f05908 1227 val = vdev->generation;
dfb8e184
MT		 1228 break;
1229 case VIRTIO_PCI_COMMON_Q_SELECT:
1230 val = vdev->queue_sel;
1231 break;
1232 case VIRTIO_PCI_COMMON_Q_SIZE:
1233 val = virtio_queue_get_num(vdev, vdev->queue_sel);
1234 break;
1235 case VIRTIO_PCI_COMMON_Q_MSIX:
1236 val = virtio_queue_vector(vdev, vdev->queue_sel);
1237 break;
1238 case VIRTIO_PCI_COMMON_Q_ENABLE:
1239 val = proxy->vqs[vdev->queue_sel].enabled;
1240 break;
1241 case VIRTIO_PCI_COMMON_Q_NOFF:
1242 /* Simply map queues in order */
1243 val = vdev->queue_sel;
1244 break;
1245 case VIRTIO_PCI_COMMON_Q_DESCLO:
1246 val = proxy->vqs[vdev->queue_sel].desc[0];
1247 break;
1248 case VIRTIO_PCI_COMMON_Q_DESCHI:
1249 val = proxy->vqs[vdev->queue_sel].desc[1];
1250 break;
1251 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1252 val = proxy->vqs[vdev->queue_sel].avail[0];
1253 break;
1254 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1255 val = proxy->vqs[vdev->queue_sel].avail[1];
1256 break;
1257 case VIRTIO_PCI_COMMON_Q_USEDLO:
1258 val = proxy->vqs[vdev->queue_sel].used[0];
1259 break;
1260 case VIRTIO_PCI_COMMON_Q_USEDHI:
1261 val = proxy->vqs[vdev->queue_sel].used[1];
1262 break;
1263 default:
1264 val = 0;
1265 }
1266
1267 return val;
1268}
1269
1270static void virtio_pci_common_write(void *opaque, hwaddr addr,
1271 uint64_t val, unsigned size)
1272{
1273 VirtIOPCIProxy *proxy = opaque;
1274 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1275
1276 switch (addr) {
1277 case VIRTIO_PCI_COMMON_DFSELECT:
1278 proxy->dfselect = val;
1279 break;
1280 case VIRTIO_PCI_COMMON_GFSELECT:
1281 proxy->gfselect = val;
1282 break;
1283 case VIRTIO_PCI_COMMON_GF:
3750dabc 1284 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
dfb8e184
MT		 1285 proxy->guest_features[proxy->gfselect] = val;
1286 virtio_set_features(vdev,
1287 (((uint64_t)proxy->guest_features[1]) << 32) |
1288 proxy->guest_features[0]);
1289 }
1290 break;
1291 case VIRTIO_PCI_COMMON_MSIX:
1292 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
1293 /* Make it possible for guest to discover an error took place. */
1294 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1295 val = VIRTIO_NO_VECTOR;
1296 }
1297 vdev->config_vector = val;
1298 break;
1299 case VIRTIO_PCI_COMMON_STATUS:
1300 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
1301 virtio_pci_stop_ioeventfd(proxy);
1302 }
1303
1304 virtio_set_status(vdev, val & 0xFF);
1305
1306 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
1307 virtio_pci_start_ioeventfd(proxy);
1308 }
1309
1310 if (vdev->status == 0) {
75fd6f13 1311 virtio_pci_reset(DEVICE(proxy));
dfb8e184
MT		 1312 }
1313
1314 break;
1315 case VIRTIO_PCI_COMMON_Q_SELECT:
1316 if (val < VIRTIO_QUEUE_MAX) {
1317 vdev->queue_sel = val;
1318 }
1319 break;
1320 case VIRTIO_PCI_COMMON_Q_SIZE:
1321 proxy->vqs[vdev->queue_sel].num = val;
1322 break;
1323 case VIRTIO_PCI_COMMON_Q_MSIX:
1324 msix_vector_unuse(&proxy->pci_dev,
1325 virtio_queue_vector(vdev, vdev->queue_sel));
1326 /* Make it possible for guest to discover an error took place. */
1327 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1328 val = VIRTIO_NO_VECTOR;
1329 }
1330 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
1331 break;
1332 case VIRTIO_PCI_COMMON_Q_ENABLE:
1333 /* TODO: need a way to put num back on reset. */
1334 virtio_queue_set_num(vdev, vdev->queue_sel,
1335 proxy->vqs[vdev->queue_sel].num);
1336 virtio_queue_set_rings(vdev, vdev->queue_sel,
1337 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 |
1338 proxy->vqs[vdev->queue_sel].desc[0],
1339 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 |
1340 proxy->vqs[vdev->queue_sel].avail[0],
1341 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 |
1342 proxy->vqs[vdev->queue_sel].used[0]);
393f04d3 1343 proxy->vqs[vdev->queue_sel].enabled = 1;
dfb8e184
MT		 1344 break;
1345 case VIRTIO_PCI_COMMON_Q_DESCLO:
1346 proxy->vqs[vdev->queue_sel].desc[0] = val;
1347 break;
1348 case VIRTIO_PCI_COMMON_Q_DESCHI:
1349 proxy->vqs[vdev->queue_sel].desc[1] = val;
1350 break;
1351 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1352 proxy->vqs[vdev->queue_sel].avail[0] = val;
1353 break;
1354 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1355 proxy->vqs[vdev->queue_sel].avail[1] = val;
1356 break;
1357 case VIRTIO_PCI_COMMON_Q_USEDLO:
1358 proxy->vqs[vdev->queue_sel].used[0] = val;
1359 break;
1360 case VIRTIO_PCI_COMMON_Q_USEDHI:
1361 proxy->vqs[vdev->queue_sel].used[1] = val;
1362 break;
1363 default:
1364 break;
1365 }
1366}
1367
1368
1369static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr,
1370 unsigned size)
1371{
1372 return 0;
1373}
1374
1375static void virtio_pci_notify_write(void *opaque, hwaddr addr,
1376 uint64_t val, unsigned size)
1377{
1378 VirtIODevice *vdev = opaque;
d9997d89
MA		 1379 VirtIOPCIProxy *proxy = VIRTIO_PCI(DEVICE(vdev)->parent_bus->parent);
1380 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy);
dfb8e184
MT		 1381
1382 if (queue < VIRTIO_QUEUE_MAX) {
1383 virtio_queue_notify(vdev, queue);
1384 }
1385}
1386
9824d2a3
JW		 1387static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr,
1388 uint64_t val, unsigned size)
1389{
1390 VirtIODevice *vdev = opaque;
1391 unsigned queue = val;
1392
1393 if (queue < VIRTIO_QUEUE_MAX) {
1394 virtio_queue_notify(vdev, queue);
1395 }
1396}
1397
dfb8e184
MT		 1398static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr,
1399 unsigned size)
1400{
1401 VirtIOPCIProxy *proxy = opaque;
1402 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1403 uint64_t val = vdev->isr;
1404
1405 vdev->isr = 0;
1406 pci_irq_deassert(&proxy->pci_dev);
1407
1408 return val;
1409}
1410
1411static void virtio_pci_isr_write(void *opaque, hwaddr addr,
1412 uint64_t val, unsigned size)
1413{
1414}
1415
1416static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr,
1417 unsigned size)
1418{
1419 VirtIODevice *vdev = opaque;
1420 uint64_t val = 0;
1421
1422 switch (size) {
1423 case 1:
54c720d4 1424 val = virtio_config_modern_readb(vdev, addr);
dfb8e184
MT		 1425 break;
1426 case 2:
54c720d4 1427 val = virtio_config_modern_readw(vdev, addr);
dfb8e184
MT		 1428 break;
1429 case 4:
54c720d4 1430 val = virtio_config_modern_readl(vdev, addr);
dfb8e184
MT		 1431 break;
1432 }
1433 return val;
1434}
1435
1436static void virtio_pci_device_write(void *opaque, hwaddr addr,
1437 uint64_t val, unsigned size)
1438{
1439 VirtIODevice *vdev = opaque;
1440 switch (size) {
1441 case 1:
54c720d4 1442 virtio_config_modern_writeb(vdev, addr, val);
dfb8e184
MT		 1443 break;
1444 case 2:
54c720d4 1445 virtio_config_modern_writew(vdev, addr, val);
dfb8e184
MT		 1446 break;
1447 case 4:
54c720d4 1448 virtio_config_modern_writel(vdev, addr, val);
dfb8e184
MT		 1449 break;
1450 }
1451}
1452
1141ce21
GH		 1453static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy)
1454{
1455 static const MemoryRegionOps common_ops = {
1456 .read = virtio_pci_common_read,
1457 .write = virtio_pci_common_write,
1458 .impl = {
1459 .min_access_size = 1,
1460 .max_access_size = 4,
1461 },
1462 .endianness = DEVICE_LITTLE_ENDIAN,
1463 };
1464 static const MemoryRegionOps isr_ops = {
1465 .read = virtio_pci_isr_read,
1466 .write = virtio_pci_isr_write,
1467 .impl = {
1468 .min_access_size = 1,
1469 .max_access_size = 4,
1470 },
1471 .endianness = DEVICE_LITTLE_ENDIAN,
1472 };
1473 static const MemoryRegionOps device_ops = {
1474 .read = virtio_pci_device_read,
1475 .write = virtio_pci_device_write,
1476 .impl = {
1477 .min_access_size = 1,
1478 .max_access_size = 4,
1479 },
1480 .endianness = DEVICE_LITTLE_ENDIAN,
1481 };
1482 static const MemoryRegionOps notify_ops = {
1483 .read = virtio_pci_notify_read,
1484 .write = virtio_pci_notify_write,
1485 .impl = {
1486 .min_access_size = 1,
1487 .max_access_size = 4,
1488 },
1489 .endianness = DEVICE_LITTLE_ENDIAN,
1490 };
9824d2a3
JW		 1491 static const MemoryRegionOps notify_pio_ops = {
1492 .read = virtio_pci_notify_read,
1493 .write = virtio_pci_notify_write_pio,
1494 .impl = {
1495 .min_access_size = 1,
1496 .max_access_size = 4,
1497 },
1498 .endianness = DEVICE_LITTLE_ENDIAN,
1499 };
1500
1141ce21
GH		 1501
1502 memory_region_init_io(&proxy->common.mr, OBJECT(proxy),
1503 &common_ops,
1504 proxy,
b6ce27a5
GH		 1505 "virtio-pci-common",
1506 proxy->common.size);
a3cc2e81 1507
1141ce21
GH		 1508 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy),
1509 &isr_ops,
1510 proxy,
b6ce27a5
GH		 1511 "virtio-pci-isr",
1512 proxy->isr.size);
a3cc2e81 1513
1141ce21
GH		 1514 memory_region_init_io(&proxy->device.mr, OBJECT(proxy),
1515 &device_ops,
1516 virtio_bus_get_device(&proxy->bus),
b6ce27a5
GH		 1517 "virtio-pci-device",
1518 proxy->device.size);
a3cc2e81 1519
1141ce21
GH		 1520 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy),
1521 &notify_ops,
1522 virtio_bus_get_device(&proxy->bus),
1523 "virtio-pci-notify",
b6ce27a5 1524 proxy->notify.size);
9824d2a3
JW		 1525
1526 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy),
1527 &notify_pio_ops,
1528 virtio_bus_get_device(&proxy->bus),
1529 "virtio-pci-notify-pio",
e3aab6c7 1530 proxy->notify_pio.size);
a3cc2e81
GH		 1531}
1532
1533static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy,
54790d71 1534 VirtIOPCIRegion *region,
9824d2a3
JW		 1535 struct virtio_pci_cap *cap,
1536 MemoryRegion *mr,
1537 uint8_t bar)
a3cc2e81 1538{
9824d2a3 1539 memory_region_add_subregion(mr, region->offset, &region->mr);
54790d71 1540
fc004905 1541 cap->cfg_type = region->type;
9824d2a3 1542 cap->bar = bar;
54790d71 1543 cap->offset = cpu_to_le32(region->offset);
b6ce27a5 1544 cap->length = cpu_to_le32(region->size);
54790d71 1545 virtio_pci_add_mem_cap(proxy, cap);
9824d2a3
JW		 1546
1547}
1548
1549static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy,
1550 VirtIOPCIRegion *region,
1551 struct virtio_pci_cap *cap)
1552{
1553 virtio_pci_modern_region_map(proxy, region, cap,
1554 &proxy->modern_bar, proxy->modern_mem_bar);
1141ce21 1555}
dfb8e184 1556
9824d2a3
JW		 1557static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy,
1558 VirtIOPCIRegion *region,
1559 struct virtio_pci_cap *cap)
1560{
1561 virtio_pci_modern_region_map(proxy, region, cap,
1562 &proxy->io_bar, proxy->modern_io_bar);
1563}
1564
1565static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy,
1566 VirtIOPCIRegion *region)
27462695
MT		 1567{
1568 memory_region_del_subregion(&proxy->modern_bar,
1569 &region->mr);
1570}
1571
9824d2a3
JW		 1572static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy,
1573 VirtIOPCIRegion *region)
1574{
1575 memory_region_del_subregion(&proxy->io_bar,
1576 &region->mr);
1577}
1578
085bccb7 1579/* This is called by virtio-bus just after the device is plugged. */
e8398045 1580static void virtio_pci_device_plugged(DeviceState *d, Error **errp)
085bccb7
FK		 1581{
1582 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1583 VirtioBusState *bus = &proxy->bus;
9a4c0e22
MA		 1584 bool legacy = virtio_pci_legacy(proxy);
1585 bool modern = virtio_pci_modern(proxy);
9824d2a3 1586 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
085bccb7
FK		 1587 uint8_t *config;
1588 uint32_t size;
6b8f1020 1589 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
085bccb7 1590
085bccb7
FK		 1591 config = proxy->pci_dev.config;
1592 if (proxy->class_code) {
1593 pci_config_set_class(config, proxy->class_code);
1594 }
e266d421
GH		 1595
1596 if (legacy) {
1597 /* legacy and transitional */
1598 pci_set_word(config + PCI_SUBSYSTEM_VENDOR_ID,
1599 pci_get_word(config + PCI_VENDOR_ID));
1600 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus));
1601 } else {
1602 /* pure virtio-1.0 */
1603 pci_set_word(config + PCI_VENDOR_ID,
1604 PCI_VENDOR_ID_REDHAT_QUMRANET);
1605 pci_set_word(config + PCI_DEVICE_ID,
1606 0x1040 + virtio_bus_get_vdev_id(bus));
1607 pci_config_set_revision(config, 1);
1608 }
085bccb7
FK		 1609 config[PCI_INTERRUPT_PIN] = 1;
1610
dfb8e184 1611
e266d421 1612 if (modern) {
cc52ea90
GH		 1613 struct virtio_pci_cap cap = {
1614 .cap_len = sizeof cap,
dfb8e184
MT		 1615 };
1616 struct virtio_pci_notify_cap notify = {
dfb8e184 1617 .cap.cap_len = sizeof notify,
dfb8e184 1618 .notify_off_multiplier =
d9997d89 1619 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)),
dfb8e184 1620 };
ada434cd
MT		 1621 struct virtio_pci_cfg_cap cfg = {
1622 .cap.cap_len = sizeof cfg,
1623 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG,
1624 };
9824d2a3
JW		 1625 struct virtio_pci_notify_cap notify_pio = {
1626 .cap.cap_len = sizeof notify,
1627 .notify_off_multiplier = cpu_to_le32(0x0),
1628 };
dfb8e184 1629
9824d2a3 1630 struct virtio_pci_cfg_cap *cfg_mask;
dfb8e184
MT		 1631
1632 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1);
1141ce21 1633 virtio_pci_modern_regions_init(proxy);
9824d2a3
JW		 1634
1635 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap);
1636 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap);
1637 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap);
1638 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, &notify.cap);
1639
1640 if (modern_pio) {
1641 memory_region_init(&proxy->io_bar, OBJECT(proxy),
1642 "virtio-pci-io", 0x4);
1643
1644 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar,
1645 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar);
1646
1647 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio,
1648 &notify_pio.cap);
1649 }
ada434cd 1650
b6ce27a5 1651 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar,
4e93a68e
GH		 1652 PCI_BASE_ADDRESS_SPACE_MEMORY |
1653 PCI_BASE_ADDRESS_MEM_PREFETCH |
1654 PCI_BASE_ADDRESS_MEM_TYPE_64,
dfb8e184 1655 &proxy->modern_bar);
ada434cd
MT		 1656
1657 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap);
1658 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap);
1659 pci_set_byte(&cfg_mask->cap.bar, ~0x0);
1660 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0);
1661 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0);
1662 pci_set_long(cfg_mask->pci_cfg_data, ~0x0);
dfb8e184
MT		 1663 }
1664
0d583647
RH		 1665 if (proxy->nvectors) {
1666 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors,
1667 proxy->msix_bar);
1668 if (err) {
1669 /* Notice when a system that supports MSIx can't initialize it. */
1670 if (err != -ENOTSUP) {
1671 error_report("unable to init msix vectors to %" PRIu32,
1672 proxy->nvectors);
1673 }
1674 proxy->nvectors = 0;
1675 }
085bccb7
FK		 1676 }
1677
1678 proxy->pci_dev.config_write = virtio_write_config;
ada434cd 1679 proxy->pci_dev.config_read = virtio_read_config;
085bccb7 1680
e266d421
GH		 1681 if (legacy) {
1682 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev)
1683 + virtio_bus_get_vdev_config_len(bus);
1d0148fe 1684 size = pow2ceil(size);
085bccb7 1685
e266d421
GH		 1686 memory_region_init_io(&proxy->bar, OBJECT(proxy),
1687 &virtio_pci_config_ops,
1688 proxy, "virtio-pci", size);
dfb8e184 1689
b6ce27a5 1690 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar,
23c5e397 1691 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar);
e266d421 1692 }
085bccb7
FK		 1693
1694 if (!kvm_has_many_ioeventfds()) {
1695 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
1696 }
1697
6b8f1020 1698 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE);
085bccb7
FK		 1699}
1700
06a13073
PB		 1701static void virtio_pci_device_unplugged(DeviceState *d)
1702{
06a13073 1703 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
9a4c0e22 1704 bool modern = virtio_pci_modern(proxy);
9824d2a3 1705 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
06a13073
PB		 1706
1707 virtio_pci_stop_ioeventfd(proxy);
27462695
MT		 1708
1709 if (modern) {
9824d2a3
JW		 1710 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common);
1711 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr);
1712 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device);
1713 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify);
1714 if (modern_pio) {
1715 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio);
1716 }
27462695 1717 }
06a13073
PB		 1718}
1719
fc079951 1720static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
085bccb7 1721{
b6ce27a5 1722 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
085bccb7 1723 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
9a4c0e22
MA		 1724 bool pcie_port = pci_bus_is_express(pci_dev->bus) &&
1725 !pci_bus_is_root(pci_dev->bus);
fc079951 1726
b6ce27a5
GH		 1727 /*
1728 * virtio pci bar layout used by default.
1729 * subclasses can re-arrange things if needed.
1730 *
1731 * region 0 -- virtio legacy io bar
1732 * region 1 -- msi-x bar
1733 * region 4+5 -- virtio modern memory (64bit) bar
1734 *
1735 */
1736 proxy->legacy_io_bar = 0;
1737 proxy->msix_bar = 1;
9824d2a3 1738 proxy->modern_io_bar = 2;
b6ce27a5
GH		 1739 proxy->modern_mem_bar = 4;
1740
1741 proxy->common.offset = 0x0;
1742 proxy->common.size = 0x1000;
1743 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG;
1744
1745 proxy->isr.offset = 0x1000;
1746 proxy->isr.size = 0x1000;
1747 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG;
1748
1749 proxy->device.offset = 0x2000;
1750 proxy->device.size = 0x1000;
1751 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG;
1752
1753 proxy->notify.offset = 0x3000;
d9997d89 1754 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX;
b6ce27a5
GH		 1755 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1756
9824d2a3
JW		 1757 proxy->notify_pio.offset = 0x0;
1758 proxy->notify_pio.size = 0x4;
1759 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1760
b6ce27a5
GH		 1761 /* subclasses can enforce modern, so do this unconditionally */
1762 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci",
d9997d89
MA		 1763 /* PCI BAR regions must be powers of 2 */
1764 pow2ceil(proxy->notify.offset + proxy->notify.size));
b6ce27a5 1765
ada434cd
MT		 1766 memory_region_init_alias(&proxy->modern_cfg,
1767 OBJECT(proxy),
1768 "virtio-pci-cfg",
1769 &proxy->modern_bar,
1770 0,
1771 memory_region_size(&proxy->modern_bar));
1772
1773 address_space_init(&proxy->modern_as, &proxy->modern_cfg, "virtio-pci-cfg-as");
1774
9a4c0e22
MA		 1775 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) {
1776 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
1777 }
1778
71d19fc5 1779 if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) {
3eff3769
GK		 1780 error_setg(errp, "device cannot work as neither modern nor legacy mode"
1781 " is enabled");
1782 error_append_hint(errp, "Set either disable-modern or disable-legacy"
1783 " to off\n");
1784 return;
1785 }
1786
9a4c0e22 1787 if (pcie_port && pci_is_express(pci_dev)) {
1811e64c
MA		 1788 int pos;
1789
1811e64c
MA		 1790 pos = pcie_endpoint_cap_init(pci_dev, 0);
1791 assert(pos > 0);
1792
1793 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF);
1794 assert(pos > 0);
1795
1796 /*
1797 * Indicates that this function complies with revision 1.2 of the
1798 * PCI Power Management Interface Specification.
1799 */
1800 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
0560b0e9
SL		 1801 } else {
1802 /*
1803 * make future invocations of pci_is_express() return false
1804 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE.
1805 */
1806 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS;
1811e64c
MA		 1807 }
1808
b6ce27a5 1809 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy);
fc079951 1810 if (k->realize) {
b6ce27a5 1811 k->realize(proxy, errp);
085bccb7 1812 }
085bccb7
FK		 1813}
1814
1815static void virtio_pci_exit(PCIDevice *pci_dev)
1816{
ada434cd
MT		 1817 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
1818
8b81bb3b 1819 msix_uninit_exclusive_bar(pci_dev);
ada434cd 1820 address_space_destroy(&proxy->modern_as);
085bccb7
FK		 1821}
1822
59ccd20a 1823static void virtio_pci_reset(DeviceState *qdev)
085bccb7
FK		 1824{
1825 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1826 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
393f04d3
JW		 1827 int i;
1828
085bccb7
FK		 1829 virtio_pci_stop_ioeventfd(proxy);
1830 virtio_bus_reset(bus);
1831 msix_unuse_all_vectors(&proxy->pci_dev);
393f04d3
JW		 1832
1833 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
1834 proxy->vqs[i].enabled = 0;
1835 }
085bccb7
FK		 1836}
1837
85d1277e 1838static Property virtio_pci_properties[] = {
68a27b20
MT		 1839 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags,
1840 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false),
9a4c0e22
MA		 1841 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy,
1842 ON_OFF_AUTO_AUTO),
1843 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false),
a6df8adf
JW		 1844 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags,
1845 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true),
9824d2a3
JW		 1846 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags,
1847 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false),
1811e64c
MA		 1848 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags,
1849 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false),
d9997d89
MA		 1850 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags,
1851 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false),
85d1277e
ML		 1852 DEFINE_PROP_END_OF_LIST(),
1853};
1854
0560b0e9
SL		 1855static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp)
1856{
1857 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev);
1858 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1859 PCIDevice *pci_dev = &proxy->pci_dev;
1860
1861 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) &&
9a4c0e22 1862 virtio_pci_modern(proxy)) {
0560b0e9
SL		 1863 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
1864 }
1865
1866 vpciklass->parent_dc_realize(qdev, errp);
1867}
1868
085bccb7
FK		 1869static void virtio_pci_class_init(ObjectClass *klass, void *data)
1870{
1871 DeviceClass *dc = DEVICE_CLASS(klass);
1872 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
0560b0e9 1873 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
085bccb7 1874
85d1277e 1875 dc->props = virtio_pci_properties;
fc079951 1876 k->realize = virtio_pci_realize;
085bccb7
FK		 1877 k->exit = virtio_pci_exit;
1878 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1879 k->revision = VIRTIO_PCI_ABI_VERSION;
1880 k->class_id = PCI_CLASS_OTHERS;
0560b0e9
SL		 1881 vpciklass->parent_dc_realize = dc->realize;
1882 dc->realize = virtio_pci_dc_realize;
59ccd20a 1883 dc->reset = virtio_pci_reset;
085bccb7
FK		 1884}
1885
1886static const TypeInfo virtio_pci_info = {
1887 .name = TYPE_VIRTIO_PCI,
1888 .parent = TYPE_PCI_DEVICE,
1889 .instance_size = sizeof(VirtIOPCIProxy),
1890 .class_init = virtio_pci_class_init,
1891 .class_size = sizeof(VirtioPCIClass),
1892 .abstract = true,
1893};
1894
653ced07
FK		 1895/* virtio-blk-pci */
1896
1897static Property virtio_blk_pci_properties[] = {
c7bcc85d 1898 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
653ced07
FK		 1899 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1900 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1901 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
653ced07
FK		 1902 DEFINE_PROP_END_OF_LIST(),
1903};
1904
fc079951 1905static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
653ced07
FK		 1906{
1907 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(vpci_dev);
1908 DeviceState *vdev = DEVICE(&dev->vdev);
fc079951 1909
653ced07 1910 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 1911 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
653ced07
FK		 1912}
1913
1914static void virtio_blk_pci_class_init(ObjectClass *klass, void *data)
1915{
1916 DeviceClass *dc = DEVICE_CLASS(klass);
1917 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
1918 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
1919
125ee0ed 1920 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
653ced07 1921 dc->props = virtio_blk_pci_properties;
fc079951 1922 k->realize = virtio_blk_pci_realize;
653ced07
FK		 1923 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1924 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BLOCK;
1925 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
1926 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
1927}
1928
1929static void virtio_blk_pci_instance_init(Object *obj)
1930{
1931 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(obj);
c8075caf
GA		 1932
1933 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
1934 TYPE_VIRTIO_BLK);
467b3f33
SH		 1935 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev),"iothread",
1936 &error_abort);
aeb98ddc
GA		 1937 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
1938 "bootindex", &error_abort);
653ced07
FK		 1939}
1940
1941static const TypeInfo virtio_blk_pci_info = {
1942 .name = TYPE_VIRTIO_BLK_PCI,
1943 .parent = TYPE_VIRTIO_PCI,
1944 .instance_size = sizeof(VirtIOBlkPCI),
1945 .instance_init = virtio_blk_pci_instance_init,
1946 .class_init = virtio_blk_pci_class_init,
1947};
1948
bc7b90a0
FK		 1949/* virtio-scsi-pci */
1950
1951static Property virtio_scsi_pci_properties[] = {
1952 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1953 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1954 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
1955 DEV_NVECTORS_UNSPECIFIED),
bc7b90a0
FK		 1956 DEFINE_PROP_END_OF_LIST(),
1957};
1958
fc079951 1959static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
bc7b90a0
FK		 1960{
1961 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(vpci_dev);
1962 DeviceState *vdev = DEVICE(&dev->vdev);
292c8e50 1963 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev);
6f32a6b4
FK		 1964 DeviceState *proxy = DEVICE(vpci_dev);
1965 char *bus_name;
bc7b90a0
FK		 1966
1967 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
292c8e50 1968 vpci_dev->nvectors = vs->conf.num_queues + 3;
bc7b90a0
FK		 1969 }
1970
6f32a6b4
FK		 1971 /*
1972 * For command line compatibility, this sets the virtio-scsi-device bus
1973 * name as before.
1974 */
1975 if (proxy->id) {
1976 bus_name = g_strdup_printf("%s.0", proxy->id);
1977 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name);
1978 g_free(bus_name);
1979 }
1980
bc7b90a0 1981 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 1982 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
bc7b90a0
FK		 1983}
1984
1985static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data)
1986{
1987 DeviceClass *dc = DEVICE_CLASS(klass);
1988 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
1989 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951
MA		 1990
1991 k->realize = virtio_scsi_pci_realize;
125ee0ed 1992 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
bc7b90a0
FK		 1993 dc->props = virtio_scsi_pci_properties;
1994 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1995 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI;
1996 pcidev_k->revision = 0x00;
1997 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
1998}
1999
2000static void virtio_scsi_pci_instance_init(Object *obj)
2001{
2002 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(obj);
c8075caf
GA		 2003
2004 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2005 TYPE_VIRTIO_SCSI);
19d339f1
FZ		 2006 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev), "iothread",
2007 &error_abort);
bc7b90a0
FK		 2008}
2009
2010static const TypeInfo virtio_scsi_pci_info = {
2011 .name = TYPE_VIRTIO_SCSI_PCI,
2012 .parent = TYPE_VIRTIO_PCI,
2013 .instance_size = sizeof(VirtIOSCSIPCI),
2014 .instance_init = virtio_scsi_pci_instance_init,
2015 .class_init = virtio_scsi_pci_class_init,
2016};
2017
50787628
NB		 2018/* vhost-scsi-pci */
2019
2020#ifdef CONFIG_VHOST_SCSI
2021static Property vhost_scsi_pci_properties[] = {
2022 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
2023 DEV_NVECTORS_UNSPECIFIED),
50787628
NB		 2024 DEFINE_PROP_END_OF_LIST(),
2025};
2026
fc079951 2027static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
50787628
NB		 2028{
2029 VHostSCSIPCI *dev = VHOST_SCSI_PCI(vpci_dev);
2030 DeviceState *vdev = DEVICE(&dev->vdev);
2031 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev);
2032
2033 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
2034 vpci_dev->nvectors = vs->conf.num_queues + 3;
2035 }
2036
2037 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2038 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
50787628
NB		 2039}
2040
2041static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data)
2042{
2043 DeviceClass *dc = DEVICE_CLASS(klass);
2044 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2045 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951 2046 k->realize = vhost_scsi_pci_realize;
125ee0ed 2047 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
50787628
NB		 2048 dc->props = vhost_scsi_pci_properties;
2049 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2050 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI;
2051 pcidev_k->revision = 0x00;
2052 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
2053}
2054
2055static void vhost_scsi_pci_instance_init(Object *obj)
2056{
2057 VHostSCSIPCI *dev = VHOST_SCSI_PCI(obj);
c8075caf
GA		 2058
2059 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2060 TYPE_VHOST_SCSI);
d4433f32
GA		 2061 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
2062 "bootindex", &error_abort);
50787628
NB		 2063}
2064
2065static const TypeInfo vhost_scsi_pci_info = {
2066 .name = TYPE_VHOST_SCSI_PCI,
2067 .parent = TYPE_VIRTIO_PCI,
2068 .instance_size = sizeof(VHostSCSIPCI),
2069 .instance_init = vhost_scsi_pci_instance_init,
2070 .class_init = vhost_scsi_pci_class_init,
2071};
2072#endif
2073
fc0b9b0e
SH		 2074/* vhost-vsock-pci */
2075
2076#ifdef CONFIG_VHOST_VSOCK
2077static Property vhost_vsock_pci_properties[] = {
2078 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
2079 DEFINE_PROP_END_OF_LIST(),
2080};
2081
2082static void vhost_vsock_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
2083{
2084 VHostVSockPCI *dev = VHOST_VSOCK_PCI(vpci_dev);
2085 DeviceState *vdev = DEVICE(&dev->vdev);
2086
2087 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
2088 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
2089}
2090
2091static void vhost_vsock_pci_class_init(ObjectClass *klass, void *data)
2092{
2093 DeviceClass *dc = DEVICE_CLASS(klass);
2094 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2095 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2096 k->realize = vhost_vsock_pci_realize;
2097 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
2098 dc->props = vhost_vsock_pci_properties;
2099 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2100 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_VSOCK;
2101 pcidev_k->revision = 0x00;
2102 pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER;
2103}
2104
2105static void vhost_vsock_pci_instance_init(Object *obj)
2106{
2107 VHostVSockPCI *dev = VHOST_VSOCK_PCI(obj);
2108
2109 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2110 TYPE_VHOST_VSOCK);
2111}
2112
2113static const TypeInfo vhost_vsock_pci_info = {
2114 .name = TYPE_VHOST_VSOCK_PCI,
2115 .parent = TYPE_VIRTIO_PCI,
2116 .instance_size = sizeof(VHostVSockPCI),
2117 .instance_init = vhost_vsock_pci_instance_init,
2118 .class_init = vhost_vsock_pci_class_init,
2119};
2120#endif
2121
e378e88d
FK		 2122/* virtio-balloon-pci */
2123
2124static Property virtio_balloon_pci_properties[] = {
c7bcc85d 2125 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
e378e88d
FK		 2126 DEFINE_PROP_END_OF_LIST(),
2127};
2128
fc079951 2129static void virtio_balloon_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
e378e88d
FK		 2130{
2131 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(vpci_dev);
2132 DeviceState *vdev = DEVICE(&dev->vdev);
2133
2134 if (vpci_dev->class_code != PCI_CLASS_OTHERS &&
2135 vpci_dev->class_code != PCI_CLASS_MEMORY_RAM) { /* qemu < 1.1 */
2136 vpci_dev->class_code = PCI_CLASS_OTHERS;
2137 }
2138
2139 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2140 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
e378e88d
FK		 2141}
2142
2143static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data)
2144{
2145 DeviceClass *dc = DEVICE_CLASS(klass);
2146 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2147 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951 2148 k->realize = virtio_balloon_pci_realize;
125ee0ed 2149 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
e378e88d
FK		 2150 dc->props = virtio_balloon_pci_properties;
2151 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2152 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BALLOON;
2153 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2154 pcidev_k->class_id = PCI_CLASS_OTHERS;
2155}
2156
2157static void virtio_balloon_pci_instance_init(Object *obj)
2158{
2159 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(obj);
39b87c7b 2160
a6027b0f
DL		 2161 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2162 TYPE_VIRTIO_BALLOON);
39b87c7b
SZ		 2163 object_property_add_alias(obj, "guest-stats", OBJECT(&dev->vdev),
2164 "guest-stats", &error_abort);
2165 object_property_add_alias(obj, "guest-stats-polling-interval",
2166 OBJECT(&dev->vdev),
2167 "guest-stats-polling-interval", &error_abort);
e378e88d
FK		 2168}
2169
2170static const TypeInfo virtio_balloon_pci_info = {
2171 .name = TYPE_VIRTIO_BALLOON_PCI,
2172 .parent = TYPE_VIRTIO_PCI,
2173 .instance_size = sizeof(VirtIOBalloonPCI),
2174 .instance_init = virtio_balloon_pci_instance_init,
2175 .class_init = virtio_balloon_pci_class_init,
2176};
2177
f7f7464a
FK		 2178/* virtio-serial-pci */
2179
fc079951 2180static void virtio_serial_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
f7f7464a
FK		 2181{
2182 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(vpci_dev);
2183 DeviceState *vdev = DEVICE(&dev->vdev);
80270a19
FK		 2184 DeviceState *proxy = DEVICE(vpci_dev);
2185 char *bus_name;
f7f7464a
FK		 2186
2187 if (vpci_dev->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
2188 vpci_dev->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
2189 vpci_dev->class_code != PCI_CLASS_OTHERS) { /* qemu-kvm */
2190 vpci_dev->class_code = PCI_CLASS_COMMUNICATION_OTHER;
2191 }
2192
2193 /* backwards-compatibility with machines that were created with
2194 DEV_NVECTORS_UNSPECIFIED */
2195 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
2196 vpci_dev->nvectors = dev->vdev.serial.max_virtserial_ports + 1;
2197 }
2198
80270a19
FK		 2199 /*
2200 * For command line compatibility, this sets the virtio-serial-device bus
2201 * name as before.
2202 */
2203 if (proxy->id) {
2204 bus_name = g_strdup_printf("%s.0", proxy->id);
2205 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name);
2206 g_free(bus_name);
2207 }
2208
f7f7464a 2209 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2210 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
f7f7464a
FK		 2211}
2212
2213static Property virtio_serial_pci_properties[] = {
2214 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
2215 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
2216 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
c7bcc85d 2217 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
f7f7464a
FK		 2218 DEFINE_PROP_END_OF_LIST(),
2219};
2220
2221static void virtio_serial_pci_class_init(ObjectClass *klass, void *data)
2222{
2223 DeviceClass *dc = DEVICE_CLASS(klass);
2224 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2225 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951 2226 k->realize = virtio_serial_pci_realize;
125ee0ed 2227 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
f7f7464a
FK		 2228 dc->props = virtio_serial_pci_properties;
2229 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2230 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_CONSOLE;
2231 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2232 pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER;
2233}
2234
2235static void virtio_serial_pci_instance_init(Object *obj)
2236{
2237 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(obj);
c8075caf
GA		 2238
2239 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2240 TYPE_VIRTIO_SERIAL);
f7f7464a
FK		 2241}
2242
2243static const TypeInfo virtio_serial_pci_info = {
2244 .name = TYPE_VIRTIO_SERIAL_PCI,
2245 .parent = TYPE_VIRTIO_PCI,
2246 .instance_size = sizeof(VirtIOSerialPCI),
2247 .instance_init = virtio_serial_pci_instance_init,
2248 .class_init = virtio_serial_pci_class_init,
2249};
2250
e37da394
FK		 2251/* virtio-net-pci */
2252
2253static Property virtio_net_properties[] = {
2254 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
2255 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false),
2256 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
e37da394
FK		 2257 DEFINE_PROP_END_OF_LIST(),
2258};
2259
fc079951 2260static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
e37da394 2261{
800ced8c 2262 DeviceState *qdev = DEVICE(vpci_dev);
e37da394
FK		 2263 VirtIONetPCI *dev = VIRTIO_NET_PCI(vpci_dev);
2264 DeviceState *vdev = DEVICE(&dev->vdev);
2265
800ced8c
FK		 2266 virtio_net_set_netclient_name(&dev->vdev, qdev->id,
2267 object_get_typename(OBJECT(qdev)));
e37da394 2268 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2269 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
e37da394
FK		 2270}
2271
2272static void virtio_net_pci_class_init(ObjectClass *klass, void *data)
2273{
2274 DeviceClass *dc = DEVICE_CLASS(klass);
2275 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
2276 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
2277
2278 k->romfile = "efi-virtio.rom";
2279 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2280 k->device_id = PCI_DEVICE_ID_VIRTIO_NET;
2281 k->revision = VIRTIO_PCI_ABI_VERSION;
2282 k->class_id = PCI_CLASS_NETWORK_ETHERNET;
125ee0ed 2283 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
e37da394 2284 dc->props = virtio_net_properties;
fc079951 2285 vpciklass->realize = virtio_net_pci_realize;
e37da394
FK		 2286}
2287
2288static void virtio_net_pci_instance_init(Object *obj)
2289{
2290 VirtIONetPCI *dev = VIRTIO_NET_PCI(obj);
c8075caf
GA		 2291
2292 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2293 TYPE_VIRTIO_NET);
0cf63c3e
GA		 2294 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
2295 "bootindex", &error_abort);
e37da394
FK		 2296}
2297
2298static const TypeInfo virtio_net_pci_info = {
2299 .name = TYPE_VIRTIO_NET_PCI,
2300 .parent = TYPE_VIRTIO_PCI,
2301 .instance_size = sizeof(VirtIONetPCI),
2302 .instance_init = virtio_net_pci_instance_init,
2303 .class_init = virtio_net_pci_class_init,
2304};
2305
59ccd20a
FK		 2306/* virtio-rng-pci */
2307
fc079951 2308static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
59ccd20a
FK		 2309{
2310 VirtIORngPCI *vrng = VIRTIO_RNG_PCI(vpci_dev);
2311 DeviceState *vdev = DEVICE(&vrng->vdev);
fc079951 2312 Error *err = NULL;
59ccd20a
FK		 2313
2314 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951
MA		 2315 object_property_set_bool(OBJECT(vdev), true, "realized", &err);
2316 if (err) {
2317 error_propagate(errp, err);
2318 return;
59ccd20a
FK		 2319 }
2320
2321 object_property_set_link(OBJECT(vrng),
5b456438 2322 OBJECT(vrng->vdev.conf.rng), "rng",
59ccd20a 2323 NULL);
59ccd20a
FK		 2324}
2325
2326static void virtio_rng_pci_class_init(ObjectClass *klass, void *data)
2327{
2328 DeviceClass *dc = DEVICE_CLASS(klass);
2329 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2330 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2331
fc079951 2332 k->realize = virtio_rng_pci_realize;
125ee0ed 2333 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
59ccd20a
FK		 2334
2335 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2336 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_RNG;
2337 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2338 pcidev_k->class_id = PCI_CLASS_OTHERS;
2339}
2340
2341static void virtio_rng_initfn(Object *obj)
2342{
2343 VirtIORngPCI *dev = VIRTIO_RNG_PCI(obj);
c8075caf
GA		 2344
2345 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2346 TYPE_VIRTIO_RNG);
cbd5ac69
PB		 2347 object_property_add_alias(obj, "rng", OBJECT(&dev->vdev), "rng",
2348 &error_abort);
59ccd20a
FK		 2349}
2350
2351static const TypeInfo virtio_rng_pci_info = {
2352 .name = TYPE_VIRTIO_RNG_PCI,
2353 .parent = TYPE_VIRTIO_PCI,
2354 .instance_size = sizeof(VirtIORngPCI),
2355 .instance_init = virtio_rng_initfn,
2356 .class_init = virtio_rng_pci_class_init,
2357};
2358
f958c8aa
GH		 2359/* virtio-input-pci */
2360
6f2b9a5b 2361static Property virtio_input_pci_properties[] = {
710e2d90
GH		 2362 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
2363 DEFINE_PROP_END_OF_LIST(),
2364};
2365
f958c8aa
GH		 2366static void virtio_input_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
2367{
2368 VirtIOInputPCI *vinput = VIRTIO_INPUT_PCI(vpci_dev);
2369 DeviceState *vdev = DEVICE(&vinput->vdev);
2370
2371 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
9a4c0e22 2372 virtio_pci_force_virtio_1(vpci_dev);
f958c8aa
GH		 2373 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
2374}
2375
2376static void virtio_input_pci_class_init(ObjectClass *klass, void *data)
2377{
2378 DeviceClass *dc = DEVICE_CLASS(klass);
2379 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2380 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2381
6f2b9a5b 2382 dc->props = virtio_input_pci_properties;
f958c8aa
GH		 2383 k->realize = virtio_input_pci_realize;
2384 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
2385
2386 pcidev_k->class_id = PCI_CLASS_INPUT_OTHER;
2387}
2388
710e2d90
GH		 2389static void virtio_input_hid_kbd_pci_class_init(ObjectClass *klass, void *data)
2390{
2391 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2392
2393 pcidev_k->class_id = PCI_CLASS_INPUT_KEYBOARD;
2394}
2395
2396static void virtio_input_hid_mouse_pci_class_init(ObjectClass *klass,
2397 void *data)
2398{
2399 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2400
2401 pcidev_k->class_id = PCI_CLASS_INPUT_MOUSE;
2402}
2403
2404static void virtio_keyboard_initfn(Object *obj)
2405{
2406 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
6f2b9a5b
GH		 2407
2408 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2409 TYPE_VIRTIO_KEYBOARD);
710e2d90
GH		 2410}
2411
2412static void virtio_mouse_initfn(Object *obj)
2413{
2414 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
6f2b9a5b
GH		 2415
2416 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2417 TYPE_VIRTIO_MOUSE);
710e2d90
GH		 2418}
2419
2420static void virtio_tablet_initfn(Object *obj)
2421{
2422 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
6f2b9a5b
GH		 2423
2424 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2425 TYPE_VIRTIO_TABLET);
710e2d90
GH		 2426}
2427
f958c8aa
GH		 2428static const TypeInfo virtio_input_pci_info = {
2429 .name = TYPE_VIRTIO_INPUT_PCI,
2430 .parent = TYPE_VIRTIO_PCI,
2431 .instance_size = sizeof(VirtIOInputPCI),
2432 .class_init = virtio_input_pci_class_init,
2433 .abstract = true,
2434};
2435
710e2d90
GH		 2436static const TypeInfo virtio_input_hid_pci_info = {
2437 .name = TYPE_VIRTIO_INPUT_HID_PCI,
2438 .parent = TYPE_VIRTIO_INPUT_PCI,
2439 .instance_size = sizeof(VirtIOInputHIDPCI),
710e2d90
GH		 2440 .abstract = true,
2441};
2442
2443static const TypeInfo virtio_keyboard_pci_info = {
2444 .name = TYPE_VIRTIO_KEYBOARD_PCI,
2445 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2446 .class_init = virtio_input_hid_kbd_pci_class_init,
2447 .instance_size = sizeof(VirtIOInputHIDPCI),
2448 .instance_init = virtio_keyboard_initfn,
2449};
2450
2451static const TypeInfo virtio_mouse_pci_info = {
2452 .name = TYPE_VIRTIO_MOUSE_PCI,
2453 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2454 .class_init = virtio_input_hid_mouse_pci_class_init,
2455 .instance_size = sizeof(VirtIOInputHIDPCI),
2456 .instance_init = virtio_mouse_initfn,
2457};
2458
2459static const TypeInfo virtio_tablet_pci_info = {
2460 .name = TYPE_VIRTIO_TABLET_PCI,
2461 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2462 .instance_size = sizeof(VirtIOInputHIDPCI),
2463 .instance_init = virtio_tablet_initfn,
2464};
2465
c6047e96
MA		 2466#ifdef CONFIG_LINUX
2467static void virtio_host_initfn(Object *obj)
2468{
2469 VirtIOInputHostPCI *dev = VIRTIO_INPUT_HOST_PCI(obj);
2470
2471 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2472 TYPE_VIRTIO_INPUT_HOST);
2473}
2474
006a5ede
GH		 2475static const TypeInfo virtio_host_pci_info = {
2476 .name = TYPE_VIRTIO_INPUT_HOST_PCI,
2477 .parent = TYPE_VIRTIO_INPUT_PCI,
2478 .instance_size = sizeof(VirtIOInputHostPCI),
2479 .instance_init = virtio_host_initfn,
2480};
c6047e96 2481#endif
006a5ede 2482
0a2acf5e
FK		 2483/* virtio-pci-bus */
2484
ac7af112
AF		 2485static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
2486 VirtIOPCIProxy *dev)
0a2acf5e
FK		 2487{
2488 DeviceState *qdev = DEVICE(dev);
f4dd69aa
FK		 2489 char virtio_bus_name[] = "virtio-bus";
2490
fb17dfe0 2491 qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev,
f4dd69aa 2492 virtio_bus_name);
0a2acf5e
FK		 2493}
2494
2495static void virtio_pci_bus_class_init(ObjectClass *klass, void *data)
2496{
2497 BusClass *bus_class = BUS_CLASS(klass);
2498 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass);
2499 bus_class->max_dev = 1;
2500 k->notify = virtio_pci_notify;
2501 k->save_config = virtio_pci_save_config;
2502 k->load_config = virtio_pci_load_config;
2503 k->save_queue = virtio_pci_save_queue;
2504 k->load_queue = virtio_pci_load_queue;
a6df8adf
JW		 2505 k->save_extra_state = virtio_pci_save_extra_state;
2506 k->load_extra_state = virtio_pci_load_extra_state;
2507 k->has_extra_state = virtio_pci_has_extra_state;
0a2acf5e 2508 k->query_guest_notifiers = virtio_pci_query_guest_notifiers;
0a2acf5e
FK		 2509 k->set_guest_notifiers = virtio_pci_set_guest_notifiers;
2510 k->vmstate_change = virtio_pci_vmstate_change;
085bccb7 2511 k->device_plugged = virtio_pci_device_plugged;
06a13073 2512 k->device_unplugged = virtio_pci_device_unplugged;
e0d686bf 2513 k->query_nvectors = virtio_pci_query_nvectors;
9f06e71a
CH		 2514 k->ioeventfd_started = virtio_pci_ioeventfd_started;
2515 k->ioeventfd_set_started = virtio_pci_ioeventfd_set_started;
2516 k->ioeventfd_disabled = virtio_pci_ioeventfd_disabled;
2517 k->ioeventfd_set_disabled = virtio_pci_ioeventfd_set_disabled;
2518 k->ioeventfd_assign = virtio_pci_ioeventfd_assign;
0a2acf5e
FK		 2519}
2520
2521static const TypeInfo virtio_pci_bus_info = {
2522 .name = TYPE_VIRTIO_PCI_BUS,
2523 .parent = TYPE_VIRTIO_BUS,
2524 .instance_size = sizeof(VirtioPCIBusState),
2525 .class_init = virtio_pci_bus_class_init,
2526};
2527
83f7d43a 2528static void virtio_pci_register_types(void)
53c25cea 2529{
59ccd20a 2530 type_register_static(&virtio_rng_pci_info);
f958c8aa 2531 type_register_static(&virtio_input_pci_info);
710e2d90
GH		 2532 type_register_static(&virtio_input_hid_pci_info);
2533 type_register_static(&virtio_keyboard_pci_info);
2534 type_register_static(&virtio_mouse_pci_info);
2535 type_register_static(&virtio_tablet_pci_info);
c6047e96 2536#ifdef CONFIG_LINUX
006a5ede 2537 type_register_static(&virtio_host_pci_info);
c6047e96 2538#endif
0a2acf5e 2539 type_register_static(&virtio_pci_bus_info);
085bccb7 2540 type_register_static(&virtio_pci_info);
60653b28 2541#ifdef CONFIG_VIRTFS
234a336f 2542 type_register_static(&virtio_9p_pci_info);
60653b28 2543#endif
653ced07 2544 type_register_static(&virtio_blk_pci_info);
bc7b90a0 2545 type_register_static(&virtio_scsi_pci_info);
e378e88d 2546 type_register_static(&virtio_balloon_pci_info);
f7f7464a 2547 type_register_static(&virtio_serial_pci_info);
e37da394 2548 type_register_static(&virtio_net_pci_info);
50787628
NB		 2549#ifdef CONFIG_VHOST_SCSI
2550 type_register_static(&vhost_scsi_pci_info);
2551#endif
fc0b9b0e
SH		 2552#ifdef CONFIG_VHOST_VSOCK
2553 type_register_static(&vhost_vsock_pci_info);
2554#endif
53c25cea
PB		 2555}
2556
83f7d43a 2557type_init(virtio_pci_register_types)
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