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Revert "virtio: unbreak virtio-pci with IOMMU after caching ring translations"
[mirror_qemu.git] / hw / virtio / virtio-pci.c
CommitLineData
53c25cea
PB		 1/*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
6b620ca3
PB		 14 * Contributions after 2012-01-13 are licensed under the terms of the
15 * GNU GPL, version 2 or (at your option) any later version.
53c25cea
PB		 16 */
17
9b8bfe21 18#include "qemu/osdep.h"
53c25cea 19
cbbe4f50 20#include "standard-headers/linux/virtio_pci.h"
0d09e41a
PB		 21#include "hw/virtio/virtio.h"
22#include "hw/virtio/virtio-blk.h"
23#include "hw/virtio/virtio-net.h"
24#include "hw/virtio/virtio-serial.h"
25#include "hw/virtio/virtio-scsi.h"
26#include "hw/virtio/virtio-balloon.h"
f958c8aa 27#include "hw/virtio/virtio-input.h"
83c9f4ca 28#include "hw/pci/pci.h"
da34e65c 29#include "qapi/error.h"
1de7afc9 30#include "qemu/error-report.h"
83c9f4ca
PB		 31#include "hw/pci/msi.h"
32#include "hw/pci/msix.h"
33#include "hw/loader.h"
9c17d615 34#include "sysemu/kvm.h"
4be74634 35#include "sysemu/block-backend.h"
47b43a1f 36#include "virtio-pci.h"
1de7afc9 37#include "qemu/range.h"
0d09e41a 38#include "hw/virtio/virtio-bus.h"
24a6e7f4 39#include "qapi/visitor.h"
53c25cea 40
cbbe4f50 41#define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev))
aba800a3 42
c17bef33
MT		 43#undef VIRTIO_PCI_CONFIG
44
aba800a3
MT		 45/* The remaining space is defined by each driver as the per-driver
46 * configuration space */
cbbe4f50 47#define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev))
53c25cea 48
ac7af112
AF		 49static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
50 VirtIOPCIProxy *dev);
75fd6f13 51static void virtio_pci_reset(DeviceState *qdev);
d51fcfac 52
53c25cea 53/* virtio device */
d2a0ccc6
MT		 54/* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */
55static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d)
56{
57 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
58}
53c25cea 59
d2a0ccc6
MT		 60/* DeviceState to VirtIOPCIProxy. Note: used on datapath,
61 * be careful and test performance if you change this.
62 */
63static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d)
53c25cea 64{
d2a0ccc6
MT		 65 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
66}
67
68static void virtio_pci_notify(DeviceState *d, uint16_t vector)
69{
70 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d);
a3fc66d9 71
aba800a3
MT		 72 if (msix_enabled(&proxy->pci_dev))
73 msix_notify(&proxy->pci_dev, vector);
a3fc66d9
PB		 74 else {
75 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
0687c37c 76 pci_set_irq(&proxy->pci_dev, atomic_read(&vdev->isr) & 1);
a3fc66d9 77 }
53c25cea
PB		 78}
79
d2a0ccc6 80static void virtio_pci_save_config(DeviceState *d, QEMUFile *f)
ff24bd58 81{
d2a0ccc6 82 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 83 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
84
ff24bd58
MT		 85 pci_device_save(&proxy->pci_dev, f);
86 msix_save(&proxy->pci_dev, f);
87 if (msix_present(&proxy->pci_dev))
a3fc66d9 88 qemu_put_be16(f, vdev->config_vector);
ff24bd58
MT		 89}
90
a6df8adf
JW		 91static void virtio_pci_load_modern_queue_state(VirtIOPCIQueue *vq,
92 QEMUFile *f)
93{
94 vq->num = qemu_get_be16(f);
95 vq->enabled = qemu_get_be16(f);
96 vq->desc[0] = qemu_get_be32(f);
97 vq->desc[1] = qemu_get_be32(f);
98 vq->avail[0] = qemu_get_be32(f);
99 vq->avail[1] = qemu_get_be32(f);
100 vq->used[0] = qemu_get_be32(f);
101 vq->used[1] = qemu_get_be32(f);
102}
103
104static bool virtio_pci_has_extra_state(DeviceState *d)
105{
106 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
107
108 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA;
109}
110
2c21ee76
JD		 111static int get_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size,
112 VMStateField *field)
a6df8adf
JW		 113{
114 VirtIOPCIProxy *proxy = pv;
115 int i;
116
117 proxy->dfselect = qemu_get_be32(f);
118 proxy->gfselect = qemu_get_be32(f);
119 proxy->guest_features[0] = qemu_get_be32(f);
120 proxy->guest_features[1] = qemu_get_be32(f);
121 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
122 virtio_pci_load_modern_queue_state(&proxy->vqs[i], f);
123 }
124
125 return 0;
126}
127
128static void virtio_pci_save_modern_queue_state(VirtIOPCIQueue *vq,
129 QEMUFile *f)
130{
131 qemu_put_be16(f, vq->num);
132 qemu_put_be16(f, vq->enabled);
133 qemu_put_be32(f, vq->desc[0]);
134 qemu_put_be32(f, vq->desc[1]);
135 qemu_put_be32(f, vq->avail[0]);
136 qemu_put_be32(f, vq->avail[1]);
137 qemu_put_be32(f, vq->used[0]);
138 qemu_put_be32(f, vq->used[1]);
139}
140
2c21ee76
JD		 141static int put_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size,
142 VMStateField *field, QJSON *vmdesc)
a6df8adf
JW		 143{
144 VirtIOPCIProxy *proxy = pv;
145 int i;
146
147 qemu_put_be32(f, proxy->dfselect);
148 qemu_put_be32(f, proxy->gfselect);
149 qemu_put_be32(f, proxy->guest_features[0]);
150 qemu_put_be32(f, proxy->guest_features[1]);
151 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
152 virtio_pci_save_modern_queue_state(&proxy->vqs[i], f);
153 }
2c21ee76
JD		 154
155 return 0;
a6df8adf
JW		 156}
157
158static const VMStateInfo vmstate_info_virtio_pci_modern_state = {
159 .name = "virtqueue_state",
160 .get = get_virtio_pci_modern_state,
161 .put = put_virtio_pci_modern_state,
162};
163
164static bool virtio_pci_modern_state_needed(void *opaque)
165{
166 VirtIOPCIProxy *proxy = opaque;
167
9a4c0e22 168 return virtio_pci_modern(proxy);
a6df8adf
JW		 169}
170
171static const VMStateDescription vmstate_virtio_pci_modern_state = {
172 .name = "virtio_pci/modern_state",
173 .version_id = 1,
174 .minimum_version_id = 1,
175 .needed = &virtio_pci_modern_state_needed,
176 .fields = (VMStateField[]) {
177 {
178 .name = "modern_state",
179 .version_id = 0,
180 .field_exists = NULL,
181 .size = 0,
182 .info = &vmstate_info_virtio_pci_modern_state,
183 .flags = VMS_SINGLE,
184 .offset = 0,
185 },
186 VMSTATE_END_OF_LIST()
187 }
188};
189
190static const VMStateDescription vmstate_virtio_pci = {
191 .name = "virtio_pci",
192 .version_id = 1,
193 .minimum_version_id = 1,
194 .minimum_version_id_old = 1,
195 .fields = (VMStateField[]) {
196 VMSTATE_END_OF_LIST()
197 },
198 .subsections = (const VMStateDescription*[]) {
199 &vmstate_virtio_pci_modern_state,
200 NULL
201 }
202};
203
204static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f)
205{
206 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
207
208 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL);
209}
210
211static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f)
212{
213 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
214
215 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1);
216}
217
d2a0ccc6 218static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f)
ff24bd58 219{
d2a0ccc6 220 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 221 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
222
ff24bd58 223 if (msix_present(&proxy->pci_dev))
a3fc66d9 224 qemu_put_be16(f, virtio_queue_vector(vdev, n));
ff24bd58
MT		 225}
226
d2a0ccc6 227static int virtio_pci_load_config(DeviceState *d, QEMUFile *f)
ff24bd58 228{
d2a0ccc6 229 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 230 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
231
ff24bd58
MT		 232 int ret;
233 ret = pci_device_load(&proxy->pci_dev, f);
e6da7680 234 if (ret) {
ff24bd58 235 return ret;
e6da7680 236 }
3cac001e 237 msix_unuse_all_vectors(&proxy->pci_dev);
ff24bd58 238 msix_load(&proxy->pci_dev, f);
e6da7680 239 if (msix_present(&proxy->pci_dev)) {
a3fc66d9 240 qemu_get_be16s(f, &vdev->config_vector);
e6da7680 241 } else {
a3fc66d9 242 vdev->config_vector = VIRTIO_NO_VECTOR;
e6da7680 243 }
a3fc66d9
PB		 244 if (vdev->config_vector != VIRTIO_NO_VECTOR) {
245 return msix_vector_use(&proxy->pci_dev, vdev->config_vector);
e6da7680 246 }
ff24bd58
MT		 247 return 0;
248}
249
d2a0ccc6 250static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f)
ff24bd58 251{
d2a0ccc6 252 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 253 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
254
ff24bd58 255 uint16_t vector;
e6da7680
MT		 256 if (msix_present(&proxy->pci_dev)) {
257 qemu_get_be16s(f, &vector);
258 } else {
259 vector = VIRTIO_NO_VECTOR;
260 }
a3fc66d9 261 virtio_queue_set_vector(vdev, n, vector);
e6da7680
MT		 262 if (vector != VIRTIO_NO_VECTOR) {
263 return msix_vector_use(&proxy->pci_dev, vector);
264 }
a6df8adf 265
ff24bd58
MT		 266 return 0;
267}
268
8e93cef1 269static bool virtio_pci_ioeventfd_enabled(DeviceState *d)
9f06e71a
CH		 270{
271 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
272
8e93cef1 273 return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0;
9f06e71a
CH		 274}
275
975acc0a
JW		 276#define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000
277
d9997d89
MA		 278static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy)
279{
280 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ?
281 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4;
282}
283
9f06e71a
CH		 284static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier,
285 int n, bool assign)
25db9ebe 286{
9f06e71a 287 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 288 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
289 VirtQueue *vq = virtio_get_queue(vdev, n);
9a4c0e22
MA		 290 bool legacy = virtio_pci_legacy(proxy);
291 bool modern = virtio_pci_modern(proxy);
bc85ccfd 292 bool fast_mmio = kvm_ioeventfd_any_length_enabled();
9824d2a3 293 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
588255ad 294 MemoryRegion *modern_mr = &proxy->notify.mr;
9824d2a3 295 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr;
975acc0a 296 MemoryRegion *legacy_mr = &proxy->bar;
d9997d89 297 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) *
975acc0a
JW		 298 virtio_get_queue_index(vq);
299 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY;
da146d0a 300
25db9ebe 301 if (assign) {
975acc0a 302 if (modern) {
bc85ccfd
JW		 303 if (fast_mmio) {
304 memory_region_add_eventfd(modern_mr, modern_addr, 0,
305 false, n, notifier);
306 } else {
307 memory_region_add_eventfd(modern_mr, modern_addr, 2,
308 false, n, notifier);
309 }
9824d2a3
JW		 310 if (modern_pio) {
311 memory_region_add_eventfd(modern_notify_mr, 0, 2,
312 true, n, notifier);
313 }
975acc0a
JW		 314 }
315 if (legacy) {
316 memory_region_add_eventfd(legacy_mr, legacy_addr, 2,
317 true, n, notifier);
318 }
25db9ebe 319 } else {
975acc0a 320 if (modern) {
bc85ccfd
JW		 321 if (fast_mmio) {
322 memory_region_del_eventfd(modern_mr, modern_addr, 0,
323 false, n, notifier);
324 } else {
325 memory_region_del_eventfd(modern_mr, modern_addr, 2,
326 false, n, notifier);
327 }
9824d2a3
JW		 328 if (modern_pio) {
329 memory_region_del_eventfd(modern_notify_mr, 0, 2,
330 true, n, notifier);
331 }
975acc0a
JW		 332 }
333 if (legacy) {
334 memory_region_del_eventfd(legacy_mr, legacy_addr, 2,
335 true, n, notifier);
336 }
25db9ebe 337 }
9f06e71a 338 return 0;
25db9ebe
SH		 339}
340
b36e3914 341static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy)
25db9ebe 342{
9f06e71a 343 virtio_bus_start_ioeventfd(&proxy->bus);
25db9ebe
SH		 344}
345
b36e3914 346static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy)
25db9ebe 347{
9f06e71a 348 virtio_bus_stop_ioeventfd(&proxy->bus);
25db9ebe
SH		 349}
350
53c25cea
PB		 351static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
352{
353 VirtIOPCIProxy *proxy = opaque;
a3fc66d9 354 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
a8170e5e 355 hwaddr pa;
53c25cea 356
53c25cea
PB		 357 switch (addr) {
358 case VIRTIO_PCI_GUEST_FEATURES:
181103cd
FK		 359 /* Guest does not negotiate properly? We have to assume nothing. */
360 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
361 val = virtio_bus_get_vdev_bad_features(&proxy->bus);
362 }
ad0c9332 363 virtio_set_features(vdev, val);
53c25cea
PB		 364 break;
365 case VIRTIO_PCI_QUEUE_PFN:
a8170e5e 366 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
1b8e9b27 367 if (pa == 0) {
75fd6f13 368 virtio_pci_reset(DEVICE(proxy));
1b8e9b27 369 }
7055e687
MT		 370 else
371 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
53c25cea
PB		 372 break;
373 case VIRTIO_PCI_QUEUE_SEL:
87b3bd1c 374 if (val < VIRTIO_QUEUE_MAX)
53c25cea
PB		 375 vdev->queue_sel = val;
376 break;
377 case VIRTIO_PCI_QUEUE_NOTIFY:
87b3bd1c 378 if (val < VIRTIO_QUEUE_MAX) {
7157e2e2
SH		 379 virtio_queue_notify(vdev, val);
380 }
53c25cea
PB		 381 break;
382 case VIRTIO_PCI_STATUS:
25db9ebe
SH		 383 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
384 virtio_pci_stop_ioeventfd(proxy);
385 }
386
3e607cb5 387 virtio_set_status(vdev, val & 0xFF);
25db9ebe
SH		 388
389 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
390 virtio_pci_start_ioeventfd(proxy);
391 }
392
1b8e9b27 393 if (vdev->status == 0) {
75fd6f13 394 virtio_pci_reset(DEVICE(proxy));
1b8e9b27 395 }
c81131db 396
e43c0b2e
MT		 397 /* Linux before 2.6.34 drives the device without enabling
398 the PCI device bus master bit. Enable it automatically
399 for the guest. This is a PCI spec violation but so is
400 initiating DMA with bus master bit clear. */
401 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) {
402 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
403 proxy->pci_dev.config[PCI_COMMAND] |
404 PCI_COMMAND_MASTER, 1);
405 }
53c25cea 406 break;
aba800a3
MT		 407 case VIRTIO_MSI_CONFIG_VECTOR:
408 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
409 /* Make it possible for guest to discover an error took place. */
410 if (msix_vector_use(&proxy->pci_dev, val) < 0)
411 val = VIRTIO_NO_VECTOR;
412 vdev->config_vector = val;
413 break;
414 case VIRTIO_MSI_QUEUE_VECTOR:
415 msix_vector_unuse(&proxy->pci_dev,
416 virtio_queue_vector(vdev, vdev->queue_sel));
417 /* Make it possible for guest to discover an error took place. */
418 if (msix_vector_use(&proxy->pci_dev, val) < 0)
419 val = VIRTIO_NO_VECTOR;
420 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
421 break;
422 default:
4e02d460
SH		 423 error_report("%s: unexpected address 0x%x value 0x%x",
424 __func__, addr, val);
aba800a3 425 break;
53c25cea
PB		 426 }
427}
428
aba800a3 429static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
53c25cea 430{
a3fc66d9 431 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
53c25cea
PB		 432 uint32_t ret = 0xFFFFFFFF;
433
53c25cea
PB		 434 switch (addr) {
435 case VIRTIO_PCI_HOST_FEATURES:
6b8f1020 436 ret = vdev->host_features;
53c25cea
PB		 437 break;
438 case VIRTIO_PCI_GUEST_FEATURES:
704a76fc 439 ret = vdev->guest_features;
53c25cea
PB		 440 break;
441 case VIRTIO_PCI_QUEUE_PFN:
442 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
443 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
444 break;
445 case VIRTIO_PCI_QUEUE_NUM:
446 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
447 break;
448 case VIRTIO_PCI_QUEUE_SEL:
449 ret = vdev->queue_sel;
450 break;
451 case VIRTIO_PCI_STATUS:
452 ret = vdev->status;
453 break;
454 case VIRTIO_PCI_ISR:
455 /* reading from the ISR also clears it. */
0687c37c 456 ret = atomic_xchg(&vdev->isr, 0);
9e64f8a3 457 pci_irq_deassert(&proxy->pci_dev);
53c25cea 458 break;
aba800a3
MT		 459 case VIRTIO_MSI_CONFIG_VECTOR:
460 ret = vdev->config_vector;
461 break;
462 case VIRTIO_MSI_QUEUE_VECTOR:
463 ret = virtio_queue_vector(vdev, vdev->queue_sel);
464 break;
53c25cea
PB		 465 default:
466 break;
467 }
468
469 return ret;
470}
471
df6db5b3
AG		 472static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr,
473 unsigned size)
53c25cea
PB		 474{
475 VirtIOPCIProxy *proxy = opaque;
a3fc66d9 476 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
cbbe4f50 477 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
df6db5b3 478 uint64_t val = 0;
aba800a3 479 if (addr < config) {
df6db5b3 480 return virtio_ioport_read(proxy, addr);
aba800a3
MT		 481 }
482 addr -= config;
53c25cea 483
df6db5b3
AG		 484 switch (size) {
485 case 1:
a3fc66d9 486 val = virtio_config_readb(vdev, addr);
df6db5b3
AG		 487 break;
488 case 2:
a3fc66d9 489 val = virtio_config_readw(vdev, addr);
616a6552 490 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 491 val = bswap16(val);
492 }
df6db5b3
AG		 493 break;
494 case 4:
a3fc66d9 495 val = virtio_config_readl(vdev, addr);
616a6552 496 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 497 val = bswap32(val);
498 }
df6db5b3 499 break;
82afa586 500 }
df6db5b3 501 return val;
53c25cea
PB		 502}
503
df6db5b3
AG		 504static void virtio_pci_config_write(void *opaque, hwaddr addr,
505 uint64_t val, unsigned size)
53c25cea
PB		 506{
507 VirtIOPCIProxy *proxy = opaque;
cbbe4f50 508 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
a3fc66d9 509 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
aba800a3
MT		 510 if (addr < config) {
511 virtio_ioport_write(proxy, addr, val);
512 return;
513 }
514 addr -= config;
df6db5b3
AG		 515 /*
516 * Virtio-PCI is odd. Ioports are LE but config space is target native
517 * endian.
518 */
519 switch (size) {
520 case 1:
a3fc66d9 521 virtio_config_writeb(vdev, addr, val);
df6db5b3
AG		 522 break;
523 case 2:
616a6552 524 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 525 val = bswap16(val);
526 }
a3fc66d9 527 virtio_config_writew(vdev, addr, val);
df6db5b3
AG		 528 break;
529 case 4:
616a6552 530 if (virtio_is_big_endian(vdev)) {
8e4a424b
BS		 531 val = bswap32(val);
532 }
a3fc66d9 533 virtio_config_writel(vdev, addr, val);
df6db5b3 534 break;
82afa586 535 }
53c25cea
PB		 536}
537
da146d0a 538static const MemoryRegionOps virtio_pci_config_ops = {
df6db5b3
AG		 539 .read = virtio_pci_config_read,
540 .write = virtio_pci_config_write,
541 .impl = {
542 .min_access_size = 1,
543 .max_access_size = 4,
544 },
8e4a424b 545 .endianness = DEVICE_LITTLE_ENDIAN,
da146d0a 546};
aba800a3 547
1e40356c
MT		 548/* Below are generic functions to do memcpy from/to an address space,
549 * without byteswaps, with input validation.
550 *
551 * As regular address_space_* APIs all do some kind of byteswap at least for
552 * some host/target combinations, we are forced to explicitly convert to a
553 * known-endianness integer value.
554 * It doesn't really matter which endian format to go through, so the code
555 * below selects the endian that causes the least amount of work on the given
556 * host.
557 *
558 * Note: host pointer must be aligned.
559 */
560static
561void virtio_address_space_write(AddressSpace *as, hwaddr addr,
562 const uint8_t *buf, int len)
563{
564 uint32_t val;
565
566 /* address_space_* APIs assume an aligned address.
567 * As address is under guest control, handle illegal values.
568 */
569 addr &= ~(len - 1);
570
571 /* Make sure caller aligned buf properly */
572 assert(!(((uintptr_t)buf) & (len - 1)));
573
574 switch (len) {
575 case 1:
576 val = pci_get_byte(buf);
577 address_space_stb(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
578 break;
579 case 2:
580 val = pci_get_word(buf);
581 address_space_stw_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
582 break;
583 case 4:
584 val = pci_get_long(buf);
585 address_space_stl_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
586 break;
587 default:
588 /* As length is under guest control, handle illegal values. */
589 break;
590 }
591}
592
593static void
594virtio_address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len)
595{
596 uint32_t val;
597
598 /* address_space_* APIs assume an aligned address.
599 * As address is under guest control, handle illegal values.
600 */
601 addr &= ~(len - 1);
602
603 /* Make sure caller aligned buf properly */
604 assert(!(((uintptr_t)buf) & (len - 1)));
605
606 switch (len) {
607 case 1:
608 val = address_space_ldub(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
609 pci_set_byte(buf, val);
610 break;
611 case 2:
612 val = address_space_lduw_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
613 pci_set_word(buf, val);
614 break;
615 case 4:
616 val = address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
617 pci_set_long(buf, val);
618 break;
619 default:
620 /* As length is under guest control, handle illegal values. */
621 break;
622 }
623}
624
aba800a3
MT		 625static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
626 uint32_t val, int len)
627{
ed757e14 628 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
a3fc66d9 629 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
ada434cd 630 struct virtio_pci_cfg_cap *cfg;
ed757e14 631
1129714f
MT		 632 pci_default_write_config(pci_dev, address, val, len);
633
634 if (range_covers_byte(address, len, PCI_COMMAND) &&
68a27b20 635 !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
1129714f 636 virtio_pci_stop_ioeventfd(proxy);
45363e46 637 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
ed757e14 638 }
ada434cd
MT		 639
640 if (proxy->config_cap &&
641 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
642 pci_cfg_data),
643 sizeof cfg->pci_cfg_data)) {
644 uint32_t off;
645 uint32_t len;
646
647 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
648 off = le32_to_cpu(cfg->cap.offset);
649 len = le32_to_cpu(cfg->cap.length);
650
2a639123
MT		 651 if (len == 1 || len == 2 || len == 4) {
652 assert(len <= sizeof cfg->pci_cfg_data);
1e40356c
MT		 653 virtio_address_space_write(&proxy->modern_as, off,
654 cfg->pci_cfg_data, len);
ada434cd
MT		 655 }
656 }
657}
658
659static uint32_t virtio_read_config(PCIDevice *pci_dev,
660 uint32_t address, int len)
661{
662 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
663 struct virtio_pci_cfg_cap *cfg;
664
665 if (proxy->config_cap &&
666 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
667 pci_cfg_data),
668 sizeof cfg->pci_cfg_data)) {
669 uint32_t off;
670 uint32_t len;
671
672 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
673 off = le32_to_cpu(cfg->cap.offset);
674 len = le32_to_cpu(cfg->cap.length);
675
2a639123
MT		 676 if (len == 1 || len == 2 || len == 4) {
677 assert(len <= sizeof cfg->pci_cfg_data);
1e40356c
MT		 678 virtio_address_space_read(&proxy->modern_as, off,
679 cfg->pci_cfg_data, len);
ada434cd
MT		 680 }
681 }
682
683 return pci_default_read_config(pci_dev, address, len);
53c25cea
PB		 684}
685
7d37d351
JK		 686static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy,
687 unsigned int queue_no,
d1f6af6a 688 unsigned int vector)
7d37d351 689{
7d37d351 690 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
15b2bd18 691 int ret;
7d37d351
JK		 692
693 if (irqfd->users == 0) {
d1f6af6a 694 ret = kvm_irqchip_add_msi_route(kvm_state, vector, &proxy->pci_dev);
7d37d351
JK		 695 if (ret < 0) {
696 return ret;
697 }
698 irqfd->virq = ret;
699 }
700 irqfd->users++;
7d37d351
JK		 701 return 0;
702}
703
704static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy,
7d37d351 705 unsigned int vector)
774345f9
MT		 706{
707 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
708 if (--irqfd->users == 0) {
709 kvm_irqchip_release_virq(kvm_state, irqfd->virq);
710 }
711}
712
f1d0f15a
MT		 713static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy,
714 unsigned int queue_no,
715 unsigned int vector)
716{
717 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
a3fc66d9
PB		 718 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
719 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
f1d0f15a 720 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
9be38598 721 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq);
f1d0f15a
MT		 722}
723
724static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy,
725 unsigned int queue_no,
726 unsigned int vector)
7d37d351 727{
a3fc66d9
PB		 728 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
729 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
15b2bd18 730 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
7d37d351 731 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
15b2bd18 732 int ret;
7d37d351 733
1c9b71a7 734 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq);
7d37d351 735 assert(ret == 0);
f1d0f15a 736}
7d37d351 737
774345f9
MT		 738static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs)
739{
740 PCIDevice *dev = &proxy->pci_dev;
a3fc66d9 741 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
181103cd 742 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
774345f9
MT		 743 unsigned int vector;
744 int ret, queue_no;
774345f9
MT		 745
746 for (queue_no = 0; queue_no < nvqs; queue_no++) {
747 if (!virtio_queue_get_num(vdev, queue_no)) {
748 break;
749 }
750 vector = virtio_queue_vector(vdev, queue_no);
751 if (vector >= msix_nr_vectors_allocated(dev)) {
752 continue;
753 }
d1f6af6a 754 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector);
774345f9
MT		 755 if (ret < 0) {
756 goto undo;
7d37d351 757 }
f1d0f15a
MT		 758 /* If guest supports masking, set up irqfd now.
759 * Otherwise, delay until unmasked in the frontend.
760 */
5669655a 761 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
f1d0f15a
MT		 762 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
763 if (ret < 0) {
764 kvm_virtio_pci_vq_vector_release(proxy, vector);
765 goto undo;
766 }
767 }
7d37d351 768 }
7d37d351 769 return 0;
774345f9
MT		 770
771undo:
772 while (--queue_no >= 0) {
773 vector = virtio_queue_vector(vdev, queue_no);
774 if (vector >= msix_nr_vectors_allocated(dev)) {
775 continue;
776 }
5669655a 777 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
e387f99e 778 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 779 }
774345f9
MT		 780 kvm_virtio_pci_vq_vector_release(proxy, vector);
781 }
782 return ret;
7d37d351
JK		 783}
784
774345f9
MT		 785static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs)
786{
787 PCIDevice *dev = &proxy->pci_dev;
a3fc66d9 788 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
774345f9
MT		 789 unsigned int vector;
790 int queue_no;
181103cd 791 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
774345f9
MT		 792
793 for (queue_no = 0; queue_no < nvqs; queue_no++) {
794 if (!virtio_queue_get_num(vdev, queue_no)) {
795 break;
796 }
797 vector = virtio_queue_vector(vdev, queue_no);
798 if (vector >= msix_nr_vectors_allocated(dev)) {
799 continue;
800 }
f1d0f15a
MT		 801 /* If guest supports masking, clean up irqfd now.
802 * Otherwise, it was cleaned when masked in the frontend.
803 */
5669655a 804 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
e387f99e 805 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 806 }
774345f9
MT		 807 kvm_virtio_pci_vq_vector_release(proxy, vector);
808 }
809}
810
a38b2c49
MT		 811static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy,
812 unsigned int queue_no,
813 unsigned int vector,
814 MSIMessage msg)
774345f9 815{
a3fc66d9
PB		 816 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
817 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
818 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
774345f9 819 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
a38b2c49 820 VirtIOIRQFD *irqfd;
53510bfc 821 int ret = 0;
774345f9 822
a38b2c49
MT		 823 if (proxy->vector_irqfd) {
824 irqfd = &proxy->vector_irqfd[vector];
825 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) {
dc9f06ca
PF		 826 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg,
827 &proxy->pci_dev);
a38b2c49
MT		 828 if (ret < 0) {
829 return ret;
830 }
3f1fea0f 831 kvm_irqchip_commit_routes(kvm_state);
774345f9
MT		 832 }
833 }
834
f1d0f15a
MT		 835 /* If guest supports masking, irqfd is already setup, unmask it.
836 * Otherwise, set it up now.
837 */
5669655a 838 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
a3fc66d9 839 k->guest_notifier_mask(vdev, queue_no, false);
f1d0f15a 840 /* Test after unmasking to avoid losing events. */
181103cd 841 if (k->guest_notifier_pending &&
a3fc66d9 842 k->guest_notifier_pending(vdev, queue_no)) {
f1d0f15a
MT		 843 event_notifier_set(n);
844 }
845 } else {
846 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
7d37d351 847 }
774345f9 848 return ret;
7d37d351
JK		 849}
850
a38b2c49 851static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy,
7d37d351
JK		 852 unsigned int queue_no,
853 unsigned int vector)
854{
a3fc66d9
PB		 855 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
856 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
181103cd 857
f1d0f15a
MT		 858 /* If guest supports masking, keep irqfd but mask it.
859 * Otherwise, clean it up now.
860 */
5669655a 861 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
a3fc66d9 862 k->guest_notifier_mask(vdev, queue_no, true);
f1d0f15a 863 } else {
e387f99e 864 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
f1d0f15a 865 }
7d37d351
JK		 866}
867
a38b2c49
MT		 868static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector,
869 MSIMessage msg)
7d37d351
JK		 870{
871 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
a3fc66d9 872 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
851c2a75
JW		 873 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
874 int ret, index, unmasked = 0;
7d37d351 875
851c2a75
JW		 876 while (vq) {
877 index = virtio_get_queue_index(vq);
878 if (!virtio_queue_get_num(vdev, index)) {
7d37d351
JK		 879 break;
880 }
6652d081
JW		 881 if (index < proxy->nvqs_with_notifiers) {
882 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg);
883 if (ret < 0) {
884 goto undo;
885 }
886 ++unmasked;
7d37d351 887 }
851c2a75 888 vq = virtio_vector_next_queue(vq);
7d37d351 889 }
851c2a75 890
7d37d351
JK		 891 return 0;
892
893undo:
851c2a75 894 vq = virtio_vector_first_queue(vdev, vector);
6652d081 895 while (vq && unmasked >= 0) {
851c2a75 896 index = virtio_get_queue_index(vq);
6652d081
JW		 897 if (index < proxy->nvqs_with_notifiers) {
898 virtio_pci_vq_vector_mask(proxy, index, vector);
899 --unmasked;
900 }
851c2a75 901 vq = virtio_vector_next_queue(vq);
7d37d351
JK		 902 }
903 return ret;
904}
905
a38b2c49 906static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector)
7d37d351
JK		 907{
908 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
a3fc66d9 909 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
851c2a75
JW		 910 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
911 int index;
7d37d351 912
851c2a75
JW		 913 while (vq) {
914 index = virtio_get_queue_index(vq);
915 if (!virtio_queue_get_num(vdev, index)) {
7d37d351
JK		 916 break;
917 }
6652d081
JW		 918 if (index < proxy->nvqs_with_notifiers) {
919 virtio_pci_vq_vector_mask(proxy, index, vector);
920 }
851c2a75 921 vq = virtio_vector_next_queue(vq);
7d37d351
JK		 922 }
923}
924
a38b2c49
MT		 925static void virtio_pci_vector_poll(PCIDevice *dev,
926 unsigned int vector_start,
927 unsigned int vector_end)
89d62be9
MT		 928{
929 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
a3fc66d9 930 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
181103cd 931 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
89d62be9
MT		 932 int queue_no;
933 unsigned int vector;
934 EventNotifier *notifier;
935 VirtQueue *vq;
936
2d620f59 937 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
89d62be9
MT		 938 if (!virtio_queue_get_num(vdev, queue_no)) {
939 break;
940 }
941 vector = virtio_queue_vector(vdev, queue_no);
942 if (vector < vector_start || vector >= vector_end ||
943 !msix_is_masked(dev, vector)) {
944 continue;
945 }
946 vq = virtio_get_queue(vdev, queue_no);
947 notifier = virtio_queue_get_guest_notifier(vq);
181103cd
FK		 948 if (k->guest_notifier_pending) {
949 if (k->guest_notifier_pending(vdev, queue_no)) {
f1d0f15a
MT		 950 msix_set_pending(dev, vector);
951 }
952 } else if (event_notifier_test_and_clear(notifier)) {
89d62be9
MT		 953 msix_set_pending(dev, vector);
954 }
955 }
956}
957
958static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign,
959 bool with_irqfd)
ade80dc8 960{
d2a0ccc6 961 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9
PB		 962 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
963 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
964 VirtQueue *vq = virtio_get_queue(vdev, n);
ade80dc8
MT		 965 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq);
966
967 if (assign) {
968 int r = event_notifier_init(notifier, 0);
969 if (r < 0) {
970 return r;
971 }
89d62be9 972 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd);
ade80dc8 973 } else {
89d62be9 974 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd);
ade80dc8
MT		 975 event_notifier_cleanup(notifier);
976 }
977
5669655a
VK		 978 if (!msix_enabled(&proxy->pci_dev) &&
979 vdev->use_guest_notifier_mask &&
980 vdc->guest_notifier_mask) {
a3fc66d9 981 vdc->guest_notifier_mask(vdev, n, !assign);
62c96360
MT		 982 }
983
ade80dc8
MT		 984 return 0;
985}
986
d2a0ccc6 987static bool virtio_pci_query_guest_notifiers(DeviceState *d)
5430a28f 988{
d2a0ccc6 989 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
5430a28f
MT		 990 return msix_enabled(&proxy->pci_dev);
991}
992
2d620f59 993static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign)
54dd9321 994{
d2a0ccc6 995 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9 996 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
181103cd 997 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
54dd9321 998 int r, n;
89d62be9
MT		 999 bool with_irqfd = msix_enabled(&proxy->pci_dev) &&
1000 kvm_msi_via_irqfd_enabled();
54dd9321 1001
87b3bd1c 1002 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX);
2d620f59
MT		 1003
1004 /* When deassigning, pass a consistent nvqs value
1005 * to avoid leaking notifiers.
1006 */
1007 assert(assign || nvqs == proxy->nvqs_with_notifiers);
1008
1009 proxy->nvqs_with_notifiers = nvqs;
1010
7d37d351 1011 /* Must unset vector notifier while guest notifier is still assigned */
181103cd 1012 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) {
7d37d351 1013 msix_unset_vector_notifiers(&proxy->pci_dev);
a38b2c49
MT		 1014 if (proxy->vector_irqfd) {
1015 kvm_virtio_pci_vector_release(proxy, nvqs);
1016 g_free(proxy->vector_irqfd);
1017 proxy->vector_irqfd = NULL;
1018 }
7d37d351
JK		 1019 }
1020
2d620f59 1021 for (n = 0; n < nvqs; n++) {
54dd9321
MT		 1022 if (!virtio_queue_get_num(vdev, n)) {
1023 break;
1024 }
1025
23fe2b3f 1026 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd);
54dd9321
MT		 1027 if (r < 0) {
1028 goto assign_error;
1029 }
1030 }
1031
7d37d351 1032 /* Must set vector notifier after guest notifier has been assigned */
181103cd 1033 if ((with_irqfd || k->guest_notifier_mask) && assign) {
a38b2c49
MT		 1034 if (with_irqfd) {
1035 proxy->vector_irqfd =
1036 g_malloc0(sizeof(*proxy->vector_irqfd) *
1037 msix_nr_vectors_allocated(&proxy->pci_dev));
1038 r = kvm_virtio_pci_vector_use(proxy, nvqs);
1039 if (r < 0) {
1040 goto assign_error;
1041 }
774345f9 1042 }
7d37d351 1043 r = msix_set_vector_notifiers(&proxy->pci_dev,
a38b2c49
MT		 1044 virtio_pci_vector_unmask,
1045 virtio_pci_vector_mask,
1046 virtio_pci_vector_poll);
7d37d351 1047 if (r < 0) {
774345f9 1048 goto notifiers_error;
7d37d351
JK		 1049 }
1050 }
1051
54dd9321
MT		 1052 return 0;
1053
774345f9 1054notifiers_error:
a38b2c49
MT		 1055 if (with_irqfd) {
1056 assert(assign);
1057 kvm_virtio_pci_vector_release(proxy, nvqs);
1058 }
774345f9 1059
54dd9321
MT		 1060assign_error:
1061 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */
7d37d351 1062 assert(assign);
54dd9321 1063 while (--n >= 0) {
89d62be9 1064 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd);
54dd9321
MT		 1065 }
1066 return r;
1067}
1068
d2a0ccc6 1069static void virtio_pci_vmstate_change(DeviceState *d, bool running)
25db9ebe 1070{
d2a0ccc6 1071 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
a3fc66d9 1072 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
25db9ebe
SH		 1073
1074 if (running) {
68a27b20
MT		 1075 /* Old QEMU versions did not set bus master enable on status write.
1076 * Detect DRIVER set and enable it.
1077 */
1078 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) &&
1079 (vdev->status & VIRTIO_CONFIG_S_DRIVER) &&
45363e46 1080 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
68a27b20
MT		 1081 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
1082 proxy->pci_dev.config[PCI_COMMAND] |
1083 PCI_COMMAND_MASTER, 1);
89c473fd 1084 }
25db9ebe 1085 virtio_pci_start_ioeventfd(proxy);
ade80dc8 1086 } else {
25db9ebe 1087 virtio_pci_stop_ioeventfd(proxy);
ade80dc8 1088 }
ade80dc8
MT		 1089}
1090
60653b28 1091#ifdef CONFIG_VIRTFS
fc079951 1092static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
60653b28 1093{
234a336f
FK		 1094 V9fsPCIState *dev = VIRTIO_9P_PCI(vpci_dev);
1095 DeviceState *vdev = DEVICE(&dev->vdev);
60653b28 1096
234a336f 1097 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 1098 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
60653b28
PB		 1099}
1100
234a336f
FK		 1101static Property virtio_9p_pci_properties[] = {
1102 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1103 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
60653b28 1104 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
60653b28
PB		 1105 DEFINE_PROP_END_OF_LIST(),
1106};
1107
234a336f 1108static void virtio_9p_pci_class_init(ObjectClass *klass, void *data)
60653b28
PB		 1109{
1110 DeviceClass *dc = DEVICE_CLASS(klass);
234a336f
FK		 1111 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
1112 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
60653b28 1113
fc079951 1114 k->realize = virtio_9p_pci_realize;
234a336f
FK		 1115 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1116 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_9P;
1117 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
1118 pcidev_k->class_id = 0x2;
125ee0ed 1119 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
234a336f 1120 dc->props = virtio_9p_pci_properties;
60653b28
PB		 1121}
1122
234a336f
FK		 1123static void virtio_9p_pci_instance_init(Object *obj)
1124{
1125 V9fsPCIState *dev = VIRTIO_9P_PCI(obj);
c8075caf
GA		 1126
1127 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
1128 TYPE_VIRTIO_9P);
234a336f
FK		 1129}
1130
1131static const TypeInfo virtio_9p_pci_info = {
1132 .name = TYPE_VIRTIO_9P_PCI,
1133 .parent = TYPE_VIRTIO_PCI,
1134 .instance_size = sizeof(V9fsPCIState),
1135 .instance_init = virtio_9p_pci_instance_init,
1136 .class_init = virtio_9p_pci_class_init,
60653b28 1137};
234a336f 1138#endif /* CONFIG_VIRTFS */
60653b28 1139
085bccb7
FK		 1140/*
1141 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus.
1142 */
1143
e0d686bf
JW		 1144static int virtio_pci_query_nvectors(DeviceState *d)
1145{
1146 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1147
1148 return proxy->nvectors;
1149}
1150
8607f5c3
JW		 1151static AddressSpace *virtio_pci_get_dma_as(DeviceState *d)
1152{
1153 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1154 PCIDevice *dev = &proxy->pci_dev;
1155
f0edf239 1156 return pci_get_address_space(dev);
8607f5c3
JW		 1157}
1158
ada434cd 1159static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
dfb8e184
MT		 1160 struct virtio_pci_cap *cap)
1161{
1162 PCIDevice *dev = &proxy->pci_dev;
1163 int offset;
1164
dfb8e184
MT		 1165 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0, cap->cap_len);
1166 assert(offset > 0);
1167
1168 assert(cap->cap_len >= sizeof *cap);
1169 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len,
1170 cap->cap_len - PCI_CAP_FLAGS);
ada434cd
MT		 1171
1172 return offset;
dfb8e184
MT		 1173}
1174
dfb8e184
MT		 1175static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
1176 unsigned size)
1177{
1178 VirtIOPCIProxy *proxy = opaque;
1179 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1180 uint32_t val = 0;
1181 int i;
1182
1183 switch (addr) {
1184 case VIRTIO_PCI_COMMON_DFSELECT:
1185 val = proxy->dfselect;
1186 break;
1187 case VIRTIO_PCI_COMMON_DF:
1188 if (proxy->dfselect <= 1) {
9b706dbb
MT		 1189 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
1190
1191 val = (vdev->host_features & ~vdc->legacy_features) >>
5f456073 1192 (32 * proxy->dfselect);
dfb8e184
MT		 1193 }
1194 break;
1195 case VIRTIO_PCI_COMMON_GFSELECT:
1196 val = proxy->gfselect;
1197 break;
1198 case VIRTIO_PCI_COMMON_GF:
3750dabc 1199 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
dfb8e184
MT		 1200 val = proxy->guest_features[proxy->gfselect];
1201 }
1202 break;
1203 case VIRTIO_PCI_COMMON_MSIX:
1204 val = vdev->config_vector;
1205 break;
1206 case VIRTIO_PCI_COMMON_NUMQ:
1207 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) {
1208 if (virtio_queue_get_num(vdev, i)) {
1209 val = i + 1;
1210 }
1211 }
1212 break;
1213 case VIRTIO_PCI_COMMON_STATUS:
1214 val = vdev->status;
1215 break;
1216 case VIRTIO_PCI_COMMON_CFGGENERATION:
b8f05908 1217 val = vdev->generation;
dfb8e184
MT		 1218 break;
1219 case VIRTIO_PCI_COMMON_Q_SELECT:
1220 val = vdev->queue_sel;
1221 break;
1222 case VIRTIO_PCI_COMMON_Q_SIZE:
1223 val = virtio_queue_get_num(vdev, vdev->queue_sel);
1224 break;
1225 case VIRTIO_PCI_COMMON_Q_MSIX:
1226 val = virtio_queue_vector(vdev, vdev->queue_sel);
1227 break;
1228 case VIRTIO_PCI_COMMON_Q_ENABLE:
1229 val = proxy->vqs[vdev->queue_sel].enabled;
1230 break;
1231 case VIRTIO_PCI_COMMON_Q_NOFF:
1232 /* Simply map queues in order */
1233 val = vdev->queue_sel;
1234 break;
1235 case VIRTIO_PCI_COMMON_Q_DESCLO:
1236 val = proxy->vqs[vdev->queue_sel].desc[0];
1237 break;
1238 case VIRTIO_PCI_COMMON_Q_DESCHI:
1239 val = proxy->vqs[vdev->queue_sel].desc[1];
1240 break;
1241 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1242 val = proxy->vqs[vdev->queue_sel].avail[0];
1243 break;
1244 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1245 val = proxy->vqs[vdev->queue_sel].avail[1];
1246 break;
1247 case VIRTIO_PCI_COMMON_Q_USEDLO:
1248 val = proxy->vqs[vdev->queue_sel].used[0];
1249 break;
1250 case VIRTIO_PCI_COMMON_Q_USEDHI:
1251 val = proxy->vqs[vdev->queue_sel].used[1];
1252 break;
1253 default:
1254 val = 0;
1255 }
1256
1257 return val;
1258}
1259
1260static void virtio_pci_common_write(void *opaque, hwaddr addr,
1261 uint64_t val, unsigned size)
1262{
1263 VirtIOPCIProxy *proxy = opaque;
1264 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1265
1266 switch (addr) {
1267 case VIRTIO_PCI_COMMON_DFSELECT:
1268 proxy->dfselect = val;
1269 break;
1270 case VIRTIO_PCI_COMMON_GFSELECT:
1271 proxy->gfselect = val;
1272 break;
1273 case VIRTIO_PCI_COMMON_GF:
3750dabc 1274 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
dfb8e184
MT		 1275 proxy->guest_features[proxy->gfselect] = val;
1276 virtio_set_features(vdev,
1277 (((uint64_t)proxy->guest_features[1]) << 32) |
1278 proxy->guest_features[0]);
1279 }
1280 break;
1281 case VIRTIO_PCI_COMMON_MSIX:
1282 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
1283 /* Make it possible for guest to discover an error took place. */
1284 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1285 val = VIRTIO_NO_VECTOR;
1286 }
1287 vdev->config_vector = val;
1288 break;
1289 case VIRTIO_PCI_COMMON_STATUS:
1290 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
1291 virtio_pci_stop_ioeventfd(proxy);
1292 }
1293
1294 virtio_set_status(vdev, val & 0xFF);
1295
1296 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
1297 virtio_pci_start_ioeventfd(proxy);
1298 }
1299
1300 if (vdev->status == 0) {
75fd6f13 1301 virtio_pci_reset(DEVICE(proxy));
dfb8e184
MT		 1302 }
1303
1304 break;
1305 case VIRTIO_PCI_COMMON_Q_SELECT:
1306 if (val < VIRTIO_QUEUE_MAX) {
1307 vdev->queue_sel = val;
1308 }
1309 break;
1310 case VIRTIO_PCI_COMMON_Q_SIZE:
1311 proxy->vqs[vdev->queue_sel].num = val;
1312 break;
1313 case VIRTIO_PCI_COMMON_Q_MSIX:
1314 msix_vector_unuse(&proxy->pci_dev,
1315 virtio_queue_vector(vdev, vdev->queue_sel));
1316 /* Make it possible for guest to discover an error took place. */
1317 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1318 val = VIRTIO_NO_VECTOR;
1319 }
1320 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
1321 break;
1322 case VIRTIO_PCI_COMMON_Q_ENABLE:
dfb8e184
MT		 1323 virtio_queue_set_num(vdev, vdev->queue_sel,
1324 proxy->vqs[vdev->queue_sel].num);
1325 virtio_queue_set_rings(vdev, vdev->queue_sel,
1326 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 |
1327 proxy->vqs[vdev->queue_sel].desc[0],
1328 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 |
1329 proxy->vqs[vdev->queue_sel].avail[0],
1330 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 |
1331 proxy->vqs[vdev->queue_sel].used[0]);
393f04d3 1332 proxy->vqs[vdev->queue_sel].enabled = 1;
dfb8e184
MT		 1333 break;
1334 case VIRTIO_PCI_COMMON_Q_DESCLO:
1335 proxy->vqs[vdev->queue_sel].desc[0] = val;
1336 break;
1337 case VIRTIO_PCI_COMMON_Q_DESCHI:
1338 proxy->vqs[vdev->queue_sel].desc[1] = val;
1339 break;
1340 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1341 proxy->vqs[vdev->queue_sel].avail[0] = val;
1342 break;
1343 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1344 proxy->vqs[vdev->queue_sel].avail[1] = val;
1345 break;
1346 case VIRTIO_PCI_COMMON_Q_USEDLO:
1347 proxy->vqs[vdev->queue_sel].used[0] = val;
1348 break;
1349 case VIRTIO_PCI_COMMON_Q_USEDHI:
1350 proxy->vqs[vdev->queue_sel].used[1] = val;
1351 break;
1352 default:
1353 break;
1354 }
1355}
1356
1357
1358static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr,
1359 unsigned size)
1360{
1361 return 0;
1362}
1363
1364static void virtio_pci_notify_write(void *opaque, hwaddr addr,
1365 uint64_t val, unsigned size)
1366{
1367 VirtIODevice *vdev = opaque;
d9997d89
MA		 1368 VirtIOPCIProxy *proxy = VIRTIO_PCI(DEVICE(vdev)->parent_bus->parent);
1369 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy);
dfb8e184
MT		 1370
1371 if (queue < VIRTIO_QUEUE_MAX) {
1372 virtio_queue_notify(vdev, queue);
1373 }
1374}
1375
9824d2a3
JW		 1376static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr,
1377 uint64_t val, unsigned size)
1378{
1379 VirtIODevice *vdev = opaque;
1380 unsigned queue = val;
1381
1382 if (queue < VIRTIO_QUEUE_MAX) {
1383 virtio_queue_notify(vdev, queue);
1384 }
1385}
1386
dfb8e184
MT		 1387static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr,
1388 unsigned size)
1389{
1390 VirtIOPCIProxy *proxy = opaque;
1391 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
0687c37c 1392 uint64_t val = atomic_xchg(&vdev->isr, 0);
dfb8e184
MT		 1393 pci_irq_deassert(&proxy->pci_dev);
1394
1395 return val;
1396}
1397
1398static void virtio_pci_isr_write(void *opaque, hwaddr addr,
1399 uint64_t val, unsigned size)
1400{
1401}
1402
1403static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr,
1404 unsigned size)
1405{
1406 VirtIODevice *vdev = opaque;
1407 uint64_t val = 0;
1408
1409 switch (size) {
1410 case 1:
54c720d4 1411 val = virtio_config_modern_readb(vdev, addr);
dfb8e184
MT		 1412 break;
1413 case 2:
54c720d4 1414 val = virtio_config_modern_readw(vdev, addr);
dfb8e184
MT		 1415 break;
1416 case 4:
54c720d4 1417 val = virtio_config_modern_readl(vdev, addr);
dfb8e184
MT		 1418 break;
1419 }
1420 return val;
1421}
1422
1423static void virtio_pci_device_write(void *opaque, hwaddr addr,
1424 uint64_t val, unsigned size)
1425{
1426 VirtIODevice *vdev = opaque;
1427 switch (size) {
1428 case 1:
54c720d4 1429 virtio_config_modern_writeb(vdev, addr, val);
dfb8e184
MT		 1430 break;
1431 case 2:
54c720d4 1432 virtio_config_modern_writew(vdev, addr, val);
dfb8e184
MT		 1433 break;
1434 case 4:
54c720d4 1435 virtio_config_modern_writel(vdev, addr, val);
dfb8e184
MT		 1436 break;
1437 }
1438}
1439
1141ce21
GH		 1440static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy)
1441{
1442 static const MemoryRegionOps common_ops = {
1443 .read = virtio_pci_common_read,
1444 .write = virtio_pci_common_write,
1445 .impl = {
1446 .min_access_size = 1,
1447 .max_access_size = 4,
1448 },
1449 .endianness = DEVICE_LITTLE_ENDIAN,
1450 };
1451 static const MemoryRegionOps isr_ops = {
1452 .read = virtio_pci_isr_read,
1453 .write = virtio_pci_isr_write,
1454 .impl = {
1455 .min_access_size = 1,
1456 .max_access_size = 4,
1457 },
1458 .endianness = DEVICE_LITTLE_ENDIAN,
1459 };
1460 static const MemoryRegionOps device_ops = {
1461 .read = virtio_pci_device_read,
1462 .write = virtio_pci_device_write,
1463 .impl = {
1464 .min_access_size = 1,
1465 .max_access_size = 4,
1466 },
1467 .endianness = DEVICE_LITTLE_ENDIAN,
1468 };
1469 static const MemoryRegionOps notify_ops = {
1470 .read = virtio_pci_notify_read,
1471 .write = virtio_pci_notify_write,
1472 .impl = {
1473 .min_access_size = 1,
1474 .max_access_size = 4,
1475 },
1476 .endianness = DEVICE_LITTLE_ENDIAN,
1477 };
9824d2a3
JW		 1478 static const MemoryRegionOps notify_pio_ops = {
1479 .read = virtio_pci_notify_read,
1480 .write = virtio_pci_notify_write_pio,
1481 .impl = {
1482 .min_access_size = 1,
1483 .max_access_size = 4,
1484 },
1485 .endianness = DEVICE_LITTLE_ENDIAN,
1486 };
1487
1141ce21
GH		 1488
1489 memory_region_init_io(&proxy->common.mr, OBJECT(proxy),
1490 &common_ops,
1491 proxy,
b6ce27a5
GH		 1492 "virtio-pci-common",
1493 proxy->common.size);
a3cc2e81 1494
1141ce21
GH		 1495 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy),
1496 &isr_ops,
1497 proxy,
b6ce27a5
GH		 1498 "virtio-pci-isr",
1499 proxy->isr.size);
a3cc2e81 1500
1141ce21
GH		 1501 memory_region_init_io(&proxy->device.mr, OBJECT(proxy),
1502 &device_ops,
1503 virtio_bus_get_device(&proxy->bus),
b6ce27a5
GH		 1504 "virtio-pci-device",
1505 proxy->device.size);
a3cc2e81 1506
1141ce21
GH		 1507 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy),
1508 &notify_ops,
1509 virtio_bus_get_device(&proxy->bus),
1510 "virtio-pci-notify",
b6ce27a5 1511 proxy->notify.size);
9824d2a3
JW		 1512
1513 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy),
1514 &notify_pio_ops,
1515 virtio_bus_get_device(&proxy->bus),
1516 "virtio-pci-notify-pio",
e3aab6c7 1517 proxy->notify_pio.size);
a3cc2e81
GH		 1518}
1519
1520static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy,
54790d71 1521 VirtIOPCIRegion *region,
9824d2a3
JW		 1522 struct virtio_pci_cap *cap,
1523 MemoryRegion *mr,
1524 uint8_t bar)
a3cc2e81 1525{
9824d2a3 1526 memory_region_add_subregion(mr, region->offset, &region->mr);
54790d71 1527
fc004905 1528 cap->cfg_type = region->type;
9824d2a3 1529 cap->bar = bar;
54790d71 1530 cap->offset = cpu_to_le32(region->offset);
b6ce27a5 1531 cap->length = cpu_to_le32(region->size);
54790d71 1532 virtio_pci_add_mem_cap(proxy, cap);
9824d2a3
JW		 1533
1534}
1535
1536static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy,
1537 VirtIOPCIRegion *region,
1538 struct virtio_pci_cap *cap)
1539{
1540 virtio_pci_modern_region_map(proxy, region, cap,
7a25126d 1541 &proxy->modern_bar, proxy->modern_mem_bar_idx);
1141ce21 1542}
dfb8e184 1543
9824d2a3
JW		 1544static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy,
1545 VirtIOPCIRegion *region,
1546 struct virtio_pci_cap *cap)
1547{
1548 virtio_pci_modern_region_map(proxy, region, cap,
7a25126d 1549 &proxy->io_bar, proxy->modern_io_bar_idx);
9824d2a3
JW		 1550}
1551
1552static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy,
1553 VirtIOPCIRegion *region)
27462695
MT		 1554{
1555 memory_region_del_subregion(&proxy->modern_bar,
1556 &region->mr);
1557}
1558
9824d2a3
JW		 1559static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy,
1560 VirtIOPCIRegion *region)
1561{
1562 memory_region_del_subregion(&proxy->io_bar,
1563 &region->mr);
1564}
1565
d1b4259f
MC		 1566static void virtio_pci_pre_plugged(DeviceState *d, Error **errp)
1567{
1568 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1569 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1570
1571 if (virtio_pci_modern(proxy)) {
1572 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1);
1573 }
1574
1575 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE);
1576}
1577
085bccb7 1578/* This is called by virtio-bus just after the device is plugged. */
e8398045 1579static void virtio_pci_device_plugged(DeviceState *d, Error **errp)
085bccb7
FK		 1580{
1581 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1582 VirtioBusState *bus = &proxy->bus;
9a4c0e22 1583 bool legacy = virtio_pci_legacy(proxy);
d1b4259f 1584 bool modern;
9824d2a3 1585 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
085bccb7
FK		 1586 uint8_t *config;
1587 uint32_t size;
6b8f1020 1588 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
085bccb7 1589
d1b4259f
MC		 1590 /*
1591 * Virtio capabilities present without
1592 * VIRTIO_F_VERSION_1 confuses guests
1593 */
66d1c4c1
MC		 1594 if (!proxy->ignore_backend_features &&
1595 !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) {
d1b4259f
MC		 1596 virtio_pci_disable_modern(proxy);
1597
1598 if (!legacy) {
1599 error_setg(errp, "Device doesn't support modern mode, and legacy"
1600 " mode is disabled");
1601 error_append_hint(errp, "Set disable-legacy to off\n");
1602
1603 return;
1604 }
1605 }
1606
1607 modern = virtio_pci_modern(proxy);
1608
085bccb7
FK		 1609 config = proxy->pci_dev.config;
1610 if (proxy->class_code) {
1611 pci_config_set_class(config, proxy->class_code);
1612 }
e266d421
GH		 1613
1614 if (legacy) {
8607f5c3
JW		 1615 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) {
1616 error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by"
1617 "neither legacy nor transitional device.");
1618 return ;
1619 }
e266d421
GH		 1620 /* legacy and transitional */
1621 pci_set_word(config + PCI_SUBSYSTEM_VENDOR_ID,
1622 pci_get_word(config + PCI_VENDOR_ID));
1623 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus));
1624 } else {
1625 /* pure virtio-1.0 */
1626 pci_set_word(config + PCI_VENDOR_ID,
1627 PCI_VENDOR_ID_REDHAT_QUMRANET);
1628 pci_set_word(config + PCI_DEVICE_ID,
1629 0x1040 + virtio_bus_get_vdev_id(bus));
1630 pci_config_set_revision(config, 1);
1631 }
085bccb7
FK		 1632 config[PCI_INTERRUPT_PIN] = 1;
1633
dfb8e184 1634
e266d421 1635 if (modern) {
cc52ea90
GH		 1636 struct virtio_pci_cap cap = {
1637 .cap_len = sizeof cap,
dfb8e184
MT		 1638 };
1639 struct virtio_pci_notify_cap notify = {
dfb8e184 1640 .cap.cap_len = sizeof notify,
dfb8e184 1641 .notify_off_multiplier =
d9997d89 1642 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)),
dfb8e184 1643 };
ada434cd
MT		 1644 struct virtio_pci_cfg_cap cfg = {
1645 .cap.cap_len = sizeof cfg,
1646 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG,
1647 };
9824d2a3
JW		 1648 struct virtio_pci_notify_cap notify_pio = {
1649 .cap.cap_len = sizeof notify,
1650 .notify_off_multiplier = cpu_to_le32(0x0),
1651 };
dfb8e184 1652
9824d2a3 1653 struct virtio_pci_cfg_cap *cfg_mask;
dfb8e184 1654
1141ce21 1655 virtio_pci_modern_regions_init(proxy);
9824d2a3
JW		 1656
1657 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap);
1658 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap);
1659 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap);
1660 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, &notify.cap);
1661
1662 if (modern_pio) {
1663 memory_region_init(&proxy->io_bar, OBJECT(proxy),
1664 "virtio-pci-io", 0x4);
1665
7a25126d 1666 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx,
9824d2a3
JW		 1667 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar);
1668
1669 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio,
1670 &notify_pio.cap);
1671 }
ada434cd 1672
7a25126d 1673 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx,
4e93a68e
GH		 1674 PCI_BASE_ADDRESS_SPACE_MEMORY |
1675 PCI_BASE_ADDRESS_MEM_PREFETCH |
1676 PCI_BASE_ADDRESS_MEM_TYPE_64,
dfb8e184 1677 &proxy->modern_bar);
ada434cd
MT		 1678
1679 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap);
1680 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap);
1681 pci_set_byte(&cfg_mask->cap.bar, ~0x0);
1682 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0);
1683 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0);
1684 pci_set_long(cfg_mask->pci_cfg_data, ~0x0);
dfb8e184
MT		 1685 }
1686
0d583647
RH		 1687 if (proxy->nvectors) {
1688 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors,
ee640c62 1689 proxy->msix_bar_idx, NULL);
0d583647 1690 if (err) {
ee640c62 1691 /* Notice when a system that supports MSIx can't initialize it */
0d583647
RH		 1692 if (err != -ENOTSUP) {
1693 error_report("unable to init msix vectors to %" PRIu32,
1694 proxy->nvectors);
1695 }
1696 proxy->nvectors = 0;
1697 }
085bccb7
FK		 1698 }
1699
1700 proxy->pci_dev.config_write = virtio_write_config;
ada434cd 1701 proxy->pci_dev.config_read = virtio_read_config;
085bccb7 1702
e266d421
GH		 1703 if (legacy) {
1704 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev)
1705 + virtio_bus_get_vdev_config_len(bus);
1d0148fe 1706 size = pow2ceil(size);
085bccb7 1707
e266d421
GH		 1708 memory_region_init_io(&proxy->bar, OBJECT(proxy),
1709 &virtio_pci_config_ops,
1710 proxy, "virtio-pci", size);
dfb8e184 1711
7a25126d 1712 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx,
23c5e397 1713 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar);
e266d421 1714 }
085bccb7
FK		 1715}
1716
06a13073
PB		 1717static void virtio_pci_device_unplugged(DeviceState *d)
1718{
06a13073 1719 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
9a4c0e22 1720 bool modern = virtio_pci_modern(proxy);
9824d2a3 1721 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
06a13073
PB		 1722
1723 virtio_pci_stop_ioeventfd(proxy);
27462695
MT		 1724
1725 if (modern) {
9824d2a3
JW		 1726 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common);
1727 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr);
1728 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device);
1729 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify);
1730 if (modern_pio) {
1731 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio);
1732 }
27462695 1733 }
06a13073
PB		 1734}
1735
fc079951 1736static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
085bccb7 1737{
b6ce27a5 1738 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
085bccb7 1739 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
9a4c0e22
MA		 1740 bool pcie_port = pci_bus_is_express(pci_dev->bus) &&
1741 !pci_bus_is_root(pci_dev->bus);
fc079951 1742
ca2b413c
PB		 1743 if (!kvm_has_many_ioeventfds()) {
1744 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
1745 }
1746
b6ce27a5
GH		 1747 /*
1748 * virtio pci bar layout used by default.
1749 * subclasses can re-arrange things if needed.
1750 *
1751 * region 0 -- virtio legacy io bar
1752 * region 1 -- msi-x bar
1753 * region 4+5 -- virtio modern memory (64bit) bar
1754 *
1755 */
7a25126d
CF		 1756 proxy->legacy_io_bar_idx = 0;
1757 proxy->msix_bar_idx = 1;
1758 proxy->modern_io_bar_idx = 2;
1759 proxy->modern_mem_bar_idx = 4;
b6ce27a5
GH		 1760
1761 proxy->common.offset = 0x0;
1762 proxy->common.size = 0x1000;
1763 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG;
1764
1765 proxy->isr.offset = 0x1000;
1766 proxy->isr.size = 0x1000;
1767 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG;
1768
1769 proxy->device.offset = 0x2000;
1770 proxy->device.size = 0x1000;
1771 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG;
1772
1773 proxy->notify.offset = 0x3000;
d9997d89 1774 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX;
b6ce27a5
GH		 1775 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1776
9824d2a3
JW		 1777 proxy->notify_pio.offset = 0x0;
1778 proxy->notify_pio.size = 0x4;
1779 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1780
b6ce27a5
GH		 1781 /* subclasses can enforce modern, so do this unconditionally */
1782 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci",
d9997d89
MA		 1783 /* PCI BAR regions must be powers of 2 */
1784 pow2ceil(proxy->notify.offset + proxy->notify.size));
b6ce27a5 1785
ada434cd
MT		 1786 memory_region_init_alias(&proxy->modern_cfg,
1787 OBJECT(proxy),
1788 "virtio-pci-cfg",
1789 &proxy->modern_bar,
1790 0,
1791 memory_region_size(&proxy->modern_bar));
1792
1793 address_space_init(&proxy->modern_as, &proxy->modern_cfg, "virtio-pci-cfg-as");
1794
9a4c0e22
MA		 1795 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) {
1796 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
1797 }
1798
71d19fc5 1799 if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) {
3eff3769
GK		 1800 error_setg(errp, "device cannot work as neither modern nor legacy mode"
1801 " is enabled");
1802 error_append_hint(errp, "Set either disable-modern or disable-legacy"
1803 " to off\n");
1804 return;
1805 }
1806
9a4c0e22 1807 if (pcie_port && pci_is_express(pci_dev)) {
1811e64c
MA		 1808 int pos;
1809
1811e64c
MA		 1810 pos = pcie_endpoint_cap_init(pci_dev, 0);
1811 assert(pos > 0);
1812
1813 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF);
1814 assert(pos > 0);
1815
1816 /*
1817 * Indicates that this function complies with revision 1.2 of the
1818 * PCI Power Management Interface Specification.
1819 */
1820 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
615c4ed2
JW		 1821
1822 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
1823 pcie_ats_init(pci_dev, 256);
1824 }
1825
0560b0e9
SL		 1826 } else {
1827 /*
1828 * make future invocations of pci_is_express() return false
1829 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE.
1830 */
1831 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS;
1811e64c
MA		 1832 }
1833
b6ce27a5 1834 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy);
fc079951 1835 if (k->realize) {
b6ce27a5 1836 k->realize(proxy, errp);
085bccb7 1837 }
085bccb7
FK		 1838}
1839
1840static void virtio_pci_exit(PCIDevice *pci_dev)
1841{
ada434cd
MT		 1842 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
1843
8b81bb3b 1844 msix_uninit_exclusive_bar(pci_dev);
ada434cd 1845 address_space_destroy(&proxy->modern_as);
085bccb7
FK		 1846}
1847
59ccd20a 1848static void virtio_pci_reset(DeviceState *qdev)
085bccb7
FK		 1849{
1850 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1851 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
393f04d3
JW		 1852 int i;
1853
085bccb7
FK		 1854 virtio_pci_stop_ioeventfd(proxy);
1855 virtio_bus_reset(bus);
1856 msix_unuse_all_vectors(&proxy->pci_dev);
393f04d3
JW		 1857
1858 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
1859 proxy->vqs[i].enabled = 0;
1860 }
085bccb7
FK		 1861}
1862
85d1277e 1863static Property virtio_pci_properties[] = {
68a27b20
MT		 1864 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags,
1865 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false),
9a4c0e22
MA		 1866 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy,
1867 ON_OFF_AUTO_AUTO),
1868 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false),
a6df8adf
JW		 1869 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags,
1870 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true),
9824d2a3
JW		 1871 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags,
1872 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false),
1811e64c
MA		 1873 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags,
1874 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false),
d9997d89
MA		 1875 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags,
1876 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false),
66d1c4c1
MC		 1877 DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy,
1878 ignore_backend_features, false),
615c4ed2
JW		 1879 DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags,
1880 VIRTIO_PCI_FLAG_ATS_BIT, false),
85d1277e
ML		 1881 DEFINE_PROP_END_OF_LIST(),
1882};
1883
0560b0e9
SL		 1884static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp)
1885{
1886 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev);
1887 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1888 PCIDevice *pci_dev = &proxy->pci_dev;
1889
1890 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) &&
9a4c0e22 1891 virtio_pci_modern(proxy)) {
0560b0e9
SL		 1892 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
1893 }
1894
1895 vpciklass->parent_dc_realize(qdev, errp);
1896}
1897
085bccb7
FK		 1898static void virtio_pci_class_init(ObjectClass *klass, void *data)
1899{
1900 DeviceClass *dc = DEVICE_CLASS(klass);
1901 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
0560b0e9 1902 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
085bccb7 1903
85d1277e 1904 dc->props = virtio_pci_properties;
fc079951 1905 k->realize = virtio_pci_realize;
085bccb7
FK		 1906 k->exit = virtio_pci_exit;
1907 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1908 k->revision = VIRTIO_PCI_ABI_VERSION;
1909 k->class_id = PCI_CLASS_OTHERS;
0560b0e9
SL		 1910 vpciklass->parent_dc_realize = dc->realize;
1911 dc->realize = virtio_pci_dc_realize;
59ccd20a 1912 dc->reset = virtio_pci_reset;
085bccb7
FK		 1913}
1914
1915static const TypeInfo virtio_pci_info = {
1916 .name = TYPE_VIRTIO_PCI,
1917 .parent = TYPE_PCI_DEVICE,
1918 .instance_size = sizeof(VirtIOPCIProxy),
1919 .class_init = virtio_pci_class_init,
1920 .class_size = sizeof(VirtioPCIClass),
1921 .abstract = true,
1922};
1923
653ced07
FK		 1924/* virtio-blk-pci */
1925
1926static Property virtio_blk_pci_properties[] = {
c7bcc85d 1927 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
653ced07
FK		 1928 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1929 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1930 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
653ced07
FK		 1931 DEFINE_PROP_END_OF_LIST(),
1932};
1933
fc079951 1934static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
653ced07
FK		 1935{
1936 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(vpci_dev);
1937 DeviceState *vdev = DEVICE(&dev->vdev);
fc079951 1938
653ced07 1939 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 1940 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
653ced07
FK		 1941}
1942
1943static void virtio_blk_pci_class_init(ObjectClass *klass, void *data)
1944{
1945 DeviceClass *dc = DEVICE_CLASS(klass);
1946 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
1947 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
1948
125ee0ed 1949 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
653ced07 1950 dc->props = virtio_blk_pci_properties;
fc079951 1951 k->realize = virtio_blk_pci_realize;
653ced07
FK		 1952 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1953 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BLOCK;
1954 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
1955 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
1956}
1957
1958static void virtio_blk_pci_instance_init(Object *obj)
1959{
1960 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(obj);
c8075caf
GA		 1961
1962 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
1963 TYPE_VIRTIO_BLK);
467b3f33
SH		 1964 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev),"iothread",
1965 &error_abort);
aeb98ddc
GA		 1966 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
1967 "bootindex", &error_abort);
653ced07
FK		 1968}
1969
1970static const TypeInfo virtio_blk_pci_info = {
1971 .name = TYPE_VIRTIO_BLK_PCI,
1972 .parent = TYPE_VIRTIO_PCI,
1973 .instance_size = sizeof(VirtIOBlkPCI),
1974 .instance_init = virtio_blk_pci_instance_init,
1975 .class_init = virtio_blk_pci_class_init,
1976};
1977
bc7b90a0
FK		 1978/* virtio-scsi-pci */
1979
1980static Property virtio_scsi_pci_properties[] = {
1981 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1982 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1983 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
1984 DEV_NVECTORS_UNSPECIFIED),
bc7b90a0
FK		 1985 DEFINE_PROP_END_OF_LIST(),
1986};
1987
fc079951 1988static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
bc7b90a0
FK		 1989{
1990 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(vpci_dev);
1991 DeviceState *vdev = DEVICE(&dev->vdev);
292c8e50 1992 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev);
6f32a6b4
FK		 1993 DeviceState *proxy = DEVICE(vpci_dev);
1994 char *bus_name;
bc7b90a0
FK		 1995
1996 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
292c8e50 1997 vpci_dev->nvectors = vs->conf.num_queues + 3;
bc7b90a0
FK		 1998 }
1999
6f32a6b4
FK		 2000 /*
2001 * For command line compatibility, this sets the virtio-scsi-device bus
2002 * name as before.
2003 */
2004 if (proxy->id) {
2005 bus_name = g_strdup_printf("%s.0", proxy->id);
2006 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name);
2007 g_free(bus_name);
2008 }
2009
bc7b90a0 2010 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2011 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
bc7b90a0
FK		 2012}
2013
2014static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data)
2015{
2016 DeviceClass *dc = DEVICE_CLASS(klass);
2017 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2018 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951
MA		 2019
2020 k->realize = virtio_scsi_pci_realize;
125ee0ed 2021 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
bc7b90a0
FK		 2022 dc->props = virtio_scsi_pci_properties;
2023 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2024 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI;
2025 pcidev_k->revision = 0x00;
2026 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
2027}
2028
2029static void virtio_scsi_pci_instance_init(Object *obj)
2030{
2031 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(obj);
c8075caf
GA		 2032
2033 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2034 TYPE_VIRTIO_SCSI);
19d339f1
FZ		 2035 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev), "iothread",
2036 &error_abort);
bc7b90a0
FK		 2037}
2038
2039static const TypeInfo virtio_scsi_pci_info = {
2040 .name = TYPE_VIRTIO_SCSI_PCI,
2041 .parent = TYPE_VIRTIO_PCI,
2042 .instance_size = sizeof(VirtIOSCSIPCI),
2043 .instance_init = virtio_scsi_pci_instance_init,
2044 .class_init = virtio_scsi_pci_class_init,
2045};
2046
50787628
NB		 2047/* vhost-scsi-pci */
2048
2049#ifdef CONFIG_VHOST_SCSI
2050static Property vhost_scsi_pci_properties[] = {
2051 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
2052 DEV_NVECTORS_UNSPECIFIED),
50787628
NB		 2053 DEFINE_PROP_END_OF_LIST(),
2054};
2055
fc079951 2056static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
50787628
NB		 2057{
2058 VHostSCSIPCI *dev = VHOST_SCSI_PCI(vpci_dev);
2059 DeviceState *vdev = DEVICE(&dev->vdev);
2060 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev);
2061
2062 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
2063 vpci_dev->nvectors = vs->conf.num_queues + 3;
2064 }
2065
2066 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2067 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
50787628
NB		 2068}
2069
2070static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data)
2071{
2072 DeviceClass *dc = DEVICE_CLASS(klass);
2073 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2074 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951 2075 k->realize = vhost_scsi_pci_realize;
125ee0ed 2076 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
50787628
NB		 2077 dc->props = vhost_scsi_pci_properties;
2078 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2079 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI;
2080 pcidev_k->revision = 0x00;
2081 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
2082}
2083
2084static void vhost_scsi_pci_instance_init(Object *obj)
2085{
2086 VHostSCSIPCI *dev = VHOST_SCSI_PCI(obj);
c8075caf
GA		 2087
2088 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2089 TYPE_VHOST_SCSI);
d4433f32
GA		 2090 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
2091 "bootindex", &error_abort);
50787628
NB		 2092}
2093
2094static const TypeInfo vhost_scsi_pci_info = {
2095 .name = TYPE_VHOST_SCSI_PCI,
2096 .parent = TYPE_VIRTIO_PCI,
2097 .instance_size = sizeof(VHostSCSIPCI),
2098 .instance_init = vhost_scsi_pci_instance_init,
2099 .class_init = vhost_scsi_pci_class_init,
2100};
2101#endif
2102
fc0b9b0e
SH		 2103/* vhost-vsock-pci */
2104
2105#ifdef CONFIG_VHOST_VSOCK
2106static Property vhost_vsock_pci_properties[] = {
2107 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
2108 DEFINE_PROP_END_OF_LIST(),
2109};
2110
2111static void vhost_vsock_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
2112{
2113 VHostVSockPCI *dev = VHOST_VSOCK_PCI(vpci_dev);
2114 DeviceState *vdev = DEVICE(&dev->vdev);
2115
2116 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
2117 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
2118}
2119
2120static void vhost_vsock_pci_class_init(ObjectClass *klass, void *data)
2121{
2122 DeviceClass *dc = DEVICE_CLASS(klass);
2123 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2124 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2125 k->realize = vhost_vsock_pci_realize;
2126 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
2127 dc->props = vhost_vsock_pci_properties;
2128 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2129 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_VSOCK;
2130 pcidev_k->revision = 0x00;
2131 pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER;
2132}
2133
2134static void vhost_vsock_pci_instance_init(Object *obj)
2135{
2136 VHostVSockPCI *dev = VHOST_VSOCK_PCI(obj);
2137
2138 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2139 TYPE_VHOST_VSOCK);
2140}
2141
2142static const TypeInfo vhost_vsock_pci_info = {
2143 .name = TYPE_VHOST_VSOCK_PCI,
2144 .parent = TYPE_VIRTIO_PCI,
2145 .instance_size = sizeof(VHostVSockPCI),
2146 .instance_init = vhost_vsock_pci_instance_init,
2147 .class_init = vhost_vsock_pci_class_init,
2148};
2149#endif
2150
e378e88d
FK		 2151/* virtio-balloon-pci */
2152
2153static Property virtio_balloon_pci_properties[] = {
c7bcc85d 2154 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
e378e88d
FK		 2155 DEFINE_PROP_END_OF_LIST(),
2156};
2157
fc079951 2158static void virtio_balloon_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
e378e88d
FK		 2159{
2160 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(vpci_dev);
2161 DeviceState *vdev = DEVICE(&dev->vdev);
2162
2163 if (vpci_dev->class_code != PCI_CLASS_OTHERS &&
2164 vpci_dev->class_code != PCI_CLASS_MEMORY_RAM) { /* qemu < 1.1 */
2165 vpci_dev->class_code = PCI_CLASS_OTHERS;
2166 }
2167
2168 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2169 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
e378e88d
FK		 2170}
2171
2172static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data)
2173{
2174 DeviceClass *dc = DEVICE_CLASS(klass);
2175 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2176 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951 2177 k->realize = virtio_balloon_pci_realize;
125ee0ed 2178 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
e378e88d
FK		 2179 dc->props = virtio_balloon_pci_properties;
2180 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2181 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BALLOON;
2182 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2183 pcidev_k->class_id = PCI_CLASS_OTHERS;
2184}
2185
2186static void virtio_balloon_pci_instance_init(Object *obj)
2187{
2188 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(obj);
39b87c7b 2189
a6027b0f
DL		 2190 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2191 TYPE_VIRTIO_BALLOON);
39b87c7b
SZ		 2192 object_property_add_alias(obj, "guest-stats", OBJECT(&dev->vdev),
2193 "guest-stats", &error_abort);
2194 object_property_add_alias(obj, "guest-stats-polling-interval",
2195 OBJECT(&dev->vdev),
2196 "guest-stats-polling-interval", &error_abort);
e378e88d
FK		 2197}
2198
2199static const TypeInfo virtio_balloon_pci_info = {
2200 .name = TYPE_VIRTIO_BALLOON_PCI,
2201 .parent = TYPE_VIRTIO_PCI,
2202 .instance_size = sizeof(VirtIOBalloonPCI),
2203 .instance_init = virtio_balloon_pci_instance_init,
2204 .class_init = virtio_balloon_pci_class_init,
2205};
2206
f7f7464a
FK		 2207/* virtio-serial-pci */
2208
fc079951 2209static void virtio_serial_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
f7f7464a
FK		 2210{
2211 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(vpci_dev);
2212 DeviceState *vdev = DEVICE(&dev->vdev);
80270a19
FK		 2213 DeviceState *proxy = DEVICE(vpci_dev);
2214 char *bus_name;
f7f7464a
FK		 2215
2216 if (vpci_dev->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
2217 vpci_dev->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
2218 vpci_dev->class_code != PCI_CLASS_OTHERS) { /* qemu-kvm */
2219 vpci_dev->class_code = PCI_CLASS_COMMUNICATION_OTHER;
2220 }
2221
2222 /* backwards-compatibility with machines that were created with
2223 DEV_NVECTORS_UNSPECIFIED */
2224 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
2225 vpci_dev->nvectors = dev->vdev.serial.max_virtserial_ports + 1;
2226 }
2227
80270a19
FK		 2228 /*
2229 * For command line compatibility, this sets the virtio-serial-device bus
2230 * name as before.
2231 */
2232 if (proxy->id) {
2233 bus_name = g_strdup_printf("%s.0", proxy->id);
2234 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name);
2235 g_free(bus_name);
2236 }
2237
f7f7464a 2238 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2239 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
f7f7464a
FK		 2240}
2241
2242static Property virtio_serial_pci_properties[] = {
2243 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
2244 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
2245 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
c7bcc85d 2246 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
f7f7464a
FK		 2247 DEFINE_PROP_END_OF_LIST(),
2248};
2249
2250static void virtio_serial_pci_class_init(ObjectClass *klass, void *data)
2251{
2252 DeviceClass *dc = DEVICE_CLASS(klass);
2253 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2254 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
fc079951 2255 k->realize = virtio_serial_pci_realize;
125ee0ed 2256 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
f7f7464a
FK		 2257 dc->props = virtio_serial_pci_properties;
2258 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2259 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_CONSOLE;
2260 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2261 pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER;
2262}
2263
2264static void virtio_serial_pci_instance_init(Object *obj)
2265{
2266 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(obj);
c8075caf
GA		 2267
2268 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2269 TYPE_VIRTIO_SERIAL);
f7f7464a
FK		 2270}
2271
2272static const TypeInfo virtio_serial_pci_info = {
2273 .name = TYPE_VIRTIO_SERIAL_PCI,
2274 .parent = TYPE_VIRTIO_PCI,
2275 .instance_size = sizeof(VirtIOSerialPCI),
2276 .instance_init = virtio_serial_pci_instance_init,
2277 .class_init = virtio_serial_pci_class_init,
2278};
2279
e37da394
FK		 2280/* virtio-net-pci */
2281
2282static Property virtio_net_properties[] = {
2283 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
4a3f03ba 2284 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
e37da394 2285 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
e37da394
FK		 2286 DEFINE_PROP_END_OF_LIST(),
2287};
2288
fc079951 2289static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
e37da394 2290{
800ced8c 2291 DeviceState *qdev = DEVICE(vpci_dev);
e37da394
FK		 2292 VirtIONetPCI *dev = VIRTIO_NET_PCI(vpci_dev);
2293 DeviceState *vdev = DEVICE(&dev->vdev);
2294
800ced8c
FK		 2295 virtio_net_set_netclient_name(&dev->vdev, qdev->id,
2296 object_get_typename(OBJECT(qdev)));
e37da394 2297 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951 2298 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
e37da394
FK		 2299}
2300
2301static void virtio_net_pci_class_init(ObjectClass *klass, void *data)
2302{
2303 DeviceClass *dc = DEVICE_CLASS(klass);
2304 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
2305 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
2306
2307 k->romfile = "efi-virtio.rom";
2308 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2309 k->device_id = PCI_DEVICE_ID_VIRTIO_NET;
2310 k->revision = VIRTIO_PCI_ABI_VERSION;
2311 k->class_id = PCI_CLASS_NETWORK_ETHERNET;
125ee0ed 2312 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
e37da394 2313 dc->props = virtio_net_properties;
fc079951 2314 vpciklass->realize = virtio_net_pci_realize;
e37da394
FK		 2315}
2316
2317static void virtio_net_pci_instance_init(Object *obj)
2318{
2319 VirtIONetPCI *dev = VIRTIO_NET_PCI(obj);
c8075caf
GA		 2320
2321 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2322 TYPE_VIRTIO_NET);
0cf63c3e
GA		 2323 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
2324 "bootindex", &error_abort);
e37da394
FK		 2325}
2326
2327static const TypeInfo virtio_net_pci_info = {
2328 .name = TYPE_VIRTIO_NET_PCI,
2329 .parent = TYPE_VIRTIO_PCI,
2330 .instance_size = sizeof(VirtIONetPCI),
2331 .instance_init = virtio_net_pci_instance_init,
2332 .class_init = virtio_net_pci_class_init,
2333};
2334
59ccd20a
FK		 2335/* virtio-rng-pci */
2336
fc079951 2337static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
59ccd20a
FK		 2338{
2339 VirtIORngPCI *vrng = VIRTIO_RNG_PCI(vpci_dev);
2340 DeviceState *vdev = DEVICE(&vrng->vdev);
fc079951 2341 Error *err = NULL;
59ccd20a
FK		 2342
2343 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
fc079951
MA		 2344 object_property_set_bool(OBJECT(vdev), true, "realized", &err);
2345 if (err) {
2346 error_propagate(errp, err);
2347 return;
59ccd20a
FK		 2348 }
2349
2350 object_property_set_link(OBJECT(vrng),
5b456438 2351 OBJECT(vrng->vdev.conf.rng), "rng",
59ccd20a 2352 NULL);
59ccd20a
FK		 2353}
2354
2355static void virtio_rng_pci_class_init(ObjectClass *klass, void *data)
2356{
2357 DeviceClass *dc = DEVICE_CLASS(klass);
2358 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2359 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2360
fc079951 2361 k->realize = virtio_rng_pci_realize;
125ee0ed 2362 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
59ccd20a
FK		 2363
2364 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2365 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_RNG;
2366 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2367 pcidev_k->class_id = PCI_CLASS_OTHERS;
2368}
2369
2370static void virtio_rng_initfn(Object *obj)
2371{
2372 VirtIORngPCI *dev = VIRTIO_RNG_PCI(obj);
c8075caf
GA		 2373
2374 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2375 TYPE_VIRTIO_RNG);
cbd5ac69
PB		 2376 object_property_add_alias(obj, "rng", OBJECT(&dev->vdev), "rng",
2377 &error_abort);
59ccd20a
FK		 2378}
2379
2380static const TypeInfo virtio_rng_pci_info = {
2381 .name = TYPE_VIRTIO_RNG_PCI,
2382 .parent = TYPE_VIRTIO_PCI,
2383 .instance_size = sizeof(VirtIORngPCI),
2384 .instance_init = virtio_rng_initfn,
2385 .class_init = virtio_rng_pci_class_init,
2386};
2387
f958c8aa
GH		 2388/* virtio-input-pci */
2389
6f2b9a5b 2390static Property virtio_input_pci_properties[] = {
710e2d90
GH		 2391 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
2392 DEFINE_PROP_END_OF_LIST(),
2393};
2394
f958c8aa
GH		 2395static void virtio_input_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
2396{
2397 VirtIOInputPCI *vinput = VIRTIO_INPUT_PCI(vpci_dev);
2398 DeviceState *vdev = DEVICE(&vinput->vdev);
2399
2400 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
9a4c0e22 2401 virtio_pci_force_virtio_1(vpci_dev);
f958c8aa
GH		 2402 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
2403}
2404
2405static void virtio_input_pci_class_init(ObjectClass *klass, void *data)
2406{
2407 DeviceClass *dc = DEVICE_CLASS(klass);
2408 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2409 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2410
6f2b9a5b 2411 dc->props = virtio_input_pci_properties;
f958c8aa
GH		 2412 k->realize = virtio_input_pci_realize;
2413 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
2414
2415 pcidev_k->class_id = PCI_CLASS_INPUT_OTHER;
2416}
2417
710e2d90
GH		 2418static void virtio_input_hid_kbd_pci_class_init(ObjectClass *klass, void *data)
2419{
2420 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2421
2422 pcidev_k->class_id = PCI_CLASS_INPUT_KEYBOARD;
2423}
2424
2425static void virtio_input_hid_mouse_pci_class_init(ObjectClass *klass,
2426 void *data)
2427{
2428 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2429
2430 pcidev_k->class_id = PCI_CLASS_INPUT_MOUSE;
2431}
2432
2433static void virtio_keyboard_initfn(Object *obj)
2434{
2435 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
6f2b9a5b
GH		 2436
2437 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2438 TYPE_VIRTIO_KEYBOARD);
710e2d90
GH		 2439}
2440
2441static void virtio_mouse_initfn(Object *obj)
2442{
2443 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
6f2b9a5b
GH		 2444
2445 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2446 TYPE_VIRTIO_MOUSE);
710e2d90
GH		 2447}
2448
2449static void virtio_tablet_initfn(Object *obj)
2450{
2451 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
6f2b9a5b
GH		 2452
2453 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2454 TYPE_VIRTIO_TABLET);
710e2d90
GH		 2455}
2456
f958c8aa
GH		 2457static const TypeInfo virtio_input_pci_info = {
2458 .name = TYPE_VIRTIO_INPUT_PCI,
2459 .parent = TYPE_VIRTIO_PCI,
2460 .instance_size = sizeof(VirtIOInputPCI),
2461 .class_init = virtio_input_pci_class_init,
2462 .abstract = true,
2463};
2464
710e2d90
GH		 2465static const TypeInfo virtio_input_hid_pci_info = {
2466 .name = TYPE_VIRTIO_INPUT_HID_PCI,
2467 .parent = TYPE_VIRTIO_INPUT_PCI,
2468 .instance_size = sizeof(VirtIOInputHIDPCI),
710e2d90
GH		 2469 .abstract = true,
2470};
2471
2472static const TypeInfo virtio_keyboard_pci_info = {
2473 .name = TYPE_VIRTIO_KEYBOARD_PCI,
2474 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2475 .class_init = virtio_input_hid_kbd_pci_class_init,
2476 .instance_size = sizeof(VirtIOInputHIDPCI),
2477 .instance_init = virtio_keyboard_initfn,
2478};
2479
2480static const TypeInfo virtio_mouse_pci_info = {
2481 .name = TYPE_VIRTIO_MOUSE_PCI,
2482 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2483 .class_init = virtio_input_hid_mouse_pci_class_init,
2484 .instance_size = sizeof(VirtIOInputHIDPCI),
2485 .instance_init = virtio_mouse_initfn,
2486};
2487
2488static const TypeInfo virtio_tablet_pci_info = {
2489 .name = TYPE_VIRTIO_TABLET_PCI,
2490 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2491 .instance_size = sizeof(VirtIOInputHIDPCI),
2492 .instance_init = virtio_tablet_initfn,
2493};
2494
c6047e96
MA		 2495#ifdef CONFIG_LINUX
2496static void virtio_host_initfn(Object *obj)
2497{
2498 VirtIOInputHostPCI *dev = VIRTIO_INPUT_HOST_PCI(obj);
2499
2500 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2501 TYPE_VIRTIO_INPUT_HOST);
2502}
2503
006a5ede
GH		 2504static const TypeInfo virtio_host_pci_info = {
2505 .name = TYPE_VIRTIO_INPUT_HOST_PCI,
2506 .parent = TYPE_VIRTIO_INPUT_PCI,
2507 .instance_size = sizeof(VirtIOInputHostPCI),
2508 .instance_init = virtio_host_initfn,
2509};
c6047e96 2510#endif
006a5ede 2511
0a2acf5e
FK		 2512/* virtio-pci-bus */
2513
ac7af112
AF		 2514static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
2515 VirtIOPCIProxy *dev)
0a2acf5e
FK		 2516{
2517 DeviceState *qdev = DEVICE(dev);
f4dd69aa
FK		 2518 char virtio_bus_name[] = "virtio-bus";
2519
fb17dfe0 2520 qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev,
f4dd69aa 2521 virtio_bus_name);
0a2acf5e
FK		 2522}
2523
2524static void virtio_pci_bus_class_init(ObjectClass *klass, void *data)
2525{
2526 BusClass *bus_class = BUS_CLASS(klass);
2527 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass);
2528 bus_class->max_dev = 1;
2529 k->notify = virtio_pci_notify;
2530 k->save_config = virtio_pci_save_config;
2531 k->load_config = virtio_pci_load_config;
2532 k->save_queue = virtio_pci_save_queue;
2533 k->load_queue = virtio_pci_load_queue;
a6df8adf
JW		 2534 k->save_extra_state = virtio_pci_save_extra_state;
2535 k->load_extra_state = virtio_pci_load_extra_state;
2536 k->has_extra_state = virtio_pci_has_extra_state;
0a2acf5e 2537 k->query_guest_notifiers = virtio_pci_query_guest_notifiers;
0a2acf5e
FK		 2538 k->set_guest_notifiers = virtio_pci_set_guest_notifiers;
2539 k->vmstate_change = virtio_pci_vmstate_change;
d1b4259f 2540 k->pre_plugged = virtio_pci_pre_plugged;
085bccb7 2541 k->device_plugged = virtio_pci_device_plugged;
06a13073 2542 k->device_unplugged = virtio_pci_device_unplugged;
e0d686bf 2543 k->query_nvectors = virtio_pci_query_nvectors;
8e93cef1 2544 k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled;
9f06e71a 2545 k->ioeventfd_assign = virtio_pci_ioeventfd_assign;
8607f5c3 2546 k->get_dma_as = virtio_pci_get_dma_as;
0a2acf5e
FK		 2547}
2548
2549static const TypeInfo virtio_pci_bus_info = {
2550 .name = TYPE_VIRTIO_PCI_BUS,
2551 .parent = TYPE_VIRTIO_BUS,
2552 .instance_size = sizeof(VirtioPCIBusState),
2553 .class_init = virtio_pci_bus_class_init,
2554};
2555
83f7d43a 2556static void virtio_pci_register_types(void)
53c25cea 2557{
59ccd20a 2558 type_register_static(&virtio_rng_pci_info);
f958c8aa 2559 type_register_static(&virtio_input_pci_info);
710e2d90
GH		 2560 type_register_static(&virtio_input_hid_pci_info);
2561 type_register_static(&virtio_keyboard_pci_info);
2562 type_register_static(&virtio_mouse_pci_info);
2563 type_register_static(&virtio_tablet_pci_info);
c6047e96 2564#ifdef CONFIG_LINUX
006a5ede 2565 type_register_static(&virtio_host_pci_info);
c6047e96 2566#endif
0a2acf5e 2567 type_register_static(&virtio_pci_bus_info);
085bccb7 2568 type_register_static(&virtio_pci_info);
60653b28 2569#ifdef CONFIG_VIRTFS
234a336f 2570 type_register_static(&virtio_9p_pci_info);
60653b28 2571#endif
653ced07 2572 type_register_static(&virtio_blk_pci_info);
bc7b90a0 2573 type_register_static(&virtio_scsi_pci_info);
e378e88d 2574 type_register_static(&virtio_balloon_pci_info);
f7f7464a 2575 type_register_static(&virtio_serial_pci_info);
e37da394 2576 type_register_static(&virtio_net_pci_info);
50787628
NB		 2577#ifdef CONFIG_VHOST_SCSI
2578 type_register_static(&vhost_scsi_pci_info);
2579#endif
fc0b9b0e
SH		 2580#ifdef CONFIG_VHOST_VSOCK
2581 type_register_static(&vhost_vsock_pci_info);
2582#endif
53c25cea
PB		 2583}
2584
83f7d43a 2585type_init(virtio_pci_register_types)
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