[mirror_qemu.git] / hw / virtio-pci.c

/*
 * Virtio PCI Bindings
 *
 * Copyright IBM, Corp. 2007
 * Copyright (c) 2009 CodeSourcery
 *
 * Authors:
 *  Anthony Liguori   <aliguori@us.ibm.com>
 *  Paul Brook        <paul@codesourcery.com>
 *
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 *
 */

#include <inttypes.h>

#include "virtio.h"
#include "pci.h"
//#include "sysemu.h"
#include "msix.h"

/* from Linux's linux/virtio_pci.h */

/* A 32-bit r/o bitmask of the features supported by the host */
#define VIRTIO_PCI_HOST_FEATURES        0

/* A 32-bit r/w bitmask of features activated by the guest */
#define VIRTIO_PCI_GUEST_FEATURES       4

/* A 32-bit r/w PFN for the currently selected queue */
#define VIRTIO_PCI_QUEUE_PFN            8

/* A 16-bit r/o queue size for the currently selected queue */
#define VIRTIO_PCI_QUEUE_NUM            12

/* A 16-bit r/w queue selector */
#define VIRTIO_PCI_QUEUE_SEL            14

/* A 16-bit r/w queue notifier */
#define VIRTIO_PCI_QUEUE_NOTIFY         16

/* An 8-bit device status register.  */
#define VIRTIO_PCI_STATUS               18

/* An 8-bit r/o interrupt status register.  Reading the value will return the
 * current contents of the ISR and will also clear it.  This is effectively
 * a read-and-acknowledge. */
#define VIRTIO_PCI_ISR                  19

/* MSI-X registers: only enabled if MSI-X is enabled. */
/* A 16-bit vector for configuration changes. */
#define VIRTIO_MSI_CONFIG_VECTOR        20
/* A 16-bit vector for selected queue notifications. */
#define VIRTIO_MSI_QUEUE_VECTOR         22

/* Config space size */
#define VIRTIO_PCI_CONFIG_NOMSI         20
#define VIRTIO_PCI_CONFIG_MSI           24
#define VIRTIO_PCI_REGION_SIZE(dev)     (msix_present(dev) ? \
                                         VIRTIO_PCI_CONFIG_MSI : \
                                         VIRTIO_PCI_CONFIG_NOMSI)

/* The remaining space is defined by each driver as the per-driver
 * configuration space */
#define VIRTIO_PCI_CONFIG(dev)          (msix_enabled(dev) ? \
                                         VIRTIO_PCI_CONFIG_MSI : \
                                         VIRTIO_PCI_CONFIG_NOMSI)

/* Virtio ABI version, if we increment this, we break the guest driver. */
#define VIRTIO_PCI_ABI_VERSION          0

/* How many bits to shift physical queue address written to QUEUE_PFN.
 * 12 is historical, and due to x86 page size. */
#define VIRTIO_PCI_QUEUE_ADDR_SHIFT    12

/* QEMU doesn't strictly need write barriers since everything runs in
 * lock-step.  We'll leave the calls to wmb() in though to make it obvious for
 * KVM or if kqemu gets SMP support.
 */
#define wmb() do { } while (0)

/* PCI bindings.  */

typedef struct {
    PCIDevice pci_dev;
    VirtIODevice *vdev;
    uint32_t addr;

    uint16_t vendor;
    uint16_t device;
    uint16_t subvendor;
    uint16_t class_code;
    uint8_t pif;
} VirtIOPCIProxy;

/* virtio device */

static void virtio_pci_notify(void *opaque, uint16_t vector)
{
    VirtIOPCIProxy *proxy = opaque;
    if (msix_enabled(&proxy->pci_dev))
        msix_notify(&proxy->pci_dev, vector);
    else
        qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
}

static void virtio_pci_reset(void *opaque)
{
    VirtIOPCIProxy *proxy = opaque;
    virtio_reset(proxy->vdev);
    msix_reset(&proxy->pci_dev);
}

static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
{
    VirtIOPCIProxy *proxy = opaque;
    VirtIODevice *vdev = proxy->vdev;
    target_phys_addr_t pa;

    switch (addr) {
    case VIRTIO_PCI_GUEST_FEATURES:
	/* Guest does not negotiate properly?  We have to assume nothing. */
	if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
	    if (vdev->bad_features)
		val = vdev->bad_features(vdev);
	    else
		val = 0;
	}
        if (vdev->set_features)
            vdev->set_features(vdev, val);
        vdev->features = val;
        break;
    case VIRTIO_PCI_QUEUE_PFN:
        pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
        if (pa == 0)
            virtio_pci_reset(proxy);
        else
            virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
        break;
    case VIRTIO_PCI_QUEUE_SEL:
        if (val < VIRTIO_PCI_QUEUE_MAX)
            vdev->queue_sel = val;
        break;
    case VIRTIO_PCI_QUEUE_NOTIFY:
        virtio_queue_notify(vdev, val);
        break;
    case VIRTIO_PCI_STATUS:
        vdev->status = val & 0xFF;
        if (vdev->status == 0)
            virtio_pci_reset(proxy);
        break;
    case VIRTIO_MSI_CONFIG_VECTOR:
        msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
        /* Make it possible for guest to discover an error took place. */
        if (msix_vector_use(&proxy->pci_dev, val) < 0)
            val = VIRTIO_NO_VECTOR;
        vdev->config_vector = val;
        break;
    case VIRTIO_MSI_QUEUE_VECTOR:
        msix_vector_unuse(&proxy->pci_dev,
                          virtio_queue_vector(vdev, vdev->queue_sel));
        /* Make it possible for guest to discover an error took place. */
        if (msix_vector_use(&proxy->pci_dev, val) < 0)
            val = VIRTIO_NO_VECTOR;
        virtio_queue_set_vector(vdev, vdev->queue_sel, val);
        break;
    default:
        fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
                __func__, addr, val);
        break;
    }
}

static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
{
    VirtIODevice *vdev = proxy->vdev;
    uint32_t ret = 0xFFFFFFFF;

    switch (addr) {
    case VIRTIO_PCI_HOST_FEATURES:
        ret = vdev->get_features(vdev);
        ret |= (1 << VIRTIO_F_NOTIFY_ON_EMPTY);
        ret |= (1 << VIRTIO_RING_F_INDIRECT_DESC);
        ret |= (1 << VIRTIO_F_BAD_FEATURE);
        break;
    case VIRTIO_PCI_GUEST_FEATURES:
        ret = vdev->features;
        break;
    case VIRTIO_PCI_QUEUE_PFN:
        ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
              >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
        break;
    case VIRTIO_PCI_QUEUE_NUM:
        ret = virtio_queue_get_num(vdev, vdev->queue_sel);
        break;
    case VIRTIO_PCI_QUEUE_SEL:
        ret = vdev->queue_sel;
        break;
    case VIRTIO_PCI_STATUS:
        ret = vdev->status;
        break;
    case VIRTIO_PCI_ISR:
        /* reading from the ISR also clears it. */
        ret = vdev->isr;
        vdev->isr = 0;
        qemu_set_irq(proxy->pci_dev.irq[0], 0);
        break;
    case VIRTIO_MSI_CONFIG_VECTOR:
        ret = vdev->config_vector;
        break;
    case VIRTIO_MSI_QUEUE_VECTOR:
        ret = virtio_queue_vector(vdev, vdev->queue_sel);
        break;
    default:
        break;
    }

    return ret;
}

static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config)
        return virtio_ioport_read(proxy, addr);
    addr -= config;
    return virtio_config_readb(proxy->vdev, addr);
}

static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config)
        return virtio_ioport_read(proxy, addr);
    addr -= config;
    return virtio_config_readw(proxy->vdev, addr);
}

static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config)
        return virtio_ioport_read(proxy, addr);
    addr -= config;
    return virtio_config_readl(proxy->vdev, addr);
}

static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config) {
        virtio_ioport_write(proxy, addr, val);
        return;
    }
    addr -= config;
    virtio_config_writeb(proxy->vdev, addr, val);
}

static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config) {
        virtio_ioport_write(proxy, addr, val);
        return;
    }
    addr -= config;
    virtio_config_writew(proxy->vdev, addr, val);
}

static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config) {
        virtio_ioport_write(proxy, addr, val);
        return;
    }
    addr -= config;
    virtio_config_writel(proxy->vdev, addr, val);
}

static void virtio_map(PCIDevice *pci_dev, int region_num,
                       uint32_t addr, uint32_t size, int type)
{
    VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
    VirtIODevice *vdev = proxy->vdev;
    unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;

    proxy->addr = addr;

    register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
    register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
    register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
    register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
    register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
    register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);

    if (vdev->config_len)
        vdev->get_config(vdev, vdev->config);
}

static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
                                uint32_t val, int len)
{
    pci_default_write_config(pci_dev, address, val, len);
    msix_write_config(pci_dev, address, val, len);
}

static const VirtIOBindings virtio_pci_bindings = {
    .notify = virtio_pci_notify
};

static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
                            uint16_t vendor, uint16_t device,
                            uint16_t class_code, uint8_t pif)
{
    uint8_t *config;
    uint32_t size;

    proxy->vdev = vdev;

    config = proxy->pci_dev.config;
    pci_config_set_vendor_id(config, vendor);
    pci_config_set_device_id(config, device);

    config[0x08] = VIRTIO_PCI_ABI_VERSION;

    config[0x09] = pif;
    pci_config_set_class(config, class_code);
    config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;

    config[0x2c] = vendor & 0xFF;
    config[0x2d] = (vendor >> 8) & 0xFF;
    config[0x2e] = vdev->device_id & 0xFF;
    config[0x2f] = (vdev->device_id >> 8) & 0xFF;

    config[0x3d] = 1;

    if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
        pci_register_bar(&proxy->pci_dev, 1,
                         msix_bar_size(&proxy->pci_dev),
                         PCI_ADDRESS_SPACE_MEM,
                         msix_mmio_map);
        proxy->pci_dev.config_write = virtio_write_config;
        proxy->pci_dev.unregister = msix_uninit;
    } else
        vdev->nvectors = 0;

    size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
    if (size & (size-1))
        size = 1 << qemu_fls(size);

    pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
                           virtio_map);

    qemu_register_reset(virtio_pci_reset, 0, proxy);

    virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
}

static void virtio_blk_init_pci(PCIDevice *pci_dev)
{
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
    VirtIODevice *vdev;

    vdev = virtio_blk_init(&pci_dev->qdev);
    virtio_init_pci(proxy, vdev,
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
                    PCI_DEVICE_ID_VIRTIO_BLOCK,
                    PCI_CLASS_STORAGE_OTHER,
                    0x00);
}

static void virtio_console_init_pci(PCIDevice *pci_dev)
{
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
    VirtIODevice *vdev;

    vdev = virtio_console_init(&pci_dev->qdev);
    virtio_init_pci(proxy, vdev,
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
                    PCI_DEVICE_ID_VIRTIO_CONSOLE,
                    PCI_CLASS_DISPLAY_OTHER,
                    0x00);
}

static void virtio_net_init_pci(PCIDevice *pci_dev)
{
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
    VirtIODevice *vdev;

    vdev = virtio_net_init(&pci_dev->qdev);
    virtio_init_pci(proxy, vdev,
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
                    PCI_DEVICE_ID_VIRTIO_NET,
                    PCI_CLASS_NETWORK_ETHERNET,
                    0x00);
}

static void virtio_balloon_init_pci(PCIDevice *pci_dev)
{
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
    VirtIODevice *vdev;

    vdev = virtio_balloon_init(&pci_dev->qdev);
    virtio_init_pci(proxy, vdev,
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
                    PCI_DEVICE_ID_VIRTIO_BALLOON,
                    PCI_CLASS_MEMORY_RAM,
                    0x00);
}

static void virtio_pci_register_devices(void)
{
    pci_qdev_register("virtio-blk-pci", sizeof(VirtIOPCIProxy),
                      virtio_blk_init_pci);
    pci_qdev_register("virtio-net-pci", sizeof(VirtIOPCIProxy),
                      virtio_net_init_pci);
    pci_qdev_register("virtio-console-pci", sizeof(VirtIOPCIProxy),
                      virtio_console_init_pci);
    pci_qdev_register("virtio-balloon-pci", sizeof(VirtIOPCIProxy),
                      virtio_balloon_init_pci);
}

device_init(virtio_pci_register_devices)
Commit	Line	Data
53c25cea PB	1	/*
	2	* Virtio PCI Bindings
	3	*
	4	* Copyright IBM, Corp. 2007
	5	* Copyright (c) 2009 CodeSourcery
	6	*
	7	* Authors:
	8	* Anthony Liguori <aliguori@us.ibm.com>
	9	* Paul Brook <paul@codesourcery.com>
	10	*
	11	* This work is licensed under the terms of the GNU GPL, version 2. See
	12	* the COPYING file in the top-level directory.
	13	*
	14	*/
	15
	16	#include <inttypes.h>
	17
	18	#include "virtio.h"
	19	#include "pci.h"
1ad2134f	20	//#include "sysemu.h"
aba800a3	21	#include "msix.h"
53c25cea PB	22
	23	/* from Linux's linux/virtio_pci.h */
	24
	25	/* A 32-bit r/o bitmask of the features supported by the host */
	26	#define VIRTIO_PCI_HOST_FEATURES 0
	27
	28	/* A 32-bit r/w bitmask of features activated by the guest */
	29	#define VIRTIO_PCI_GUEST_FEATURES 4
	30
	31	/* A 32-bit r/w PFN for the currently selected queue */
	32	#define VIRTIO_PCI_QUEUE_PFN 8
	33
	34	/* A 16-bit r/o queue size for the currently selected queue */
	35	#define VIRTIO_PCI_QUEUE_NUM 12
	36
	37	/* A 16-bit r/w queue selector */
	38	#define VIRTIO_PCI_QUEUE_SEL 14
	39
	40	/* A 16-bit r/w queue notifier */
	41	#define VIRTIO_PCI_QUEUE_NOTIFY 16
	42
	43	/* An 8-bit device status register. */
	44	#define VIRTIO_PCI_STATUS 18
	45
	46	/* An 8-bit r/o interrupt status register. Reading the value will return the
	47	* current contents of the ISR and will also clear it. This is effectively
	48	* a read-and-acknowledge. */
	49	#define VIRTIO_PCI_ISR 19
	50
aba800a3 MT	51	/* MSI-X registers: only enabled if MSI-X is enabled. */
	52	/* A 16-bit vector for configuration changes. */
	53	#define VIRTIO_MSI_CONFIG_VECTOR 20
	54	/* A 16-bit vector for selected queue notifications. */
	55	#define VIRTIO_MSI_QUEUE_VECTOR 22
	56
	57	/* Config space size */
	58	#define VIRTIO_PCI_CONFIG_NOMSI 20
	59	#define VIRTIO_PCI_CONFIG_MSI 24
	60	#define VIRTIO_PCI_REGION_SIZE(dev) (msix_present(dev) ? \
	61	VIRTIO_PCI_CONFIG_MSI : \
	62	VIRTIO_PCI_CONFIG_NOMSI)
	63
	64	/* The remaining space is defined by each driver as the per-driver
	65	* configuration space */
	66	#define VIRTIO_PCI_CONFIG(dev) (msix_enabled(dev) ? \
	67	VIRTIO_PCI_CONFIG_MSI : \
	68	VIRTIO_PCI_CONFIG_NOMSI)
53c25cea PB	69
	70	/* Virtio ABI version, if we increment this, we break the guest driver. */
	71	#define VIRTIO_PCI_ABI_VERSION 0
	72
	73	/* How many bits to shift physical queue address written to QUEUE_PFN.
	74	* 12 is historical, and due to x86 page size. */
	75	#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
	76
	77	/* QEMU doesn't strictly need write barriers since everything runs in
	78	* lock-step. We'll leave the calls to wmb() in though to make it obvious for
	79	* KVM or if kqemu gets SMP support.
	80	*/
	81	#define wmb() do { } while (0)
	82
	83	/* PCI bindings. */
	84
	85	typedef struct {
	86	PCIDevice pci_dev;
	87	VirtIODevice *vdev;
	88	uint32_t addr;
	89
	90	uint16_t vendor;
	91	uint16_t device;
	92	uint16_t subvendor;
	93	uint16_t class_code;
	94	uint8_t pif;
	95	} VirtIOPCIProxy;
	96
	97	/* virtio device */
	98
7055e687	99	static void virtio_pci_notify(void *opaque, uint16_t vector)
53c25cea PB	100	{
53c25cea PB	101	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	102	if (msix_enabled(&proxy->pci_dev))
	103	msix_notify(&proxy->pci_dev, vector);
	104	else
	105	qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
53c25cea PB	106	}
53c25cea PB	107
7055e687 MT	108	static void virtio_pci_reset(void *opaque)
	109	{
	110	VirtIOPCIProxy *proxy = opaque;
	111	virtio_reset(proxy->vdev);
aba800a3	112	msix_reset(&proxy->pci_dev);
7055e687 MT	113	}
7055e687 MT	114
53c25cea PB	115	static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
	116	{
	117	VirtIOPCIProxy *proxy = opaque;
	118	VirtIODevice *vdev = proxy->vdev;
	119	target_phys_addr_t pa;
	120
53c25cea PB	121	switch (addr) {
	122	case VIRTIO_PCI_GUEST_FEATURES:
	123	/* Guest does not negotiate properly? We have to assume nothing. */
	124	if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
	125	if (vdev->bad_features)
	126	val = vdev->bad_features(vdev);
	127	else
	128	val = 0;
	129	}
	130	if (vdev->set_features)
	131	vdev->set_features(vdev, val);
	132	vdev->features = val;
	133	break;
	134	case VIRTIO_PCI_QUEUE_PFN:
	135	pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
7055e687 MT	136	if (pa == 0)
	137	virtio_pci_reset(proxy);
	138	else
	139	virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
53c25cea PB	140	break;
	141	case VIRTIO_PCI_QUEUE_SEL:
	142	if (val < VIRTIO_PCI_QUEUE_MAX)
	143	vdev->queue_sel = val;
	144	break;
	145	case VIRTIO_PCI_QUEUE_NOTIFY:
	146	virtio_queue_notify(vdev, val);
	147	break;
	148	case VIRTIO_PCI_STATUS:
	149	vdev->status = val & 0xFF;
	150	if (vdev->status == 0)
7055e687	151	virtio_pci_reset(proxy);
53c25cea	152	break;
aba800a3 MT	153	case VIRTIO_MSI_CONFIG_VECTOR:
	154	msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
	155	/* Make it possible for guest to discover an error took place. */
	156	if (msix_vector_use(&proxy->pci_dev, val) < 0)
	157	val = VIRTIO_NO_VECTOR;
	158	vdev->config_vector = val;
	159	break;
	160	case VIRTIO_MSI_QUEUE_VECTOR:
	161	msix_vector_unuse(&proxy->pci_dev,
	162	virtio_queue_vector(vdev, vdev->queue_sel));
	163	/* Make it possible for guest to discover an error took place. */
	164	if (msix_vector_use(&proxy->pci_dev, val) < 0)
	165	val = VIRTIO_NO_VECTOR;
	166	virtio_queue_set_vector(vdev, vdev->queue_sel, val);
	167	break;
	168	default:
	169	fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
	170	__func__, addr, val);
	171	break;
53c25cea PB	172	}
	173	}
	174
aba800a3	175	static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
53c25cea	176	{
53c25cea PB	177	VirtIODevice *vdev = proxy->vdev;
	178	uint32_t ret = 0xFFFFFFFF;
	179
53c25cea PB	180	switch (addr) {
	181	case VIRTIO_PCI_HOST_FEATURES:
	182	ret = vdev->get_features(vdev);
efeea6d0 MM	183	ret \|= (1 << VIRTIO_F_NOTIFY_ON_EMPTY);
	184	ret \|= (1 << VIRTIO_RING_F_INDIRECT_DESC);
	185	ret \|= (1 << VIRTIO_F_BAD_FEATURE);
53c25cea PB	186	break;
	187	case VIRTIO_PCI_GUEST_FEATURES:
	188	ret = vdev->features;
	189	break;
	190	case VIRTIO_PCI_QUEUE_PFN:
	191	ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
	192	>> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
	193	break;
	194	case VIRTIO_PCI_QUEUE_NUM:
	195	ret = virtio_queue_get_num(vdev, vdev->queue_sel);
	196	break;
	197	case VIRTIO_PCI_QUEUE_SEL:
	198	ret = vdev->queue_sel;
	199	break;
	200	case VIRTIO_PCI_STATUS:
	201	ret = vdev->status;
	202	break;
	203	case VIRTIO_PCI_ISR:
	204	/* reading from the ISR also clears it. */
	205	ret = vdev->isr;
	206	vdev->isr = 0;
7055e687	207	qemu_set_irq(proxy->pci_dev.irq[0], 0);
53c25cea	208	break;
aba800a3 MT	209	case VIRTIO_MSI_CONFIG_VECTOR:
	210	ret = vdev->config_vector;
	211	break;
	212	case VIRTIO_MSI_QUEUE_VECTOR:
	213	ret = virtio_queue_vector(vdev, vdev->queue_sel);
	214	break;
53c25cea PB	215	default:
	216	break;
	217	}
	218
	219	return ret;
	220	}
	221
	222	static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
	223	{
	224	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	225	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	226	addr -= proxy->addr;
	227	if (addr < config)
	228	return virtio_ioport_read(proxy, addr);
	229	addr -= config;
53c25cea PB	230	return virtio_config_readb(proxy->vdev, addr);
	231	}
	232
	233	static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
	234	{
	235	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	236	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	237	addr -= proxy->addr;
	238	if (addr < config)
	239	return virtio_ioport_read(proxy, addr);
	240	addr -= config;
53c25cea PB	241	return virtio_config_readw(proxy->vdev, addr);
	242	}
	243
	244	static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
	245	{
	246	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	247	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	248	addr -= proxy->addr;
	249	if (addr < config)
	250	return virtio_ioport_read(proxy, addr);
	251	addr -= config;
53c25cea PB	252	return virtio_config_readl(proxy->vdev, addr);
	253	}
	254
	255	static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
	256	{
	257	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	258	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	259	addr -= proxy->addr;
	260	if (addr < config) {
	261	virtio_ioport_write(proxy, addr, val);
	262	return;
	263	}
	264	addr -= config;
53c25cea PB	265	virtio_config_writeb(proxy->vdev, addr, val);
	266	}
	267
	268	static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
	269	{
	270	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	271	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	272	addr -= proxy->addr;
	273	if (addr < config) {
	274	virtio_ioport_write(proxy, addr, val);
	275	return;
	276	}
	277	addr -= config;
53c25cea PB	278	virtio_config_writew(proxy->vdev, addr, val);
	279	}
	280
	281	static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
	282	{
	283	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	284	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	285	addr -= proxy->addr;
	286	if (addr < config) {
	287	virtio_ioport_write(proxy, addr, val);
	288	return;
	289	}
	290	addr -= config;
53c25cea PB	291	virtio_config_writel(proxy->vdev, addr, val);
	292	}
	293
	294	static void virtio_map(PCIDevice *pci_dev, int region_num,
	295	uint32_t addr, uint32_t size, int type)
	296	{
	297	VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
	298	VirtIODevice *vdev = proxy->vdev;
aba800a3	299	unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;
53c25cea PB	300
53c25cea PB	301	proxy->addr = addr;
53c25cea	302
aba800a3 MT	303	register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
	304	register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
	305	register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
	306	register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
	307	register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
	308	register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);
53c25cea	309
aba800a3	310	if (vdev->config_len)
53c25cea	311	vdev->get_config(vdev, vdev->config);
aba800a3 MT	312	}
	313
	314	static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
	315	uint32_t val, int len)
	316	{
	317	pci_default_write_config(pci_dev, address, val, len);
	318	msix_write_config(pci_dev, address, val, len);
53c25cea PB	319	}
	320
	321	static const VirtIOBindings virtio_pci_bindings = {
7055e687	322	.notify = virtio_pci_notify
53c25cea PB	323	};
	324
	325	static void virtio_init_pci(VirtIOPCIProxy proxy, VirtIODevice vdev,
	326	uint16_t vendor, uint16_t device,
	327	uint16_t class_code, uint8_t pif)
	328	{
	329	uint8_t *config;
	330	uint32_t size;
	331
	332	proxy->vdev = vdev;
	333
	334	config = proxy->pci_dev.config;
	335	pci_config_set_vendor_id(config, vendor);
	336	pci_config_set_device_id(config, device);
	337
	338	config[0x08] = VIRTIO_PCI_ABI_VERSION;
	339
	340	config[0x09] = pif;
	341	pci_config_set_class(config, class_code);
	342	config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
	343
	344	config[0x2c] = vendor & 0xFF;
	345	config[0x2d] = (vendor >> 8) & 0xFF;
	346	config[0x2e] = vdev->device_id & 0xFF;
	347	config[0x2f] = (vdev->device_id >> 8) & 0xFF;
	348
	349	config[0x3d] = 1;
	350
aba800a3 MT	351	if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
	352	pci_register_bar(&proxy->pci_dev, 1,
	353	msix_bar_size(&proxy->pci_dev),
	354	PCI_ADDRESS_SPACE_MEM,
	355	msix_mmio_map);
	356	proxy->pci_dev.config_write = virtio_write_config;
	357	proxy->pci_dev.unregister = msix_uninit;
	358	} else
	359	vdev->nvectors = 0;
	360
	361	size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
53c25cea PB	362	if (size & (size-1))
	363	size = 1 << qemu_fls(size);
	364
28c2c264	365	pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
53c25cea PB	366	virtio_map);
53c25cea PB	367
7055e687 MT	368	qemu_register_reset(virtio_pci_reset, 0, proxy);
7055e687 MT	369
53c25cea PB	370	virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
	371	}
	372
	373	static void virtio_blk_init_pci(PCIDevice *pci_dev)
	374	{
	375	VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
	376	VirtIODevice *vdev;
	377
	378	vdev = virtio_blk_init(&pci_dev->qdev);
	379	virtio_init_pci(proxy, vdev,
	380	PCI_VENDOR_ID_REDHAT_QUMRANET,
	381	PCI_DEVICE_ID_VIRTIO_BLOCK,
	382	PCI_CLASS_STORAGE_OTHER,
	383	0x00);
	384	}
	385
	386	static void virtio_console_init_pci(PCIDevice *pci_dev)
	387	{
	388	VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
	389	VirtIODevice *vdev;
	390
	391	vdev = virtio_console_init(&pci_dev->qdev);
	392	virtio_init_pci(proxy, vdev,
	393	PCI_VENDOR_ID_REDHAT_QUMRANET,
	394	PCI_DEVICE_ID_VIRTIO_CONSOLE,
	395	PCI_CLASS_DISPLAY_OTHER,
	396	0x00);
	397	}
	398
	399	static void virtio_net_init_pci(PCIDevice *pci_dev)
	400	{
	401	VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
	402	VirtIODevice *vdev;
	403
	404	vdev = virtio_net_init(&pci_dev->qdev);
	405	virtio_init_pci(proxy, vdev,
	406	PCI_VENDOR_ID_REDHAT_QUMRANET,
	407	PCI_DEVICE_ID_VIRTIO_NET,
	408	PCI_CLASS_NETWORK_ETHERNET,
	409	0x00);
	410	}
	411
	412	static void virtio_balloon_init_pci(PCIDevice *pci_dev)
	413	{
	414	VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
	415	VirtIODevice *vdev;
	416
	417	vdev = virtio_balloon_init(&pci_dev->qdev);
	418	virtio_init_pci(proxy, vdev,
	419	PCI_VENDOR_ID_REDHAT_QUMRANET,
	420	PCI_DEVICE_ID_VIRTIO_BALLOON,
	421	PCI_CLASS_MEMORY_RAM,
	422	0x00);
	423	}
	424
	425	static void virtio_pci_register_devices(void)
	426	{
	427	pci_qdev_register("virtio-blk-pci", sizeof(VirtIOPCIProxy),
	428	virtio_blk_init_pci);
	429	pci_qdev_register("virtio-net-pci", sizeof(VirtIOPCIProxy),
	430	virtio_net_init_pci);
	431	pci_qdev_register("virtio-console-pci", sizeof(VirtIOPCIProxy),
	432	virtio_console_init_pci);
	433	pci_qdev_register("virtio-balloon-pci", sizeof(VirtIOPCIProxy),
434	virtio_balloon_init_pci);
435	}
436
437	device_init(virtio_pci_register_devices)