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CommitLineData
53c25cea
PB
1/*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
14 */
15
16#include <inttypes.h>
17
18#include "virtio.h"
8172539d
MT
19#include "virtio-blk.h"
20#include "virtio-net.h"
53c25cea 21#include "pci.h"
2f792016 22#include "qemu-error.h"
aba800a3 23#include "msix.h"
a1e0fea5 24#include "net.h"
97b15621 25#include "loader.h"
ade80dc8 26#include "kvm.h"
2446333c 27#include "blockdev.h"
53c25cea
PB
28
29/* from Linux's linux/virtio_pci.h */
30
31/* A 32-bit r/o bitmask of the features supported by the host */
32#define VIRTIO_PCI_HOST_FEATURES 0
33
34/* A 32-bit r/w bitmask of features activated by the guest */
35#define VIRTIO_PCI_GUEST_FEATURES 4
36
37/* A 32-bit r/w PFN for the currently selected queue */
38#define VIRTIO_PCI_QUEUE_PFN 8
39
40/* A 16-bit r/o queue size for the currently selected queue */
41#define VIRTIO_PCI_QUEUE_NUM 12
42
43/* A 16-bit r/w queue selector */
44#define VIRTIO_PCI_QUEUE_SEL 14
45
46/* A 16-bit r/w queue notifier */
47#define VIRTIO_PCI_QUEUE_NOTIFY 16
48
49/* An 8-bit device status register. */
50#define VIRTIO_PCI_STATUS 18
51
52/* An 8-bit r/o interrupt status register. Reading the value will return the
53 * current contents of the ISR and will also clear it. This is effectively
54 * a read-and-acknowledge. */
55#define VIRTIO_PCI_ISR 19
56
aba800a3
MT
57/* MSI-X registers: only enabled if MSI-X is enabled. */
58/* A 16-bit vector for configuration changes. */
59#define VIRTIO_MSI_CONFIG_VECTOR 20
60/* A 16-bit vector for selected queue notifications. */
61#define VIRTIO_MSI_QUEUE_VECTOR 22
62
63/* Config space size */
64#define VIRTIO_PCI_CONFIG_NOMSI 20
65#define VIRTIO_PCI_CONFIG_MSI 24
66#define VIRTIO_PCI_REGION_SIZE(dev) (msix_present(dev) ? \
67 VIRTIO_PCI_CONFIG_MSI : \
68 VIRTIO_PCI_CONFIG_NOMSI)
69
70/* The remaining space is defined by each driver as the per-driver
71 * configuration space */
72#define VIRTIO_PCI_CONFIG(dev) (msix_enabled(dev) ? \
73 VIRTIO_PCI_CONFIG_MSI : \
74 VIRTIO_PCI_CONFIG_NOMSI)
53c25cea
PB
75
76/* Virtio ABI version, if we increment this, we break the guest driver. */
77#define VIRTIO_PCI_ABI_VERSION 0
78
79/* How many bits to shift physical queue address written to QUEUE_PFN.
80 * 12 is historical, and due to x86 page size. */
81#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
82
c81131db
AG
83/* We can catch some guest bugs inside here so we continue supporting older
84 guests. */
85#define VIRTIO_PCI_BUG_BUS_MASTER (1 << 0)
86
53c25cea
PB
87/* QEMU doesn't strictly need write barriers since everything runs in
88 * lock-step. We'll leave the calls to wmb() in though to make it obvious for
89 * KVM or if kqemu gets SMP support.
90 */
91#define wmb() do { } while (0)
92
93/* PCI bindings. */
94
95typedef struct {
96 PCIDevice pci_dev;
97 VirtIODevice *vdev;
c81131db 98 uint32_t bugs;
53c25cea 99 uint32_t addr;
ab73ff29 100 uint32_t class_code;
a1e0fea5 101 uint32_t nvectors;
428c149b 102 BlockConf block;
97b15621 103 NICConf nic;
8172539d 104 uint32_t host_features;
9f107513
AL
105#ifdef CONFIG_LINUX
106 V9fsConf fsconf;
107#endif
98b19252
AS
108 /* Max. number of ports we can have for a the virtio-serial device */
109 uint32_t max_virtserial_ports;
53c25cea
PB
110} VirtIOPCIProxy;
111
112/* virtio device */
113
7055e687 114static void virtio_pci_notify(void *opaque, uint16_t vector)
53c25cea
PB
115{
116 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
117 if (msix_enabled(&proxy->pci_dev))
118 msix_notify(&proxy->pci_dev, vector);
119 else
120 qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
53c25cea
PB
121}
122
ff24bd58
MT
123static void virtio_pci_save_config(void * opaque, QEMUFile *f)
124{
125 VirtIOPCIProxy *proxy = opaque;
126 pci_device_save(&proxy->pci_dev, f);
127 msix_save(&proxy->pci_dev, f);
128 if (msix_present(&proxy->pci_dev))
129 qemu_put_be16(f, proxy->vdev->config_vector);
130}
131
132static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f)
133{
134 VirtIOPCIProxy *proxy = opaque;
135 if (msix_present(&proxy->pci_dev))
136 qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
137}
138
139static int virtio_pci_load_config(void * opaque, QEMUFile *f)
140{
141 VirtIOPCIProxy *proxy = opaque;
142 int ret;
143 ret = pci_device_load(&proxy->pci_dev, f);
e6da7680 144 if (ret) {
ff24bd58 145 return ret;
e6da7680 146 }
ff24bd58 147 msix_load(&proxy->pci_dev, f);
e6da7680 148 if (msix_present(&proxy->pci_dev)) {
ff24bd58 149 qemu_get_be16s(f, &proxy->vdev->config_vector);
e6da7680
MT
150 } else {
151 proxy->vdev->config_vector = VIRTIO_NO_VECTOR;
152 }
153 if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) {
154 return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector);
155 }
c81131db
AG
156
157 /* Try to find out if the guest has bus master disabled, but is
158 in ready state. Then we have a buggy guest OS. */
8a911107 159 if ((proxy->vdev->status & VIRTIO_CONFIG_S_DRIVER_OK) &&
c81131db
AG
160 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
161 proxy->bugs |= VIRTIO_PCI_BUG_BUS_MASTER;
162 }
ff24bd58
MT
163 return 0;
164}
165
166static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f)
167{
168 VirtIOPCIProxy *proxy = opaque;
169 uint16_t vector;
e6da7680
MT
170 if (msix_present(&proxy->pci_dev)) {
171 qemu_get_be16s(f, &vector);
172 } else {
173 vector = VIRTIO_NO_VECTOR;
174 }
ff24bd58 175 virtio_queue_set_vector(proxy->vdev, n, vector);
e6da7680
MT
176 if (vector != VIRTIO_NO_VECTOR) {
177 return msix_vector_use(&proxy->pci_dev, vector);
178 }
ff24bd58
MT
179 return 0;
180}
181
e489030d 182static void virtio_pci_reset(DeviceState *d)
7055e687 183{
e489030d 184 VirtIOPCIProxy *proxy = container_of(d, VirtIOPCIProxy, pci_dev.qdev);
7055e687 185 virtio_reset(proxy->vdev);
aba800a3 186 msix_reset(&proxy->pci_dev);
c81131db 187 proxy->bugs = 0;
7055e687
MT
188}
189
53c25cea
PB
190static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
191{
192 VirtIOPCIProxy *proxy = opaque;
193 VirtIODevice *vdev = proxy->vdev;
c227f099 194 target_phys_addr_t pa;
53c25cea 195
53c25cea
PB
196 switch (addr) {
197 case VIRTIO_PCI_GUEST_FEATURES:
198 /* Guest does not negotiate properly? We have to assume nothing. */
199 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
200 if (vdev->bad_features)
8172539d 201 val = proxy->host_features & vdev->bad_features(vdev);
53c25cea
PB
202 else
203 val = 0;
204 }
205 if (vdev->set_features)
206 vdev->set_features(vdev, val);
704a76fc 207 vdev->guest_features = val;
53c25cea
PB
208 break;
209 case VIRTIO_PCI_QUEUE_PFN:
c227f099 210 pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
1b8e9b27
MT
211 if (pa == 0) {
212 virtio_reset(proxy->vdev);
213 msix_unuse_all_vectors(&proxy->pci_dev);
214 }
7055e687
MT
215 else
216 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
53c25cea
PB
217 break;
218 case VIRTIO_PCI_QUEUE_SEL:
219 if (val < VIRTIO_PCI_QUEUE_MAX)
220 vdev->queue_sel = val;
221 break;
222 case VIRTIO_PCI_QUEUE_NOTIFY:
223 virtio_queue_notify(vdev, val);
224 break;
225 case VIRTIO_PCI_STATUS:
3e607cb5 226 virtio_set_status(vdev, val & 0xFF);
1b8e9b27
MT
227 if (vdev->status == 0) {
228 virtio_reset(proxy->vdev);
229 msix_unuse_all_vectors(&proxy->pci_dev);
230 }
c81131db
AG
231
232 /* Linux before 2.6.34 sets the device as OK without enabling
233 the PCI device bus master bit. In this case we need to disable
234 some safety checks. */
235 if ((val & VIRTIO_CONFIG_S_DRIVER_OK) &&
236 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
237 proxy->bugs |= VIRTIO_PCI_BUG_BUS_MASTER;
238 }
53c25cea 239 break;
aba800a3
MT
240 case VIRTIO_MSI_CONFIG_VECTOR:
241 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
242 /* Make it possible for guest to discover an error took place. */
243 if (msix_vector_use(&proxy->pci_dev, val) < 0)
244 val = VIRTIO_NO_VECTOR;
245 vdev->config_vector = val;
246 break;
247 case VIRTIO_MSI_QUEUE_VECTOR:
248 msix_vector_unuse(&proxy->pci_dev,
249 virtio_queue_vector(vdev, vdev->queue_sel));
250 /* Make it possible for guest to discover an error took place. */
251 if (msix_vector_use(&proxy->pci_dev, val) < 0)
252 val = VIRTIO_NO_VECTOR;
253 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
254 break;
255 default:
256 fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
257 __func__, addr, val);
258 break;
53c25cea
PB
259 }
260}
261
aba800a3 262static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
53c25cea 263{
53c25cea
PB
264 VirtIODevice *vdev = proxy->vdev;
265 uint32_t ret = 0xFFFFFFFF;
266
53c25cea
PB
267 switch (addr) {
268 case VIRTIO_PCI_HOST_FEATURES:
8172539d 269 ret = proxy->host_features;
53c25cea
PB
270 break;
271 case VIRTIO_PCI_GUEST_FEATURES:
704a76fc 272 ret = vdev->guest_features;
53c25cea
PB
273 break;
274 case VIRTIO_PCI_QUEUE_PFN:
275 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
276 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
277 break;
278 case VIRTIO_PCI_QUEUE_NUM:
279 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
280 break;
281 case VIRTIO_PCI_QUEUE_SEL:
282 ret = vdev->queue_sel;
283 break;
284 case VIRTIO_PCI_STATUS:
285 ret = vdev->status;
286 break;
287 case VIRTIO_PCI_ISR:
288 /* reading from the ISR also clears it. */
289 ret = vdev->isr;
290 vdev->isr = 0;
7055e687 291 qemu_set_irq(proxy->pci_dev.irq[0], 0);
53c25cea 292 break;
aba800a3
MT
293 case VIRTIO_MSI_CONFIG_VECTOR:
294 ret = vdev->config_vector;
295 break;
296 case VIRTIO_MSI_QUEUE_VECTOR:
297 ret = virtio_queue_vector(vdev, vdev->queue_sel);
298 break;
53c25cea
PB
299 default:
300 break;
301 }
302
303 return ret;
304}
305
306static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
307{
308 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
309 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
310 addr -= proxy->addr;
311 if (addr < config)
312 return virtio_ioport_read(proxy, addr);
313 addr -= config;
53c25cea
PB
314 return virtio_config_readb(proxy->vdev, addr);
315}
316
317static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
318{
319 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
320 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
321 addr -= proxy->addr;
322 if (addr < config)
323 return virtio_ioport_read(proxy, addr);
324 addr -= config;
53c25cea
PB
325 return virtio_config_readw(proxy->vdev, addr);
326}
327
328static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
329{
330 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
331 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
332 addr -= proxy->addr;
333 if (addr < config)
334 return virtio_ioport_read(proxy, addr);
335 addr -= config;
53c25cea
PB
336 return virtio_config_readl(proxy->vdev, addr);
337}
338
339static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
340{
341 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
342 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
343 addr -= proxy->addr;
344 if (addr < config) {
345 virtio_ioport_write(proxy, addr, val);
346 return;
347 }
348 addr -= config;
53c25cea
PB
349 virtio_config_writeb(proxy->vdev, addr, val);
350}
351
352static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
353{
354 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
355 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
356 addr -= proxy->addr;
357 if (addr < config) {
358 virtio_ioport_write(proxy, addr, val);
359 return;
360 }
361 addr -= config;
53c25cea
PB
362 virtio_config_writew(proxy->vdev, addr, val);
363}
364
365static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
366{
367 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
368 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
369 addr -= proxy->addr;
370 if (addr < config) {
371 virtio_ioport_write(proxy, addr, val);
372 return;
373 }
374 addr -= config;
53c25cea
PB
375 virtio_config_writel(proxy->vdev, addr, val);
376}
377
378static void virtio_map(PCIDevice *pci_dev, int region_num,
6e355d90 379 pcibus_t addr, pcibus_t size, int type)
53c25cea
PB
380{
381 VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
382 VirtIODevice *vdev = proxy->vdev;
aba800a3 383 unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;
53c25cea
PB
384
385 proxy->addr = addr;
53c25cea 386
aba800a3
MT
387 register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
388 register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
389 register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
390 register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
391 register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
392 register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);
53c25cea 393
aba800a3 394 if (vdev->config_len)
53c25cea 395 vdev->get_config(vdev, vdev->config);
aba800a3
MT
396}
397
398static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
399 uint32_t val, int len)
400{
ed757e14
YV
401 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
402
403 if (PCI_COMMAND == address) {
404 if (!(val & PCI_COMMAND_MASTER)) {
c81131db 405 if (!(proxy->bugs & VIRTIO_PCI_BUG_BUS_MASTER)) {
3e607cb5
MT
406 virtio_set_status(proxy->vdev,
407 proxy->vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
c81131db 408 }
ed757e14
YV
409 }
410 }
411
aba800a3 412 pci_default_write_config(pci_dev, address, val, len);
85352471 413 msix_write_config(pci_dev, address, val, len);
53c25cea
PB
414}
415
6d74ca5a
MT
416static unsigned virtio_pci_get_features(void *opaque)
417{
8172539d
MT
418 VirtIOPCIProxy *proxy = opaque;
419 return proxy->host_features;
6d74ca5a
MT
420}
421
ade80dc8
MT
422static void virtio_pci_guest_notifier_read(void *opaque)
423{
424 VirtQueue *vq = opaque;
425 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
426 if (event_notifier_test_and_clear(n)) {
427 virtio_irq(vq);
428 }
429}
430
431static int virtio_pci_set_guest_notifier(void *opaque, int n, bool assign)
432{
433 VirtIOPCIProxy *proxy = opaque;
434 VirtQueue *vq = virtio_get_queue(proxy->vdev, n);
435 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq);
436
437 if (assign) {
438 int r = event_notifier_init(notifier, 0);
439 if (r < 0) {
440 return r;
441 }
442 qemu_set_fd_handler(event_notifier_get_fd(notifier),
443 virtio_pci_guest_notifier_read, NULL, vq);
444 } else {
445 qemu_set_fd_handler(event_notifier_get_fd(notifier),
446 NULL, NULL, NULL);
447 event_notifier_cleanup(notifier);
448 }
449
450 return 0;
451}
452
453static int virtio_pci_set_host_notifier(void *opaque, int n, bool assign)
454{
455 VirtIOPCIProxy *proxy = opaque;
456 VirtQueue *vq = virtio_get_queue(proxy->vdev, n);
457 EventNotifier *notifier = virtio_queue_get_host_notifier(vq);
458 int r;
459 if (assign) {
460 r = event_notifier_init(notifier, 1);
461 if (r < 0) {
462 return r;
463 }
464 r = kvm_set_ioeventfd_pio_word(event_notifier_get_fd(notifier),
465 proxy->addr + VIRTIO_PCI_QUEUE_NOTIFY,
466 n, assign);
467 if (r < 0) {
468 event_notifier_cleanup(notifier);
469 }
470 } else {
471 r = kvm_set_ioeventfd_pio_word(event_notifier_get_fd(notifier),
472 proxy->addr + VIRTIO_PCI_QUEUE_NOTIFY,
473 n, assign);
474 if (r < 0) {
475 return r;
476 }
477 event_notifier_cleanup(notifier);
478 }
479 return r;
480}
481
53c25cea 482static const VirtIOBindings virtio_pci_bindings = {
ff24bd58
MT
483 .notify = virtio_pci_notify,
484 .save_config = virtio_pci_save_config,
485 .load_config = virtio_pci_load_config,
486 .save_queue = virtio_pci_save_queue,
487 .load_queue = virtio_pci_load_queue,
6d74ca5a 488 .get_features = virtio_pci_get_features,
ade80dc8
MT
489 .set_host_notifier = virtio_pci_set_host_notifier,
490 .set_guest_notifier = virtio_pci_set_guest_notifier,
53c25cea
PB
491};
492
493static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
494 uint16_t vendor, uint16_t device,
495 uint16_t class_code, uint8_t pif)
496{
497 uint8_t *config;
498 uint32_t size;
499
500 proxy->vdev = vdev;
501
502 config = proxy->pci_dev.config;
503 pci_config_set_vendor_id(config, vendor);
504 pci_config_set_device_id(config, device);
505
506 config[0x08] = VIRTIO_PCI_ABI_VERSION;
507
508 config[0x09] = pif;
509 pci_config_set_class(config, class_code);
53c25cea
PB
510
511 config[0x2c] = vendor & 0xFF;
512 config[0x2d] = (vendor >> 8) & 0xFF;
513 config[0x2e] = vdev->device_id & 0xFF;
514 config[0x2f] = (vdev->device_id >> 8) & 0xFF;
515
516 config[0x3d] = 1;
517
5a1fc5e8 518 if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
aba800a3
MT
519 pci_register_bar(&proxy->pci_dev, 1,
520 msix_bar_size(&proxy->pci_dev),
0392a017 521 PCI_BASE_ADDRESS_SPACE_MEMORY,
aba800a3 522 msix_mmio_map);
aba800a3
MT
523 } else
524 vdev->nvectors = 0;
525
ed757e14
YV
526 proxy->pci_dev.config_write = virtio_write_config;
527
aba800a3 528 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
53c25cea
PB
529 if (size & (size-1))
530 size = 1 << qemu_fls(size);
531
0392a017 532 pci_register_bar(&proxy->pci_dev, 0, size, PCI_BASE_ADDRESS_SPACE_IO,
53c25cea
PB
533 virtio_map);
534
535 virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
8172539d
MT
536 proxy->host_features |= 0x1 << VIRTIO_F_NOTIFY_ON_EMPTY;
537 proxy->host_features |= 0x1 << VIRTIO_F_BAD_FEATURE;
538 proxy->host_features = vdev->get_features(vdev, proxy->host_features);
53c25cea
PB
539}
540
81a322d4 541static int virtio_blk_init_pci(PCIDevice *pci_dev)
53c25cea
PB
542{
543 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
544 VirtIODevice *vdev;
545
ab73ff29
GH
546 if (proxy->class_code != PCI_CLASS_STORAGE_SCSI &&
547 proxy->class_code != PCI_CLASS_STORAGE_OTHER)
548 proxy->class_code = PCI_CLASS_STORAGE_SCSI;
53c25cea 549
428c149b 550 vdev = virtio_blk_init(&pci_dev->qdev, &proxy->block);
ac0c14d7
MA
551 if (!vdev) {
552 return -1;
553 }
177539e0 554 vdev->nvectors = proxy->nvectors;
53c25cea
PB
555 virtio_init_pci(proxy, vdev,
556 PCI_VENDOR_ID_REDHAT_QUMRANET,
85c2c735
MM
557 PCI_DEVICE_ID_VIRTIO_BLOCK,
558 proxy->class_code, 0x00);
177539e0
GH
559 /* make the actual value visible */
560 proxy->nvectors = vdev->nvectors;
81a322d4 561 return 0;
21d58b57
MM
562}
563
0f457d91
MT
564static int virtio_exit_pci(PCIDevice *pci_dev)
565{
566 return msix_uninit(pci_dev);
567}
568
56a14938
GH
569static int virtio_blk_exit_pci(PCIDevice *pci_dev)
570{
571 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
572
9d0d3138 573 virtio_blk_exit(proxy->vdev);
f8b6cc00 574 blockdev_mark_auto_del(proxy->block.bs);
0f457d91 575 return virtio_exit_pci(pci_dev);
56a14938
GH
576}
577
98b19252 578static int virtio_serial_init_pci(PCIDevice *pci_dev)
21d58b57 579{
d6beee99 580 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
85c2c735
MM
581 VirtIODevice *vdev;
582
d6beee99
GH
583 if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
584 proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
585 proxy->class_code != PCI_CLASS_OTHERS) /* qemu-kvm */
586 proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER;
587
98b19252 588 vdev = virtio_serial_init(&pci_dev->qdev, proxy->max_virtserial_ports);
25fe3654
AS
589 if (!vdev) {
590 return -1;
591 }
573fb60c
AS
592 vdev->nvectors = proxy->nvectors == DEV_NVECTORS_UNSPECIFIED
593 ? proxy->max_virtserial_ports + 1
594 : proxy->nvectors;
85c2c735
MM
595 virtio_init_pci(proxy, vdev,
596 PCI_VENDOR_ID_REDHAT_QUMRANET,
597 PCI_DEVICE_ID_VIRTIO_CONSOLE,
598 proxy->class_code, 0x00);
a1829205 599 proxy->nvectors = vdev->nvectors;
81a322d4 600 return 0;
53c25cea
PB
601}
602
8b53a865
AS
603static int virtio_serial_exit_pci(PCIDevice *pci_dev)
604{
605 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
606
607 virtio_serial_exit(proxy->vdev);
608 return virtio_exit_pci(pci_dev);
609}
610
81a322d4 611static int virtio_net_init_pci(PCIDevice *pci_dev)
53c25cea
PB
612{
613 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
614 VirtIODevice *vdev;
615
97b15621 616 vdev = virtio_net_init(&pci_dev->qdev, &proxy->nic);
a1e0fea5 617
97b15621 618 vdev->nvectors = proxy->nvectors;
53c25cea
PB
619 virtio_init_pci(proxy, vdev,
620 PCI_VENDOR_ID_REDHAT_QUMRANET,
621 PCI_DEVICE_ID_VIRTIO_NET,
622 PCI_CLASS_NETWORK_ETHERNET,
623 0x00);
a1e0fea5
GH
624
625 /* make the actual value visible */
626 proxy->nvectors = vdev->nvectors;
81a322d4 627 return 0;
53c25cea
PB
628}
629
97b15621
GH
630static int virtio_net_exit_pci(PCIDevice *pci_dev)
631{
632 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
633
634 virtio_net_exit(proxy->vdev);
635 return virtio_exit_pci(pci_dev);
636}
637
81a322d4 638static int virtio_balloon_init_pci(PCIDevice *pci_dev)
53c25cea
PB
639{
640 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
641 VirtIODevice *vdev;
642
643 vdev = virtio_balloon_init(&pci_dev->qdev);
644 virtio_init_pci(proxy, vdev,
645 PCI_VENDOR_ID_REDHAT_QUMRANET,
646 PCI_DEVICE_ID_VIRTIO_BALLOON,
647 PCI_CLASS_MEMORY_RAM,
648 0x00);
81a322d4 649 return 0;
53c25cea
PB
650}
651
758e8e38 652#ifdef CONFIG_VIRTFS
9f107513
AL
653static int virtio_9p_init_pci(PCIDevice *pci_dev)
654{
655 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
656 VirtIODevice *vdev;
657
658 vdev = virtio_9p_init(&pci_dev->qdev, &proxy->fsconf);
659 virtio_init_pci(proxy, vdev,
660 PCI_VENDOR_ID_REDHAT_QUMRANET,
661 0x1009,
662 0x2,
663 0x00);
664
665 return 0;
666}
667#endif
668
0aab0d3a
GH
669static PCIDeviceInfo virtio_info[] = {
670 {
671 .qdev.name = "virtio-blk-pci",
672 .qdev.size = sizeof(VirtIOPCIProxy),
673 .init = virtio_blk_init_pci,
56a14938 674 .exit = virtio_blk_exit_pci,
ab73ff29 675 .qdev.props = (Property[]) {
72c61d0b 676 DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
428c149b 677 DEFINE_BLOCK_PROPERTIES(VirtIOPCIProxy, block),
177539e0 678 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
8172539d 679 DEFINE_VIRTIO_BLK_FEATURES(VirtIOPCIProxy, host_features),
72c61d0b 680 DEFINE_PROP_END_OF_LIST(),
ab73ff29 681 },
e489030d 682 .qdev.reset = virtio_pci_reset,
0aab0d3a 683 },{
a1e0fea5
GH
684 .qdev.name = "virtio-net-pci",
685 .qdev.size = sizeof(VirtIOPCIProxy),
686 .init = virtio_net_init_pci,
97b15621 687 .exit = virtio_net_exit_pci,
8c52c8f3 688 .romfile = "pxe-virtio.bin",
a1e0fea5 689 .qdev.props = (Property[]) {
97b15621 690 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
8172539d 691 DEFINE_VIRTIO_NET_FEATURES(VirtIOPCIProxy, host_features),
97b15621 692 DEFINE_NIC_PROPERTIES(VirtIOPCIProxy, nic),
72c61d0b 693 DEFINE_PROP_END_OF_LIST(),
a1e0fea5 694 },
e489030d 695 .qdev.reset = virtio_pci_reset,
0aab0d3a 696 },{
98b19252
AS
697 .qdev.name = "virtio-serial-pci",
698 .qdev.alias = "virtio-serial",
0aab0d3a 699 .qdev.size = sizeof(VirtIOPCIProxy),
98b19252 700 .init = virtio_serial_init_pci,
8b53a865 701 .exit = virtio_serial_exit_pci,
d6beee99 702 .qdev.props = (Property[]) {
573fb60c
AS
703 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
704 DEV_NVECTORS_UNSPECIFIED),
72c61d0b 705 DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
8172539d 706 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
98b19252
AS
707 DEFINE_PROP_UINT32("max_ports", VirtIOPCIProxy, max_virtserial_ports,
708 31),
72c61d0b 709 DEFINE_PROP_END_OF_LIST(),
d6beee99 710 },
e489030d 711 .qdev.reset = virtio_pci_reset,
0aab0d3a
GH
712 },{
713 .qdev.name = "virtio-balloon-pci",
714 .qdev.size = sizeof(VirtIOPCIProxy),
715 .init = virtio_balloon_init_pci,
0f457d91 716 .exit = virtio_exit_pci,
8172539d
MT
717 .qdev.props = (Property[]) {
718 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
719 DEFINE_PROP_END_OF_LIST(),
720 },
e489030d 721 .qdev.reset = virtio_pci_reset,
0aab0d3a 722 },{
758e8e38 723#ifdef CONFIG_VIRTFS
9f107513
AL
724 .qdev.name = "virtio-9p-pci",
725 .qdev.size = sizeof(VirtIOPCIProxy),
726 .init = virtio_9p_init_pci,
727 .qdev.props = (Property[]) {
728 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
729 DEFINE_PROP_STRING("mount_tag", VirtIOPCIProxy, fsconf.tag),
730 DEFINE_PROP_STRING("fsdev", VirtIOPCIProxy, fsconf.fsdev_id),
731 DEFINE_PROP_END_OF_LIST(),
732 },
733 }, {
734#endif
0aab0d3a
GH
735 /* end of list */
736 }
737};
738
53c25cea
PB
739static void virtio_pci_register_devices(void)
740{
0aab0d3a 741 pci_qdev_register_many(virtio_info);
53c25cea
PB
742}
743
744device_init(virtio_pci_register_devices)