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CommitLineData
53c25cea
PB
1/*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
14 */
15
16#include <inttypes.h>
17
18#include "virtio.h"
8172539d
MT
19#include "virtio-blk.h"
20#include "virtio-net.h"
53c25cea 21#include "pci.h"
2f792016 22#include "qemu-error.h"
aba800a3 23#include "msix.h"
a1e0fea5 24#include "net.h"
97b15621 25#include "loader.h"
ade80dc8 26#include "kvm.h"
2446333c 27#include "blockdev.h"
53c25cea
PB
28
29/* from Linux's linux/virtio_pci.h */
30
31/* A 32-bit r/o bitmask of the features supported by the host */
32#define VIRTIO_PCI_HOST_FEATURES 0
33
34/* A 32-bit r/w bitmask of features activated by the guest */
35#define VIRTIO_PCI_GUEST_FEATURES 4
36
37/* A 32-bit r/w PFN for the currently selected queue */
38#define VIRTIO_PCI_QUEUE_PFN 8
39
40/* A 16-bit r/o queue size for the currently selected queue */
41#define VIRTIO_PCI_QUEUE_NUM 12
42
43/* A 16-bit r/w queue selector */
44#define VIRTIO_PCI_QUEUE_SEL 14
45
46/* A 16-bit r/w queue notifier */
47#define VIRTIO_PCI_QUEUE_NOTIFY 16
48
49/* An 8-bit device status register. */
50#define VIRTIO_PCI_STATUS 18
51
52/* An 8-bit r/o interrupt status register. Reading the value will return the
53 * current contents of the ISR and will also clear it. This is effectively
54 * a read-and-acknowledge. */
55#define VIRTIO_PCI_ISR 19
56
aba800a3
MT
57/* MSI-X registers: only enabled if MSI-X is enabled. */
58/* A 16-bit vector for configuration changes. */
59#define VIRTIO_MSI_CONFIG_VECTOR 20
60/* A 16-bit vector for selected queue notifications. */
61#define VIRTIO_MSI_QUEUE_VECTOR 22
62
63/* Config space size */
64#define VIRTIO_PCI_CONFIG_NOMSI 20
65#define VIRTIO_PCI_CONFIG_MSI 24
66#define VIRTIO_PCI_REGION_SIZE(dev) (msix_present(dev) ? \
67 VIRTIO_PCI_CONFIG_MSI : \
68 VIRTIO_PCI_CONFIG_NOMSI)
69
70/* The remaining space is defined by each driver as the per-driver
71 * configuration space */
72#define VIRTIO_PCI_CONFIG(dev) (msix_enabled(dev) ? \
73 VIRTIO_PCI_CONFIG_MSI : \
74 VIRTIO_PCI_CONFIG_NOMSI)
53c25cea
PB
75
76/* Virtio ABI version, if we increment this, we break the guest driver. */
77#define VIRTIO_PCI_ABI_VERSION 0
78
79/* How many bits to shift physical queue address written to QUEUE_PFN.
80 * 12 is historical, and due to x86 page size. */
81#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
82
c81131db
AG
83/* We can catch some guest bugs inside here so we continue supporting older
84 guests. */
85#define VIRTIO_PCI_BUG_BUS_MASTER (1 << 0)
86
53c25cea
PB
87/* QEMU doesn't strictly need write barriers since everything runs in
88 * lock-step. We'll leave the calls to wmb() in though to make it obvious for
89 * KVM or if kqemu gets SMP support.
90 */
91#define wmb() do { } while (0)
92
93/* PCI bindings. */
94
95typedef struct {
96 PCIDevice pci_dev;
97 VirtIODevice *vdev;
c81131db 98 uint32_t bugs;
53c25cea 99 uint32_t addr;
ab73ff29 100 uint32_t class_code;
a1e0fea5 101 uint32_t nvectors;
428c149b 102 BlockConf block;
97b15621 103 NICConf nic;
8172539d 104 uint32_t host_features;
9f107513
AL
105#ifdef CONFIG_LINUX
106 V9fsConf fsconf;
107#endif
98b19252
AS
108 /* Max. number of ports we can have for a the virtio-serial device */
109 uint32_t max_virtserial_ports;
f0c07c7c 110 virtio_net_conf net;
53c25cea
PB
111} VirtIOPCIProxy;
112
113/* virtio device */
114
7055e687 115static void virtio_pci_notify(void *opaque, uint16_t vector)
53c25cea
PB
116{
117 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
118 if (msix_enabled(&proxy->pci_dev))
119 msix_notify(&proxy->pci_dev, vector);
120 else
121 qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
53c25cea
PB
122}
123
ff24bd58
MT
124static void virtio_pci_save_config(void * opaque, QEMUFile *f)
125{
126 VirtIOPCIProxy *proxy = opaque;
127 pci_device_save(&proxy->pci_dev, f);
128 msix_save(&proxy->pci_dev, f);
129 if (msix_present(&proxy->pci_dev))
130 qemu_put_be16(f, proxy->vdev->config_vector);
131}
132
133static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f)
134{
135 VirtIOPCIProxy *proxy = opaque;
136 if (msix_present(&proxy->pci_dev))
137 qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
138}
139
140static int virtio_pci_load_config(void * opaque, QEMUFile *f)
141{
142 VirtIOPCIProxy *proxy = opaque;
143 int ret;
144 ret = pci_device_load(&proxy->pci_dev, f);
e6da7680 145 if (ret) {
ff24bd58 146 return ret;
e6da7680 147 }
ff24bd58 148 msix_load(&proxy->pci_dev, f);
e6da7680 149 if (msix_present(&proxy->pci_dev)) {
ff24bd58 150 qemu_get_be16s(f, &proxy->vdev->config_vector);
e6da7680
MT
151 } else {
152 proxy->vdev->config_vector = VIRTIO_NO_VECTOR;
153 }
154 if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) {
155 return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector);
156 }
c81131db
AG
157
158 /* Try to find out if the guest has bus master disabled, but is
159 in ready state. Then we have a buggy guest OS. */
8a911107 160 if ((proxy->vdev->status & VIRTIO_CONFIG_S_DRIVER_OK) &&
c81131db
AG
161 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
162 proxy->bugs |= VIRTIO_PCI_BUG_BUS_MASTER;
163 }
ff24bd58
MT
164 return 0;
165}
166
167static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f)
168{
169 VirtIOPCIProxy *proxy = opaque;
170 uint16_t vector;
e6da7680
MT
171 if (msix_present(&proxy->pci_dev)) {
172 qemu_get_be16s(f, &vector);
173 } else {
174 vector = VIRTIO_NO_VECTOR;
175 }
ff24bd58 176 virtio_queue_set_vector(proxy->vdev, n, vector);
e6da7680
MT
177 if (vector != VIRTIO_NO_VECTOR) {
178 return msix_vector_use(&proxy->pci_dev, vector);
179 }
ff24bd58
MT
180 return 0;
181}
182
e489030d 183static void virtio_pci_reset(DeviceState *d)
7055e687 184{
e489030d 185 VirtIOPCIProxy *proxy = container_of(d, VirtIOPCIProxy, pci_dev.qdev);
7055e687 186 virtio_reset(proxy->vdev);
aba800a3 187 msix_reset(&proxy->pci_dev);
c81131db 188 proxy->bugs = 0;
7055e687
MT
189}
190
53c25cea
PB
191static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
192{
193 VirtIOPCIProxy *proxy = opaque;
194 VirtIODevice *vdev = proxy->vdev;
c227f099 195 target_phys_addr_t pa;
53c25cea 196
53c25cea
PB
197 switch (addr) {
198 case VIRTIO_PCI_GUEST_FEATURES:
199 /* Guest does not negotiate properly? We have to assume nothing. */
200 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
201 if (vdev->bad_features)
8172539d 202 val = proxy->host_features & vdev->bad_features(vdev);
53c25cea
PB
203 else
204 val = 0;
205 }
206 if (vdev->set_features)
207 vdev->set_features(vdev, val);
704a76fc 208 vdev->guest_features = val;
53c25cea
PB
209 break;
210 case VIRTIO_PCI_QUEUE_PFN:
c227f099 211 pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
1b8e9b27
MT
212 if (pa == 0) {
213 virtio_reset(proxy->vdev);
214 msix_unuse_all_vectors(&proxy->pci_dev);
215 }
7055e687
MT
216 else
217 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
53c25cea
PB
218 break;
219 case VIRTIO_PCI_QUEUE_SEL:
220 if (val < VIRTIO_PCI_QUEUE_MAX)
221 vdev->queue_sel = val;
222 break;
223 case VIRTIO_PCI_QUEUE_NOTIFY:
224 virtio_queue_notify(vdev, val);
225 break;
226 case VIRTIO_PCI_STATUS:
3e607cb5 227 virtio_set_status(vdev, val & 0xFF);
1b8e9b27
MT
228 if (vdev->status == 0) {
229 virtio_reset(proxy->vdev);
230 msix_unuse_all_vectors(&proxy->pci_dev);
231 }
c81131db
AG
232
233 /* Linux before 2.6.34 sets the device as OK without enabling
234 the PCI device bus master bit. In this case we need to disable
235 some safety checks. */
236 if ((val & VIRTIO_CONFIG_S_DRIVER_OK) &&
237 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
238 proxy->bugs |= VIRTIO_PCI_BUG_BUS_MASTER;
239 }
53c25cea 240 break;
aba800a3
MT
241 case VIRTIO_MSI_CONFIG_VECTOR:
242 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
243 /* Make it possible for guest to discover an error took place. */
244 if (msix_vector_use(&proxy->pci_dev, val) < 0)
245 val = VIRTIO_NO_VECTOR;
246 vdev->config_vector = val;
247 break;
248 case VIRTIO_MSI_QUEUE_VECTOR:
249 msix_vector_unuse(&proxy->pci_dev,
250 virtio_queue_vector(vdev, vdev->queue_sel));
251 /* Make it possible for guest to discover an error took place. */
252 if (msix_vector_use(&proxy->pci_dev, val) < 0)
253 val = VIRTIO_NO_VECTOR;
254 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
255 break;
256 default:
257 fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
258 __func__, addr, val);
259 break;
53c25cea
PB
260 }
261}
262
aba800a3 263static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
53c25cea 264{
53c25cea
PB
265 VirtIODevice *vdev = proxy->vdev;
266 uint32_t ret = 0xFFFFFFFF;
267
53c25cea
PB
268 switch (addr) {
269 case VIRTIO_PCI_HOST_FEATURES:
8172539d 270 ret = proxy->host_features;
53c25cea
PB
271 break;
272 case VIRTIO_PCI_GUEST_FEATURES:
704a76fc 273 ret = vdev->guest_features;
53c25cea
PB
274 break;
275 case VIRTIO_PCI_QUEUE_PFN:
276 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
277 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
278 break;
279 case VIRTIO_PCI_QUEUE_NUM:
280 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
281 break;
282 case VIRTIO_PCI_QUEUE_SEL:
283 ret = vdev->queue_sel;
284 break;
285 case VIRTIO_PCI_STATUS:
286 ret = vdev->status;
287 break;
288 case VIRTIO_PCI_ISR:
289 /* reading from the ISR also clears it. */
290 ret = vdev->isr;
291 vdev->isr = 0;
7055e687 292 qemu_set_irq(proxy->pci_dev.irq[0], 0);
53c25cea 293 break;
aba800a3
MT
294 case VIRTIO_MSI_CONFIG_VECTOR:
295 ret = vdev->config_vector;
296 break;
297 case VIRTIO_MSI_QUEUE_VECTOR:
298 ret = virtio_queue_vector(vdev, vdev->queue_sel);
299 break;
53c25cea
PB
300 default:
301 break;
302 }
303
304 return ret;
305}
306
307static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
308{
309 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
310 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
311 addr -= proxy->addr;
312 if (addr < config)
313 return virtio_ioport_read(proxy, addr);
314 addr -= config;
53c25cea
PB
315 return virtio_config_readb(proxy->vdev, addr);
316}
317
318static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
319{
320 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
321 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
322 addr -= proxy->addr;
323 if (addr < config)
324 return virtio_ioport_read(proxy, addr);
325 addr -= config;
53c25cea
PB
326 return virtio_config_readw(proxy->vdev, addr);
327}
328
329static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
330{
331 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
332 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
333 addr -= proxy->addr;
334 if (addr < config)
335 return virtio_ioport_read(proxy, addr);
336 addr -= config;
53c25cea
PB
337 return virtio_config_readl(proxy->vdev, addr);
338}
339
340static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
341{
342 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
343 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
344 addr -= proxy->addr;
345 if (addr < config) {
346 virtio_ioport_write(proxy, addr, val);
347 return;
348 }
349 addr -= config;
53c25cea
PB
350 virtio_config_writeb(proxy->vdev, addr, val);
351}
352
353static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
354{
355 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
356 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
357 addr -= proxy->addr;
358 if (addr < config) {
359 virtio_ioport_write(proxy, addr, val);
360 return;
361 }
362 addr -= config;
53c25cea
PB
363 virtio_config_writew(proxy->vdev, addr, val);
364}
365
366static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
367{
368 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
369 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
370 addr -= proxy->addr;
371 if (addr < config) {
372 virtio_ioport_write(proxy, addr, val);
373 return;
374 }
375 addr -= config;
53c25cea
PB
376 virtio_config_writel(proxy->vdev, addr, val);
377}
378
379static void virtio_map(PCIDevice *pci_dev, int region_num,
6e355d90 380 pcibus_t addr, pcibus_t size, int type)
53c25cea
PB
381{
382 VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
383 VirtIODevice *vdev = proxy->vdev;
aba800a3 384 unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;
53c25cea
PB
385
386 proxy->addr = addr;
53c25cea 387
aba800a3
MT
388 register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
389 register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
390 register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
391 register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
392 register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
393 register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);
53c25cea 394
aba800a3 395 if (vdev->config_len)
53c25cea 396 vdev->get_config(vdev, vdev->config);
aba800a3
MT
397}
398
399static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
400 uint32_t val, int len)
401{
ed757e14
YV
402 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
403
404 if (PCI_COMMAND == address) {
405 if (!(val & PCI_COMMAND_MASTER)) {
c81131db 406 if (!(proxy->bugs & VIRTIO_PCI_BUG_BUS_MASTER)) {
3e607cb5
MT
407 virtio_set_status(proxy->vdev,
408 proxy->vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
c81131db 409 }
ed757e14
YV
410 }
411 }
412
aba800a3 413 pci_default_write_config(pci_dev, address, val, len);
85352471 414 msix_write_config(pci_dev, address, val, len);
53c25cea
PB
415}
416
6d74ca5a
MT
417static unsigned virtio_pci_get_features(void *opaque)
418{
8172539d
MT
419 VirtIOPCIProxy *proxy = opaque;
420 return proxy->host_features;
6d74ca5a
MT
421}
422
ade80dc8
MT
423static void virtio_pci_guest_notifier_read(void *opaque)
424{
425 VirtQueue *vq = opaque;
426 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
427 if (event_notifier_test_and_clear(n)) {
428 virtio_irq(vq);
429 }
430}
431
432static int virtio_pci_set_guest_notifier(void *opaque, int n, bool assign)
433{
434 VirtIOPCIProxy *proxy = opaque;
435 VirtQueue *vq = virtio_get_queue(proxy->vdev, n);
436 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq);
437
438 if (assign) {
439 int r = event_notifier_init(notifier, 0);
440 if (r < 0) {
441 return r;
442 }
443 qemu_set_fd_handler(event_notifier_get_fd(notifier),
444 virtio_pci_guest_notifier_read, NULL, vq);
445 } else {
446 qemu_set_fd_handler(event_notifier_get_fd(notifier),
447 NULL, NULL, NULL);
448 event_notifier_cleanup(notifier);
449 }
450
451 return 0;
452}
453
54dd9321
MT
454static int virtio_pci_set_guest_notifiers(void *opaque, bool assign)
455{
456 VirtIOPCIProxy *proxy = opaque;
457 VirtIODevice *vdev = proxy->vdev;
458 int r, n;
459
460 for (n = 0; n < VIRTIO_PCI_QUEUE_MAX; n++) {
461 if (!virtio_queue_get_num(vdev, n)) {
462 break;
463 }
464
465 r = virtio_pci_set_guest_notifier(opaque, n, assign);
466 if (r < 0) {
467 goto assign_error;
468 }
469 }
470
471 return 0;
472
473assign_error:
474 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */
475 while (--n >= 0) {
476 virtio_pci_set_guest_notifier(opaque, n, !assign);
477 }
478 return r;
479}
480
ade80dc8
MT
481static int virtio_pci_set_host_notifier(void *opaque, int n, bool assign)
482{
483 VirtIOPCIProxy *proxy = opaque;
484 VirtQueue *vq = virtio_get_queue(proxy->vdev, n);
485 EventNotifier *notifier = virtio_queue_get_host_notifier(vq);
486 int r;
487 if (assign) {
488 r = event_notifier_init(notifier, 1);
489 if (r < 0) {
490 return r;
491 }
492 r = kvm_set_ioeventfd_pio_word(event_notifier_get_fd(notifier),
493 proxy->addr + VIRTIO_PCI_QUEUE_NOTIFY,
494 n, assign);
495 if (r < 0) {
496 event_notifier_cleanup(notifier);
497 }
498 } else {
499 r = kvm_set_ioeventfd_pio_word(event_notifier_get_fd(notifier),
500 proxy->addr + VIRTIO_PCI_QUEUE_NOTIFY,
501 n, assign);
502 if (r < 0) {
503 return r;
504 }
505 event_notifier_cleanup(notifier);
506 }
507 return r;
508}
509
53c25cea 510static const VirtIOBindings virtio_pci_bindings = {
ff24bd58
MT
511 .notify = virtio_pci_notify,
512 .save_config = virtio_pci_save_config,
513 .load_config = virtio_pci_load_config,
514 .save_queue = virtio_pci_save_queue,
515 .load_queue = virtio_pci_load_queue,
6d74ca5a 516 .get_features = virtio_pci_get_features,
ade80dc8 517 .set_host_notifier = virtio_pci_set_host_notifier,
54dd9321 518 .set_guest_notifiers = virtio_pci_set_guest_notifiers,
53c25cea
PB
519};
520
521static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
522 uint16_t vendor, uint16_t device,
523 uint16_t class_code, uint8_t pif)
524{
525 uint8_t *config;
526 uint32_t size;
527
528 proxy->vdev = vdev;
529
530 config = proxy->pci_dev.config;
531 pci_config_set_vendor_id(config, vendor);
532 pci_config_set_device_id(config, device);
533
534 config[0x08] = VIRTIO_PCI_ABI_VERSION;
535
536 config[0x09] = pif;
537 pci_config_set_class(config, class_code);
53c25cea
PB
538
539 config[0x2c] = vendor & 0xFF;
540 config[0x2d] = (vendor >> 8) & 0xFF;
541 config[0x2e] = vdev->device_id & 0xFF;
542 config[0x2f] = (vdev->device_id >> 8) & 0xFF;
543
544 config[0x3d] = 1;
545
5a1fc5e8 546 if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
aba800a3
MT
547 pci_register_bar(&proxy->pci_dev, 1,
548 msix_bar_size(&proxy->pci_dev),
0392a017 549 PCI_BASE_ADDRESS_SPACE_MEMORY,
aba800a3 550 msix_mmio_map);
aba800a3
MT
551 } else
552 vdev->nvectors = 0;
553
ed757e14
YV
554 proxy->pci_dev.config_write = virtio_write_config;
555
aba800a3 556 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
53c25cea
PB
557 if (size & (size-1))
558 size = 1 << qemu_fls(size);
559
0392a017 560 pci_register_bar(&proxy->pci_dev, 0, size, PCI_BASE_ADDRESS_SPACE_IO,
53c25cea
PB
561 virtio_map);
562
563 virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
8172539d
MT
564 proxy->host_features |= 0x1 << VIRTIO_F_NOTIFY_ON_EMPTY;
565 proxy->host_features |= 0x1 << VIRTIO_F_BAD_FEATURE;
566 proxy->host_features = vdev->get_features(vdev, proxy->host_features);
53c25cea
PB
567}
568
81a322d4 569static int virtio_blk_init_pci(PCIDevice *pci_dev)
53c25cea
PB
570{
571 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
572 VirtIODevice *vdev;
573
ab73ff29
GH
574 if (proxy->class_code != PCI_CLASS_STORAGE_SCSI &&
575 proxy->class_code != PCI_CLASS_STORAGE_OTHER)
576 proxy->class_code = PCI_CLASS_STORAGE_SCSI;
53c25cea 577
428c149b 578 vdev = virtio_blk_init(&pci_dev->qdev, &proxy->block);
ac0c14d7
MA
579 if (!vdev) {
580 return -1;
581 }
177539e0 582 vdev->nvectors = proxy->nvectors;
53c25cea
PB
583 virtio_init_pci(proxy, vdev,
584 PCI_VENDOR_ID_REDHAT_QUMRANET,
85c2c735
MM
585 PCI_DEVICE_ID_VIRTIO_BLOCK,
586 proxy->class_code, 0x00);
177539e0
GH
587 /* make the actual value visible */
588 proxy->nvectors = vdev->nvectors;
81a322d4 589 return 0;
21d58b57
MM
590}
591
0f457d91
MT
592static int virtio_exit_pci(PCIDevice *pci_dev)
593{
594 return msix_uninit(pci_dev);
595}
596
56a14938
GH
597static int virtio_blk_exit_pci(PCIDevice *pci_dev)
598{
599 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
600
9d0d3138 601 virtio_blk_exit(proxy->vdev);
f8b6cc00 602 blockdev_mark_auto_del(proxy->block.bs);
0f457d91 603 return virtio_exit_pci(pci_dev);
56a14938
GH
604}
605
98b19252 606static int virtio_serial_init_pci(PCIDevice *pci_dev)
21d58b57 607{
d6beee99 608 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
85c2c735
MM
609 VirtIODevice *vdev;
610
d6beee99
GH
611 if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
612 proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
613 proxy->class_code != PCI_CLASS_OTHERS) /* qemu-kvm */
614 proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER;
615
98b19252 616 vdev = virtio_serial_init(&pci_dev->qdev, proxy->max_virtserial_ports);
25fe3654
AS
617 if (!vdev) {
618 return -1;
619 }
573fb60c
AS
620 vdev->nvectors = proxy->nvectors == DEV_NVECTORS_UNSPECIFIED
621 ? proxy->max_virtserial_ports + 1
622 : proxy->nvectors;
85c2c735
MM
623 virtio_init_pci(proxy, vdev,
624 PCI_VENDOR_ID_REDHAT_QUMRANET,
625 PCI_DEVICE_ID_VIRTIO_CONSOLE,
626 proxy->class_code, 0x00);
a1829205 627 proxy->nvectors = vdev->nvectors;
81a322d4 628 return 0;
53c25cea
PB
629}
630
8b53a865
AS
631static int virtio_serial_exit_pci(PCIDevice *pci_dev)
632{
633 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
634
635 virtio_serial_exit(proxy->vdev);
636 return virtio_exit_pci(pci_dev);
637}
638
81a322d4 639static int virtio_net_init_pci(PCIDevice *pci_dev)
53c25cea
PB
640{
641 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
642 VirtIODevice *vdev;
643
f0c07c7c 644 vdev = virtio_net_init(&pci_dev->qdev, &proxy->nic, &proxy->net);
a1e0fea5 645
97b15621 646 vdev->nvectors = proxy->nvectors;
53c25cea
PB
647 virtio_init_pci(proxy, vdev,
648 PCI_VENDOR_ID_REDHAT_QUMRANET,
649 PCI_DEVICE_ID_VIRTIO_NET,
650 PCI_CLASS_NETWORK_ETHERNET,
651 0x00);
a1e0fea5
GH
652
653 /* make the actual value visible */
654 proxy->nvectors = vdev->nvectors;
81a322d4 655 return 0;
53c25cea
PB
656}
657
97b15621
GH
658static int virtio_net_exit_pci(PCIDevice *pci_dev)
659{
660 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
661
662 virtio_net_exit(proxy->vdev);
663 return virtio_exit_pci(pci_dev);
664}
665
81a322d4 666static int virtio_balloon_init_pci(PCIDevice *pci_dev)
53c25cea
PB
667{
668 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
669 VirtIODevice *vdev;
670
671 vdev = virtio_balloon_init(&pci_dev->qdev);
672 virtio_init_pci(proxy, vdev,
673 PCI_VENDOR_ID_REDHAT_QUMRANET,
674 PCI_DEVICE_ID_VIRTIO_BALLOON,
675 PCI_CLASS_MEMORY_RAM,
676 0x00);
81a322d4 677 return 0;
53c25cea
PB
678}
679
758e8e38 680#ifdef CONFIG_VIRTFS
9f107513
AL
681static int virtio_9p_init_pci(PCIDevice *pci_dev)
682{
683 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
684 VirtIODevice *vdev;
685
686 vdev = virtio_9p_init(&pci_dev->qdev, &proxy->fsconf);
9dbcca5a 687 vdev->nvectors = proxy->nvectors;
9f107513
AL
688 virtio_init_pci(proxy, vdev,
689 PCI_VENDOR_ID_REDHAT_QUMRANET,
690 0x1009,
691 0x2,
692 0x00);
9dbcca5a
GH
693 /* make the actual value visible */
694 proxy->nvectors = vdev->nvectors;
9f107513
AL
695 return 0;
696}
697#endif
698
0aab0d3a
GH
699static PCIDeviceInfo virtio_info[] = {
700 {
701 .qdev.name = "virtio-blk-pci",
702 .qdev.size = sizeof(VirtIOPCIProxy),
703 .init = virtio_blk_init_pci,
56a14938 704 .exit = virtio_blk_exit_pci,
ab73ff29 705 .qdev.props = (Property[]) {
72c61d0b 706 DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
428c149b 707 DEFINE_BLOCK_PROPERTIES(VirtIOPCIProxy, block),
177539e0 708 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
8172539d 709 DEFINE_VIRTIO_BLK_FEATURES(VirtIOPCIProxy, host_features),
72c61d0b 710 DEFINE_PROP_END_OF_LIST(),
ab73ff29 711 },
e489030d 712 .qdev.reset = virtio_pci_reset,
0aab0d3a 713 },{
a1e0fea5
GH
714 .qdev.name = "virtio-net-pci",
715 .qdev.size = sizeof(VirtIOPCIProxy),
716 .init = virtio_net_init_pci,
97b15621 717 .exit = virtio_net_exit_pci,
8c52c8f3 718 .romfile = "pxe-virtio.bin",
a1e0fea5 719 .qdev.props = (Property[]) {
97b15621 720 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
8172539d 721 DEFINE_VIRTIO_NET_FEATURES(VirtIOPCIProxy, host_features),
97b15621 722 DEFINE_NIC_PROPERTIES(VirtIOPCIProxy, nic),
f0c07c7c
AW
723 DEFINE_PROP_UINT32("x-txtimer", VirtIOPCIProxy,
724 net.txtimer, TX_TIMER_INTERVAL),
e3f30488
AW
725 DEFINE_PROP_INT32("x-txburst", VirtIOPCIProxy,
726 net.txburst, TX_BURST),
a697a334 727 DEFINE_PROP_STRING("tx", VirtIOPCIProxy, net.tx),
72c61d0b 728 DEFINE_PROP_END_OF_LIST(),
a1e0fea5 729 },
e489030d 730 .qdev.reset = virtio_pci_reset,
0aab0d3a 731 },{
98b19252
AS
732 .qdev.name = "virtio-serial-pci",
733 .qdev.alias = "virtio-serial",
0aab0d3a 734 .qdev.size = sizeof(VirtIOPCIProxy),
98b19252 735 .init = virtio_serial_init_pci,
8b53a865 736 .exit = virtio_serial_exit_pci,
d6beee99 737 .qdev.props = (Property[]) {
573fb60c
AS
738 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
739 DEV_NVECTORS_UNSPECIFIED),
72c61d0b 740 DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
8172539d 741 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
98b19252
AS
742 DEFINE_PROP_UINT32("max_ports", VirtIOPCIProxy, max_virtserial_ports,
743 31),
72c61d0b 744 DEFINE_PROP_END_OF_LIST(),
d6beee99 745 },
e489030d 746 .qdev.reset = virtio_pci_reset,
0aab0d3a
GH
747 },{
748 .qdev.name = "virtio-balloon-pci",
749 .qdev.size = sizeof(VirtIOPCIProxy),
750 .init = virtio_balloon_init_pci,
0f457d91 751 .exit = virtio_exit_pci,
8172539d
MT
752 .qdev.props = (Property[]) {
753 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
754 DEFINE_PROP_END_OF_LIST(),
755 },
e489030d 756 .qdev.reset = virtio_pci_reset,
0aab0d3a 757 },{
758e8e38 758#ifdef CONFIG_VIRTFS
9f107513
AL
759 .qdev.name = "virtio-9p-pci",
760 .qdev.size = sizeof(VirtIOPCIProxy),
761 .init = virtio_9p_init_pci,
762 .qdev.props = (Property[]) {
9dbcca5a 763 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
9f107513
AL
764 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
765 DEFINE_PROP_STRING("mount_tag", VirtIOPCIProxy, fsconf.tag),
766 DEFINE_PROP_STRING("fsdev", VirtIOPCIProxy, fsconf.fsdev_id),
767 DEFINE_PROP_END_OF_LIST(),
768 },
769 }, {
770#endif
0aab0d3a
GH
771 /* end of list */
772 }
773};
774
53c25cea
PB
775static void virtio_pci_register_devices(void)
776{
0aab0d3a 777 pci_qdev_register_many(virtio_info);
53c25cea
PB
778}
779
780device_init(virtio_pci_register_devices)