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qdev: add return value to init() callbacks.
[mirror_qemu.git] / hw / wm8750.c
CommitLineData
adb86c37
AZ		 1/*
2 * WM8750 audio CODEC.
3 *
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
6 *
7 * This file is licensed under GNU GPL.
8 */
9
87ecb68b
PB		 10#include "hw.h"
11#include "i2c.h"
12#include "audio/audio.h"
adb86c37
AZ		 13
14#define IN_PORT_N 3
15#define OUT_PORT_N 3
16
17#define CODEC "wm8750"
18
bc24a225
PB		 19typedef struct {
20 int adc;
21 int adc_hz;
22 int dac;
23 int dac_hz;
24} WMRate;
25
26typedef struct {
adb86c37
AZ		 27 i2c_slave i2c;
28 uint8_t i2c_data[2];
29 int i2c_len;
30 QEMUSoundCard card;
31 SWVoiceIn *adc_voice[IN_PORT_N];
32 SWVoiceOut *dac_voice[OUT_PORT_N];
33 int enable;
34 void (*data_req)(void *, int, int);
35 void *opaque;
36 uint8_t data_in[4096];
37 uint8_t data_out[4096];
38 int idx_in, req_in;
39 int idx_out, req_out;
40
41 SWVoiceOut **out[2];
42 uint8_t outvol[7], outmute[2];
43 SWVoiceIn **in[2];
44 uint8_t invol[4], inmute[2];
45
46 uint8_t diff[2], pol, ds, monomix[2], alc, mute;
47 uint8_t path[4], mpath[2], power, format;
bc24a225 48 const WMRate *rate;
af83e09e 49 int adc_hz, dac_hz, ext_adc_hz, ext_dac_hz, master;
bc24a225 50} WM8750State;
adb86c37 51
db502b61 52/* pow(10.0, -i / 20.0) * 255, i = 0..42 */
683efdcb
AZ		 53static const uint8_t wm8750_vol_db_table[] = {
54 255, 227, 203, 181, 161, 143, 128, 114, 102, 90, 81, 72, 64, 57, 51, 45,
55 40, 36, 32, 29, 26, 23, 20, 18, 16, 14, 13, 11, 10, 9, 8, 7, 6, 6, 5, 5,
56 4, 4, 3, 3, 3, 2, 2
57};
58
db502b61
AZ		 59#define WM8750_OUTVOL_TRANSFORM(x) wm8750_vol_db_table[(0x7f - x) / 3]
60#define WM8750_INVOL_TRANSFORM(x) (x << 2)
683efdcb 61
bc24a225 62static inline void wm8750_in_load(WM8750State *s)
adb86c37
AZ		 63{
64 int acquired;
65 if (s->idx_in + s->req_in <= sizeof(s->data_in))
66 return;
67 s->idx_in = audio_MAX(0, (int) sizeof(s->data_in) - s->req_in);
68 acquired = AUD_read(*s->in[0], s->data_in + s->idx_in,
69 sizeof(s->data_in) - s->idx_in);
70}
71
bc24a225 72static inline void wm8750_out_flush(WM8750State *s)
adb86c37 73{
523111e7
AZ		 74 int sent = 0;
75 while (sent < s->idx_out)
76 sent += AUD_write(*s->out[0], s->data_out + sent, s->idx_out - sent)
77 ?: s->idx_out;
adb86c37
AZ		 78 s->idx_out = 0;
79}
80
81static void wm8750_audio_in_cb(void *opaque, int avail_b)
82{
bc24a225 83 WM8750State *s = (WM8750State *) opaque;
adb86c37
AZ		 84 s->req_in = avail_b;
85 s->data_req(s->opaque, s->req_out >> 2, avail_b >> 2);
adb86c37
AZ		 86}
87
88static void wm8750_audio_out_cb(void *opaque, int free_b)
89{
bc24a225 90 WM8750State *s = (WM8750State *) opaque;
adb86c37 91
523111e7
AZ		 92 if (s->idx_out >= free_b) {
93 s->idx_out = free_b;
94 s->req_out = 0;
95 wm8750_out_flush(s);
96 } else
97 s->req_out = free_b - s->idx_out;
98
99 s->data_req(s->opaque, s->req_out >> 2, s->req_in >> 2);
adb86c37
AZ		 100}
101
bc24a225 102static const WMRate wm_rate_table[] = {
adb86c37
AZ		 103 { 256, 48000, 256, 48000 }, /* SR: 00000 */
104 { 384, 48000, 384, 48000 }, /* SR: 00001 */
105 { 256, 48000, 1536, 8000 }, /* SR: 00010 */
106 { 384, 48000, 2304, 8000 }, /* SR: 00011 */
107 { 1536, 8000, 256, 48000 }, /* SR: 00100 */
108 { 2304, 8000, 384, 48000 }, /* SR: 00101 */
109 { 1536, 8000, 1536, 8000 }, /* SR: 00110 */
110 { 2304, 8000, 2304, 8000 }, /* SR: 00111 */
111 { 1024, 12000, 1024, 12000 }, /* SR: 01000 */
112 { 1526, 12000, 1536, 12000 }, /* SR: 01001 */
113 { 768, 16000, 768, 16000 }, /* SR: 01010 */
114 { 1152, 16000, 1152, 16000 }, /* SR: 01011 */
115 { 384, 32000, 384, 32000 }, /* SR: 01100 */
116 { 576, 32000, 576, 32000 }, /* SR: 01101 */
117 { 128, 96000, 128, 96000 }, /* SR: 01110 */
118 { 192, 96000, 192, 96000 }, /* SR: 01111 */
119 { 256, 44100, 256, 44100 }, /* SR: 10000 */
120 { 384, 44100, 384, 44100 }, /* SR: 10001 */
121 { 256, 44100, 1408, 8018 }, /* SR: 10010 */
122 { 384, 44100, 2112, 8018 }, /* SR: 10011 */
123 { 1408, 8018, 256, 44100 }, /* SR: 10100 */
124 { 2112, 8018, 384, 44100 }, /* SR: 10101 */
125 { 1408, 8018, 1408, 8018 }, /* SR: 10110 */
126 { 2112, 8018, 2112, 8018 }, /* SR: 10111 */
127 { 1024, 11025, 1024, 11025 }, /* SR: 11000 */
128 { 1536, 11025, 1536, 11025 }, /* SR: 11001 */
129 { 512, 22050, 512, 22050 }, /* SR: 11010 */
130 { 768, 22050, 768, 22050 }, /* SR: 11011 */
131 { 512, 24000, 512, 24000 }, /* SR: 11100 */
132 { 768, 24000, 768, 24000 }, /* SR: 11101 */
133 { 128, 88200, 128, 88200 }, /* SR: 11110 */
523111e7 134 { 192, 88200, 192, 88200 }, /* SR: 11111 */
adb86c37
AZ		 135};
136
bc24a225 137static void wm8750_vol_update(WM8750State *s)
683efdcb
AZ		 138{
139 /* FIXME: multiply all volumes by s->invol[2], s->invol[3] */
140
db502b61
AZ		 141 AUD_set_volume_in(s->adc_voice[0], s->mute,
142 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
143 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
144 AUD_set_volume_in(s->adc_voice[1], s->mute,
145 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
146 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
147 AUD_set_volume_in(s->adc_voice[2], s->mute,
148 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
149 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
683efdcb
AZ		 150
151 /* FIXME: multiply all volumes by s->outvol[0], s->outvol[1] */
152
153 /* Speaker: LOUT2VOL ROUT2VOL */
154 AUD_set_volume_out(s->dac_voice[0], s->mute,
db502b61
AZ		 155 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[4]),
156 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[5]));
683efdcb 157
db502b61 158 /* Headphone: LOUT1VOL ROUT1VOL */
683efdcb 159 AUD_set_volume_out(s->dac_voice[1], s->mute,
db502b61
AZ		 160 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[2]),
161 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[3]));
683efdcb
AZ		 162
163 /* MONOOUT: MONOVOL MONOVOL */
164 AUD_set_volume_out(s->dac_voice[2], s->mute,
db502b61
AZ		 165 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]),
166 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]));
683efdcb
AZ		 167}
168
bc24a225 169static void wm8750_set_format(WM8750State *s)
adb86c37
AZ		 170{
171 int i;
1ea879e5 172 struct audsettings in_fmt;
173 struct audsettings out_fmt;
174 struct audsettings monoout_fmt;
adb86c37
AZ		 175
176 wm8750_out_flush(s);
177
178 if (s->in[0] && *s->in[0])
179 AUD_set_active_in(*s->in[0], 0);
180 if (s->out[0] && *s->out[0])
181 AUD_set_active_out(*s->out[0], 0);
182
183 for (i = 0; i < IN_PORT_N; i ++)
184 if (s->adc_voice[i]) {
185 AUD_close_in(&s->card, s->adc_voice[i]);
511d2b14 186 s->adc_voice[i] = NULL;
adb86c37
AZ		 187 }
188 for (i = 0; i < OUT_PORT_N; i ++)
189 if (s->dac_voice[i]) {
190 AUD_close_out(&s->card, s->dac_voice[i]);
511d2b14 191 s->dac_voice[i] = NULL;
adb86c37
AZ		 192 }
193
194 if (!s->enable)
195 return;
196
197 /* Setup input */
198 in_fmt.endianness = 0;
199 in_fmt.nchannels = 2;
af83e09e 200 in_fmt.freq = s->adc_hz;
adb86c37
AZ		 201 in_fmt.fmt = AUD_FMT_S16;
202
203 s->adc_voice[0] = AUD_open_in(&s->card, s->adc_voice[0],
204 CODEC ".input1", s, wm8750_audio_in_cb, &in_fmt);
205 s->adc_voice[1] = AUD_open_in(&s->card, s->adc_voice[1],
206 CODEC ".input2", s, wm8750_audio_in_cb, &in_fmt);
207 s->adc_voice[2] = AUD_open_in(&s->card, s->adc_voice[2],
208 CODEC ".input3", s, wm8750_audio_in_cb, &in_fmt);
209
210 /* Setup output */
211 out_fmt.endianness = 0;
212 out_fmt.nchannels = 2;
af83e09e 213 out_fmt.freq = s->dac_hz;
adb86c37
AZ		 214 out_fmt.fmt = AUD_FMT_S16;
215 monoout_fmt.endianness = 0;
216 monoout_fmt.nchannels = 1;
217 monoout_fmt.freq = s->rate->dac_hz;
218 monoout_fmt.fmt = AUD_FMT_S16;
219
220 s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
221 CODEC ".speaker", s, wm8750_audio_out_cb, &out_fmt);
222 s->dac_voice[1] = AUD_open_out(&s->card, s->dac_voice[1],
223 CODEC ".headphone", s, wm8750_audio_out_cb, &out_fmt);
224 /* MONOMIX is also in stereo for simplicity */
225 s->dac_voice[2] = AUD_open_out(&s->card, s->dac_voice[2],
226 CODEC ".monomix", s, wm8750_audio_out_cb, &out_fmt);
227 /* no sense emulating OUT3 which is a mix of other outputs */
228
683efdcb
AZ		 229 wm8750_vol_update(s);
230
adb86c37
AZ		 231 /* We should connect the left and right channels to their
232 * respective inputs/outputs but we have completely no need
233 * for mixing or combining paths to different ports, so we
234 * connect both channels to where the left channel is routed. */
235 if (s->in[0] && *s->in[0])
236 AUD_set_active_in(*s->in[0], 1);
237 if (s->out[0] && *s->out[0])
238 AUD_set_active_out(*s->out[0], 1);
239}
240
bc24a225 241static void wm8750_clk_update(WM8750State *s, int ext)
af83e09e
AZ		 242{
243 if (s->master || !s->ext_dac_hz)
244 s->dac_hz = s->rate->dac_hz;
245 else
246 s->dac_hz = s->ext_dac_hz;
247
248 if (s->master || !s->ext_adc_hz)
249 s->adc_hz = s->rate->adc_hz;
250 else
251 s->adc_hz = s->ext_adc_hz;
252
253 if (s->master || (!s->ext_dac_hz && !s->ext_adc_hz)) {
254 if (!ext)
255 wm8750_set_format(s);
256 } else {
257 if (ext)
258 wm8750_set_format(s);
259 }
260}
261
cdbe40ca 262static void wm8750_reset(i2c_slave *i2c)
adb86c37 263{
bc24a225 264 WM8750State *s = (WM8750State *) i2c;
eb69b50a 265 s->rate = &wm_rate_table[0];
adb86c37 266 s->enable = 0;
af83e09e 267 wm8750_clk_update(s, 1);
adb86c37
AZ		 268 s->diff[0] = 0;
269 s->diff[1] = 0;
270 s->ds = 0;
271 s->alc = 0;
272 s->in[0] = &s->adc_voice[0];
273 s->invol[0] = 0x17;
274 s->invol[1] = 0x17;
275 s->invol[2] = 0xc3;
276 s->invol[3] = 0xc3;
277 s->out[0] = &s->dac_voice[0];
278 s->outvol[0] = 0xff;
279 s->outvol[1] = 0xff;
280 s->outvol[2] = 0x79;
281 s->outvol[3] = 0x79;
282 s->outvol[4] = 0x79;
283 s->outvol[5] = 0x79;
db502b61 284 s->outvol[6] = 0x79;
adb86c37
AZ		 285 s->inmute[0] = 0;
286 s->inmute[1] = 0;
287 s->outmute[0] = 0;
288 s->outmute[1] = 0;
289 s->mute = 1;
290 s->path[0] = 0;
291 s->path[1] = 0;
292 s->path[2] = 0;
293 s->path[3] = 0;
294 s->mpath[0] = 0;
295 s->mpath[1] = 0;
296 s->format = 0x0a;
297 s->idx_in = sizeof(s->data_in);
298 s->req_in = 0;
299 s->idx_out = 0;
300 s->req_out = 0;
683efdcb 301 wm8750_vol_update(s);
adb86c37
AZ		 302 s->i2c_len = 0;
303}
304
305static void wm8750_event(i2c_slave *i2c, enum i2c_event event)
306{
bc24a225 307 WM8750State *s = (WM8750State *) i2c;
adb86c37
AZ		 308
309 switch (event) {
310 case I2C_START_SEND:
311 s->i2c_len = 0;
312 break;
313 case I2C_FINISH:
314#ifdef VERBOSE
315 if (s->i2c_len < 2)
316 printf("%s: message too short (%i bytes)\n",
317 __FUNCTION__, s->i2c_len);
318#endif
319 break;
320 default:
321 break;
322 }
323}
324
325#define WM8750_LINVOL 0x00
326#define WM8750_RINVOL 0x01
327#define WM8750_LOUT1V 0x02
328#define WM8750_ROUT1V 0x03
329#define WM8750_ADCDAC 0x05
330#define WM8750_IFACE 0x07
331#define WM8750_SRATE 0x08
332#define WM8750_LDAC 0x0a
333#define WM8750_RDAC 0x0b
334#define WM8750_BASS 0x0c
335#define WM8750_TREBLE 0x0d
336#define WM8750_RESET 0x0f
337#define WM8750_3D 0x10
338#define WM8750_ALC1 0x11
339#define WM8750_ALC2 0x12
340#define WM8750_ALC3 0x13
341#define WM8750_NGATE 0x14
342#define WM8750_LADC 0x15
343#define WM8750_RADC 0x16
344#define WM8750_ADCTL1 0x17
345#define WM8750_ADCTL2 0x18
346#define WM8750_PWR1 0x19
347#define WM8750_PWR2 0x1a
348#define WM8750_ADCTL3 0x1b
349#define WM8750_ADCIN 0x1f
350#define WM8750_LADCIN 0x20
351#define WM8750_RADCIN 0x21
352#define WM8750_LOUTM1 0x22
353#define WM8750_LOUTM2 0x23
354#define WM8750_ROUTM1 0x24
355#define WM8750_ROUTM2 0x25
356#define WM8750_MOUTM1 0x26
357#define WM8750_MOUTM2 0x27
358#define WM8750_LOUT2V 0x28
359#define WM8750_ROUT2V 0x29
360#define WM8750_MOUTV 0x2a
361
362static int wm8750_tx(i2c_slave *i2c, uint8_t data)
363{
bc24a225 364 WM8750State *s = (WM8750State *) i2c;
adb86c37
AZ		 365 uint8_t cmd;
366 uint16_t value;
367
368 if (s->i2c_len >= 2) {
369 printf("%s: long message (%i bytes)\n", __FUNCTION__, s->i2c_len);
370#ifdef VERBOSE
371 return 1;
372#endif
373 }
374 s->i2c_data[s->i2c_len ++] = data;
375 if (s->i2c_len != 2)
376 return 0;
377
378 cmd = s->i2c_data[0] >> 1;
379 value = ((s->i2c_data[0] << 8) | s->i2c_data[1]) & 0x1ff;
380
381 switch (cmd) {
382 case WM8750_LADCIN: /* ADC Signal Path Control (Left) */
383 s->diff[0] = (((value >> 6) & 3) == 3); /* LINSEL */
384 if (s->diff[0])
385 s->in[0] = &s->adc_voice[0 + s->ds * 1];
386 else
387 s->in[0] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
388 break;
389
390 case WM8750_RADCIN: /* ADC Signal Path Control (Right) */
391 s->diff[1] = (((value >> 6) & 3) == 3); /* RINSEL */
392 if (s->diff[1])
393 s->in[1] = &s->adc_voice[0 + s->ds * 1];
394 else
395 s->in[1] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
396 break;
397
398 case WM8750_ADCIN: /* ADC Input Mode */
399 s->ds = (value >> 8) & 1; /* DS */
400 if (s->diff[0])
401 s->in[0] = &s->adc_voice[0 + s->ds * 1];
402 if (s->diff[1])
403 s->in[1] = &s->adc_voice[0 + s->ds * 1];
404 s->monomix[0] = (value >> 6) & 3; /* MONOMIX */
405 break;
406
407 case WM8750_ADCTL1: /* Additional Control (1) */
408 s->monomix[1] = (value >> 1) & 1; /* DMONOMIX */
409 break;
410
411 case WM8750_PWR1: /* Power Management (1) */
412 s->enable = ((value >> 6) & 7) == 3; /* VMIDSEL, VREF */
413 wm8750_set_format(s);
414 break;
415
416 case WM8750_LINVOL: /* Left Channel PGA */
417 s->invol[0] = value & 0x3f; /* LINVOL */
418 s->inmute[0] = (value >> 7) & 1; /* LINMUTE */
683efdcb 419 wm8750_vol_update(s);
adb86c37
AZ		 420 break;
421
422 case WM8750_RINVOL: /* Right Channel PGA */
423 s->invol[1] = value & 0x3f; /* RINVOL */
424 s->inmute[1] = (value >> 7) & 1; /* RINMUTE */
683efdcb 425 wm8750_vol_update(s);
adb86c37
AZ		 426 break;
427
428 case WM8750_ADCDAC: /* ADC and DAC Control */
429 s->pol = (value >> 5) & 3; /* ADCPOL */
430 s->mute = (value >> 3) & 1; /* DACMU */
683efdcb 431 wm8750_vol_update(s);
adb86c37
AZ		 432 break;
433
434 case WM8750_ADCTL3: /* Additional Control (3) */
435 break;
436
437 case WM8750_LADC: /* Left ADC Digital Volume */
438 s->invol[2] = value & 0xff; /* LADCVOL */
db502b61 439 wm8750_vol_update(s);
adb86c37
AZ		 440 break;
441
442 case WM8750_RADC: /* Right ADC Digital Volume */
443 s->invol[3] = value & 0xff; /* RADCVOL */
db502b61 444 wm8750_vol_update(s);
adb86c37
AZ		 445 break;
446
447 case WM8750_ALC1: /* ALC Control (1) */
448 s->alc = (value >> 7) & 3; /* ALCSEL */
449 break;
450
451 case WM8750_NGATE: /* Noise Gate Control */
452 case WM8750_3D: /* 3D enhance */
453 break;
454
455 case WM8750_LDAC: /* Left Channel Digital Volume */
456 s->outvol[0] = value & 0xff; /* LDACVOL */
db502b61 457 wm8750_vol_update(s);
adb86c37
AZ		 458 break;
459
460 case WM8750_RDAC: /* Right Channel Digital Volume */
461 s->outvol[1] = value & 0xff; /* RDACVOL */
db502b61 462 wm8750_vol_update(s);
adb86c37
AZ		 463 break;
464
465 case WM8750_BASS: /* Bass Control */
466 break;
467
468 case WM8750_LOUTM1: /* Left Mixer Control (1) */
469 s->path[0] = (value >> 8) & 1; /* LD2LO */
db502b61
AZ		 470 /* TODO: mute/unmute respective paths */
471 wm8750_vol_update(s);
adb86c37
AZ		 472 break;
473
474 case WM8750_LOUTM2: /* Left Mixer Control (2) */
475 s->path[1] = (value >> 8) & 1; /* RD2LO */
db502b61
AZ		 476 /* TODO: mute/unmute respective paths */
477 wm8750_vol_update(s);
adb86c37
AZ		 478 break;
479
480 case WM8750_ROUTM1: /* Right Mixer Control (1) */
481 s->path[2] = (value >> 8) & 1; /* LD2RO */
db502b61
AZ		 482 /* TODO: mute/unmute respective paths */
483 wm8750_vol_update(s);
adb86c37
AZ		 484 break;
485
486 case WM8750_ROUTM2: /* Right Mixer Control (2) */
487 s->path[3] = (value >> 8) & 1; /* RD2RO */
db502b61
AZ		 488 /* TODO: mute/unmute respective paths */
489 wm8750_vol_update(s);
adb86c37
AZ		 490 break;
491
492 case WM8750_MOUTM1: /* Mono Mixer Control (1) */
493 s->mpath[0] = (value >> 8) & 1; /* LD2MO */
db502b61
AZ		 494 /* TODO: mute/unmute respective paths */
495 wm8750_vol_update(s);
adb86c37
AZ		 496 break;
497
498 case WM8750_MOUTM2: /* Mono Mixer Control (2) */
499 s->mpath[1] = (value >> 8) & 1; /* RD2MO */
db502b61
AZ		 500 /* TODO: mute/unmute respective paths */
501 wm8750_vol_update(s);
adb86c37
AZ		 502 break;
503
504 case WM8750_LOUT1V: /* LOUT1 Volume */
683efdcb 505 s->outvol[2] = value & 0x7f; /* LOUT1VOL */
db502b61 506 wm8750_vol_update(s);
adb86c37
AZ		 507 break;
508
509 case WM8750_LOUT2V: /* LOUT2 Volume */
510 s->outvol[4] = value & 0x7f; /* LOUT2VOL */
683efdcb 511 wm8750_vol_update(s);
adb86c37
AZ		 512 break;
513
514 case WM8750_ROUT1V: /* ROUT1 Volume */
683efdcb 515 s->outvol[3] = value & 0x7f; /* ROUT1VOL */
db502b61 516 wm8750_vol_update(s);
adb86c37
AZ		 517 break;
518
519 case WM8750_ROUT2V: /* ROUT2 Volume */
520 s->outvol[5] = value & 0x7f; /* ROUT2VOL */
683efdcb 521 wm8750_vol_update(s);
adb86c37
AZ		 522 break;
523
524 case WM8750_MOUTV: /* MONOOUT Volume */
525 s->outvol[6] = value & 0x7f; /* MONOOUTVOL */
db502b61 526 wm8750_vol_update(s);
adb86c37
AZ		 527 break;
528
529 case WM8750_ADCTL2: /* Additional Control (2) */
530 break;
531
532 case WM8750_PWR2: /* Power Management (2) */
533 s->power = value & 0x7e;
db502b61
AZ		 534 /* TODO: mute/unmute respective paths */
535 wm8750_vol_update(s);
adb86c37
AZ		 536 break;
537
538 case WM8750_IFACE: /* Digital Audio Interface Format */
adb86c37 539 s->format = value;
af83e09e
AZ		 540 s->master = (value >> 6) & 1; /* MS */
541 wm8750_clk_update(s, s->master);
adb86c37
AZ		 542 break;
543
544 case WM8750_SRATE: /* Clocking and Sample Rate Control */
545 s->rate = &wm_rate_table[(value >> 1) & 0x1f];
af83e09e 546 wm8750_clk_update(s, 0);
adb86c37
AZ		 547 break;
548
549 case WM8750_RESET: /* Reset */
550 wm8750_reset(&s->i2c);
551 break;
552
553#ifdef VERBOSE
554 default:
555 printf("%s: unknown register %02x\n", __FUNCTION__, cmd);
556#endif
557 }
558
559 return 0;
560}
561
562static int wm8750_rx(i2c_slave *i2c)
563{
564 return 0x00;
565}
566
aa941b94
AZ		 567static void wm8750_save(QEMUFile *f, void *opaque)
568{
bc24a225 569 WM8750State *s = (WM8750State *) opaque;
aa941b94
AZ		 570 int i;
571 qemu_put_8s(f, &s->i2c_data[0]);
572 qemu_put_8s(f, &s->i2c_data[1]);
573 qemu_put_be32(f, s->i2c_len);
574 qemu_put_be32(f, s->enable);
575 qemu_put_be32(f, s->idx_in);
576 qemu_put_be32(f, s->req_in);
577 qemu_put_be32(f, s->idx_out);
578 qemu_put_be32(f, s->req_out);
579
580 for (i = 0; i < 7; i ++)
581 qemu_put_8s(f, &s->outvol[i]);
582 for (i = 0; i < 2; i ++)
583 qemu_put_8s(f, &s->outmute[i]);
584 for (i = 0; i < 4; i ++)
585 qemu_put_8s(f, &s->invol[i]);
586 for (i = 0; i < 2; i ++)
587 qemu_put_8s(f, &s->inmute[i]);
588
589 for (i = 0; i < 2; i ++)
590 qemu_put_8s(f, &s->diff[i]);
591 qemu_put_8s(f, &s->pol);
592 qemu_put_8s(f, &s->ds);
593 for (i = 0; i < 2; i ++)
594 qemu_put_8s(f, &s->monomix[i]);
595 qemu_put_8s(f, &s->alc);
596 qemu_put_8s(f, &s->mute);
597 for (i = 0; i < 4; i ++)
598 qemu_put_8s(f, &s->path[i]);
599 for (i = 0; i < 2; i ++)
600 qemu_put_8s(f, &s->mpath[i]);
601 qemu_put_8s(f, &s->format);
602 qemu_put_8s(f, &s->power);
aa941b94
AZ		 603 qemu_put_byte(f, (s->rate - wm_rate_table) / sizeof(*s->rate));
604 i2c_slave_save(f, &s->i2c);
605}
606
607static int wm8750_load(QEMUFile *f, void *opaque, int version_id)
608{
bc24a225 609 WM8750State *s = (WM8750State *) opaque;
aa941b94
AZ		 610 int i;
611 qemu_get_8s(f, &s->i2c_data[0]);
612 qemu_get_8s(f, &s->i2c_data[1]);
613 s->i2c_len = qemu_get_be32(f);
614 s->enable = qemu_get_be32(f);
615 s->idx_in = qemu_get_be32(f);
616 s->req_in = qemu_get_be32(f);
617 s->idx_out = qemu_get_be32(f);
618 s->req_out = qemu_get_be32(f);
619
620 for (i = 0; i < 7; i ++)
621 qemu_get_8s(f, &s->outvol[i]);
622 for (i = 0; i < 2; i ++)
623 qemu_get_8s(f, &s->outmute[i]);
624 for (i = 0; i < 4; i ++)
625 qemu_get_8s(f, &s->invol[i]);
626 for (i = 0; i < 2; i ++)
627 qemu_get_8s(f, &s->inmute[i]);
628
629 for (i = 0; i < 2; i ++)
630 qemu_get_8s(f, &s->diff[i]);
631 qemu_get_8s(f, &s->pol);
632 qemu_get_8s(f, &s->ds);
633 for (i = 0; i < 2; i ++)
634 qemu_get_8s(f, &s->monomix[i]);
635 qemu_get_8s(f, &s->alc);
636 qemu_get_8s(f, &s->mute);
637 for (i = 0; i < 4; i ++)
638 qemu_get_8s(f, &s->path[i]);
639 for (i = 0; i < 2; i ++)
640 qemu_get_8s(f, &s->mpath[i]);
641 qemu_get_8s(f, &s->format);
642 qemu_get_8s(f, &s->power);
aa941b94
AZ		 643 s->rate = &wm_rate_table[(uint8_t) qemu_get_byte(f) & 0x1f];
644 i2c_slave_load(f, &s->i2c);
645 return 0;
646}
647
81a322d4 648static int wm8750_init(i2c_slave *i2c)
adb86c37 649{
cdbe40ca 650 WM8750State *s = FROM_I2C_SLAVE(WM8750State, i2c);
adb86c37 651
1a7dafce 652 AUD_register_card(CODEC, &s->card);
adb86c37
AZ		 653 wm8750_reset(&s->i2c);
654
18be5187 655 register_savevm(CODEC, -1, 0, wm8750_save, wm8750_load, s);
81a322d4 656 return 0;
adb86c37
AZ		 657}
658
523111e7 659#if 0
9596ebb7 660static void wm8750_fini(i2c_slave *i2c)
adb86c37 661{
bc24a225 662 WM8750State *s = (WM8750State *) i2c;
adb86c37
AZ		 663 wm8750_reset(&s->i2c);
664 AUD_remove_card(&s->card);
665 qemu_free(s);
666}
523111e7 667#endif
adb86c37 668
cdbe40ca 669void wm8750_data_req_set(DeviceState *dev,
adb86c37
AZ		 670 void (*data_req)(void *, int, int), void *opaque)
671{
cdbe40ca 672 WM8750State *s = FROM_I2C_SLAVE(WM8750State, I2C_SLAVE_FROM_QDEV(dev));
adb86c37
AZ		 673 s->data_req = data_req;
674 s->opaque = opaque;
675}
676
677void wm8750_dac_dat(void *opaque, uint32_t sample)
678{
bc24a225 679 WM8750State *s = (WM8750State *) opaque;
af83e09e 680
683efdcb 681 *(uint32_t *) &s->data_out[s->idx_out] = sample;
adb86c37
AZ		 682 s->req_out -= 4;
683 s->idx_out += 4;
684 if (s->idx_out >= sizeof(s->data_out) || s->req_out <= 0)
685 wm8750_out_flush(s);
686}
687
662caa6f
AZ		 688void *wm8750_dac_buffer(void *opaque, int samples)
689{
bc24a225 690 WM8750State *s = (WM8750State *) opaque;
662caa6f
AZ		 691 /* XXX: Should check if there are <i>samples</i> free samples available */
692 void *ret = s->data_out + s->idx_out;
693
694 s->idx_out += samples << 2;
695 s->req_out -= samples << 2;
696 return ret;
697}
698
699void wm8750_dac_commit(void *opaque)
700{
bc24a225 701 WM8750State *s = (WM8750State *) opaque;
662caa6f 702
7442511c 703 wm8750_out_flush(s);
662caa6f
AZ		 704}
705
adb86c37
AZ		 706uint32_t wm8750_adc_dat(void *opaque)
707{
bc24a225 708 WM8750State *s = (WM8750State *) opaque;
adb86c37 709 uint32_t *data;
af83e09e 710
adb86c37
AZ		 711 if (s->idx_in >= sizeof(s->data_in))
712 wm8750_in_load(s);
af83e09e 713
adb86c37
AZ		 714 data = (uint32_t *) &s->data_in[s->idx_in];
715 s->req_in -= 4;
716 s->idx_in += 4;
683efdcb 717 return *data;
adb86c37 718}
af83e09e 719
b0f74c87 720void wm8750_set_bclk_in(void *opaque, int new_hz)
af83e09e 721{
bc24a225 722 WM8750State *s = (WM8750State *) opaque;
af83e09e 723
b0f74c87
AZ		 724 s->ext_adc_hz = new_hz;
725 s->ext_dac_hz = new_hz;
af83e09e
AZ		 726 wm8750_clk_update(s, 1);
727}
cdbe40ca
PB		 728
729static I2CSlaveInfo wm8750_info = {
074f2fff
GH		 730 .qdev.name = "wm8750",
731 .qdev.size = sizeof(WM8750State),
cdbe40ca
PB		 732 .init = wm8750_init,
733 .event = wm8750_event,
734 .recv = wm8750_rx,
735 .send = wm8750_tx
736};
737
738static void wm8750_register_devices(void)
739{
074f2fff 740 i2c_register_slave(&wm8750_info);
cdbe40ca
PB		 741}
742
743device_init(wm8750_register_devices)
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