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Commit | Line | Data |
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2c44220d MAL |
1 | xtensa_ss = ss.source_set() |
2 | xtensa_ss.add(files( | |
3 | 'mx_pic.c', | |
4 | 'pic_cpu.c', | |
5 | 'xtensa_memory.c', | |
6 | )) | |
7 | xtensa_ss.add(when: 'CONFIG_XTENSA_SIM', if_true: files('sim.c')) | |
8 | xtensa_ss.add(when: 'CONFIG_XTENSA_VIRT', if_true: files('virt.c')) | |
9 | xtensa_ss.add(when: 'CONFIG_XTENSA_XTFPGA', if_true: files('xtfpga.c')) | |
10 | ||
11 | hw_arch += {'xtensa': xtensa_ss} |