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337aadff AC |
1 | /* |
2 | * CPPC (Collaborative Processor Performance Control) methods used | |
3 | * by CPUfreq drivers. | |
4 | * | |
5 | * (C) Copyright 2014, 2015 Linaro Ltd. | |
6 | * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * as published by the Free Software Foundation; version 2 | |
11 | * of the License. | |
12 | */ | |
13 | ||
14 | #ifndef _CPPC_ACPI_H | |
15 | #define _CPPC_ACPI_H | |
16 | ||
17 | #include <linux/acpi.h> | |
337aadff AC |
18 | #include <linux/types.h> |
19 | ||
866ae696 | 20 | #include <acpi/pcc.h> |
337aadff AC |
21 | #include <acpi/processor.h> |
22 | ||
23 | /* Only support CPPCv2 for now. */ | |
24 | #define CPPC_NUM_ENT 21 | |
25 | #define CPPC_REV 2 | |
26 | ||
27 | #define PCC_CMD_COMPLETE 1 | |
28 | #define MAX_CPC_REG_ENT 19 | |
29 | ||
30 | /* CPPC specific PCC commands. */ | |
31 | #define CMD_READ 0 | |
32 | #define CMD_WRITE 1 | |
33 | ||
34 | /* Each register has the folowing format. */ | |
35 | struct cpc_reg { | |
36 | u8 descriptor; | |
37 | u16 length; | |
38 | u8 space_id; | |
39 | u8 bit_width; | |
40 | u8 bit_offset; | |
41 | u8 access_width; | |
42 | u64 __iomem address; | |
43 | } __packed; | |
44 | ||
45 | /* | |
46 | * Each entry in the CPC table is either | |
47 | * of type ACPI_TYPE_BUFFER or | |
48 | * ACPI_TYPE_INTEGER. | |
49 | */ | |
50 | struct cpc_register_resource { | |
51 | acpi_object_type type; | |
52 | union { | |
53 | struct cpc_reg reg; | |
54 | u64 int_value; | |
55 | } cpc_entry; | |
56 | }; | |
57 | ||
58 | /* Container to hold the CPC details for each CPU */ | |
59 | struct cpc_desc { | |
60 | int num_entries; | |
61 | int version; | |
62 | int cpu_id; | |
63 | struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT]; | |
64 | struct acpi_psd_package domain_info; | |
65 | }; | |
66 | ||
67 | /* These are indexes into the per-cpu cpc_regs[]. Order is important. */ | |
68 | enum cppc_regs { | |
69 | HIGHEST_PERF, | |
70 | NOMINAL_PERF, | |
71 | LOW_NON_LINEAR_PERF, | |
72 | LOWEST_PERF, | |
73 | GUARANTEED_PERF, | |
74 | DESIRED_PERF, | |
75 | MIN_PERF, | |
76 | MAX_PERF, | |
77 | PERF_REDUC_TOLERANCE, | |
78 | TIME_WINDOW, | |
79 | CTR_WRAP_TIME, | |
80 | REFERENCE_CTR, | |
81 | DELIVERED_CTR, | |
82 | PERF_LIMITED, | |
83 | ENABLE, | |
84 | AUTO_SEL_ENABLE, | |
85 | AUTO_ACT_WINDOW, | |
86 | ENERGY_PERF, | |
87 | REFERENCE_PERF, | |
88 | }; | |
89 | ||
90 | /* | |
91 | * Categorization of registers as described | |
92 | * in the ACPI v.5.1 spec. | |
93 | * XXX: Only filling up ones which are used by governors | |
94 | * today. | |
95 | */ | |
96 | struct cppc_perf_caps { | |
97 | u32 highest_perf; | |
98 | u32 nominal_perf; | |
99 | u32 reference_perf; | |
100 | u32 lowest_perf; | |
101 | }; | |
102 | ||
103 | struct cppc_perf_ctrls { | |
104 | u32 max_perf; | |
105 | u32 min_perf; | |
106 | u32 desired_perf; | |
107 | }; | |
108 | ||
109 | struct cppc_perf_fb_ctrs { | |
110 | u64 reference; | |
111 | u64 prev_reference; | |
112 | u64 delivered; | |
113 | u64 prev_delivered; | |
114 | }; | |
115 | ||
116 | /* Per CPU container for runtime CPPC management. */ | |
117 | struct cpudata { | |
118 | int cpu; | |
119 | struct cppc_perf_caps perf_caps; | |
120 | struct cppc_perf_ctrls perf_ctrls; | |
121 | struct cppc_perf_fb_ctrs perf_fb_ctrs; | |
122 | struct cpufreq_policy *cur_policy; | |
123 | unsigned int shared_type; | |
124 | cpumask_var_t shared_cpu_map; | |
125 | }; | |
126 | ||
127 | extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs); | |
128 | extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls); | |
129 | extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps); | |
130 | extern int acpi_get_psd_map(struct cpudata **); | |
131 | ||
337aadff | 132 | #endif /* _CPPC_ACPI_H*/ |