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1da177e4 LT |
1 | /* |
2 | * linux/include/asm-arm/arch-cl7500/memory.h | |
3 | * | |
4 | * Copyright (c) 1996,1997,1998 Russell King. | |
5 | * | |
6 | * Changelog: | |
7 | * 20-Oct-1996 RMK Created | |
8 | * 31-Dec-1997 RMK Fixed definitions to reduce warnings | |
9 | * 11-Jan-1998 RMK Uninlined to reduce hits on cache | |
10 | * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt | |
11 | * 21-Mar-1999 RMK Renamed to memory.h | |
12 | * RMK Added TASK_SIZE and PAGE_OFFSET | |
13 | */ | |
14 | #ifndef __ASM_ARCH_MEMORY_H | |
15 | #define __ASM_ARCH_MEMORY_H | |
16 | ||
17 | /* | |
18 | * Physical DRAM offset. | |
19 | */ | |
f09b9979 | 20 | #define PHYS_OFFSET UL(0x10000000) |
1da177e4 LT |
21 | |
22 | /* | |
23 | * These are exactly the same on the RiscPC as the | |
24 | * physical memory view. | |
25 | */ | |
26 | #define __virt_to_bus(x) __virt_to_phys(x) | |
27 | #define __bus_to_virt(x) __phys_to_virt(x) | |
28 | ||
74d02fb9 RK |
29 | /* |
30 | * Cache flushing area - ROM | |
31 | */ | |
32 | #define FLUSH_BASE_PHYS 0x00000000 | |
33 | #define FLUSH_BASE 0xdf000000 | |
34 | ||
1da177e4 | 35 | #endif |