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1da177e4 LT |
1 | /* |
2 | * linux/include/asm-arm/arch-ixp2000/system.h | |
3 | * | |
4 | * Copyright (C) 2002 Intel Corp. | |
5 | * Copyricht (C) 2003-2005 MontaVista Software, Inc. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
be509729 | 12 | #include <asm/arch/hardware.h> |
1da177e4 LT |
13 | #include <asm/mach-types.h> |
14 | ||
15 | static inline void arch_idle(void) | |
16 | { | |
17 | cpu_do_idle(); | |
18 | } | |
19 | ||
20 | static inline void arch_reset(char mode) | |
21 | { | |
22 | local_irq_disable(); | |
23 | ||
24 | /* | |
25 | * Reset flash banking register so that we are pointing at | |
26 | * RedBoot bank. | |
27 | */ | |
28 | if (machine_is_ixdp2401()) { | |
e9b72e43 LB |
29 | ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG, |
30 | ((0 >> IXDP2X01_FLASH_WINDOW_BITS) | |
31 | | IXDP2X01_CPLD_FLASH_INTERN)); | |
32 | ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff); | |
1da177e4 LT |
33 | } |
34 | ||
35 | /* | |
36 | * On IXDP2801 we need to write this magic sequence to the CPLD | |
37 | * to cause a complete reset of the CPU and all external devices | |
e9b72e43 | 38 | * and move the flash bank register back to 0. |
1da177e4 | 39 | */ |
0328ad23 | 40 | if (machine_is_ixdp2801() || machine_is_ixdp28x5()) { |
1da177e4 | 41 | unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; |
e9b72e43 | 42 | |
1da177e4 | 43 | reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); |
e9b72e43 LB |
44 | ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg); |
45 | ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000); | |
1da177e4 LT |
46 | } |
47 | ||
e9b72e43 | 48 | ixp2000_reg_wrb(IXP2000_RESET0, RSTALL); |
1da177e4 | 49 | } |