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1 | /* include/asm-arm/arch-lh7a40x/constants.h |
2 | * | |
3 | * Copyright (C) 2004 Coastal Environmental Systems | |
4 | * Copyright (C) 2004 Logic Product Development | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * version 2 as published by the Free Software Foundation. | |
9 | * | |
10 | */ | |
11 | ||
12 | #ifndef __ASM_ARCH_CONSTANTS_H | |
13 | #define __ASM_ARCH_CONSTANTS_H | |
14 | ||
15 | #include <linux/config.h> | |
16 | ||
17 | /* Addressing constants */ | |
18 | ||
19 | /* SoC CPU IO addressing */ | |
20 | #define IO_PHYS (0x80000000) | |
21 | #define IO_VIRT (0xf8000000) | |
22 | #define IO_SIZE (0x0000B000) | |
23 | ||
24 | #ifdef CONFIG_MACH_KEV7A400 | |
25 | # define CPLD_PHYS (0x20000000) | |
26 | # define CPLD_VIRT (0xf2000000) | |
27 | # define CPLD_SIZE PAGE_SIZE | |
28 | #endif | |
29 | ||
30 | #if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404) | |
31 | ||
32 | # define IOBARRIER_PHYS 0xc0000000 /* Start of SDRAM */ | |
33 | /*# define IOBARRIER_PHYS 0x00000000 */ /* Start of flash */ | |
34 | # define IOBARRIER_VIRT 0xf0000000 | |
35 | # define IOBARRIER_SIZE PAGE_SIZE | |
36 | ||
37 | # define CF_PHYS 0x60200000 | |
38 | # define CF_VIRT 0xf6020000 | |
39 | # define CF_SIZE (8*1024) | |
40 | ||
41 | /* The IO mappings for the LPD CPLD are, unfortunately, sparse. */ | |
42 | # define CPLDX_PHYS(x) (0x70000000 | ((x) << 20)) | |
43 | # define CPLDX_VIRT(x) (0xf7000000 | ((x) << 16)) | |
44 | # define CPLD00_PHYS CPLDX_PHYS (0x00) /* Wired LAN */ | |
45 | # define CPLD00_VIRT CPLDX_VIRT (0x00) | |
46 | # define CPLD00_SIZE PAGE_SIZE | |
47 | # define CPLD02_PHYS CPLDX_PHYS (0x02) | |
48 | # define CPLD02_VIRT CPLDX_VIRT (0x02) | |
49 | # define CPLD02_SIZE PAGE_SIZE | |
50 | # define CPLD06_PHYS CPLDX_PHYS (0x06) | |
51 | # define CPLD06_VIRT CPLDX_VIRT (0x06) | |
52 | # define CPLD06_SIZE PAGE_SIZE | |
53 | # define CPLD08_PHYS CPLDX_PHYS (0x08) | |
54 | # define CPLD08_VIRT CPLDX_VIRT (0x08) | |
55 | # define CPLD08_SIZE PAGE_SIZE | |
56 | # define CPLD0C_PHYS CPLDX_PHYS (0x0c) | |
57 | # define CPLD0C_VIRT CPLDX_VIRT (0x0c) | |
58 | # define CPLD0C_SIZE PAGE_SIZE | |
59 | # define CPLD0E_PHYS CPLDX_PHYS (0x0e) | |
60 | # define CPLD0E_VIRT CPLDX_VIRT (0x0e) | |
61 | # define CPLD0E_SIZE PAGE_SIZE | |
62 | # define CPLD10_PHYS CPLDX_PHYS (0x10) | |
63 | # define CPLD10_VIRT CPLDX_VIRT (0x10) | |
64 | # define CPLD10_SIZE PAGE_SIZE | |
65 | # define CPLD12_PHYS CPLDX_PHYS (0x12) | |
66 | # define CPLD12_VIRT CPLDX_VIRT (0x12) | |
67 | # define CPLD12_SIZE PAGE_SIZE | |
68 | # define CPLD14_PHYS CPLDX_PHYS (0x14) | |
69 | # define CPLD14_VIRT CPLDX_VIRT (0x14) | |
70 | # define CPLD14_SIZE PAGE_SIZE | |
71 | # define CPLD16_PHYS CPLDX_PHYS (0x16) | |
72 | # define CPLD16_VIRT CPLDX_VIRT (0x16) | |
73 | # define CPLD16_SIZE PAGE_SIZE | |
74 | # define CPLD18_PHYS CPLDX_PHYS (0x18) | |
75 | # define CPLD18_VIRT CPLDX_VIRT (0x18) | |
76 | # define CPLD18_SIZE PAGE_SIZE | |
77 | # define CPLD1A_PHYS CPLDX_PHYS (0x1a) | |
78 | # define CPLD1A_VIRT CPLDX_VIRT (0x1a) | |
79 | # define CPLD1A_SIZE PAGE_SIZE | |
80 | #endif | |
81 | ||
82 | /* Timing constants */ | |
83 | ||
84 | #define XTAL_IN 14745600 /* 14.7456 MHz crystal */ | |
85 | #define PLL_CLOCK (XTAL_IN * 21) /* 309 MHz PLL clock */ | |
86 | #define MAX_HCLK_KHZ 100000 /* HCLK max limit ~100MHz */ | |
87 | ||
88 | #endif /* __ASM_ARCH_CONSTANTS_H */ |