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1 | /* |
2 | * include/asm-arm/arch-omap/omap34xx.h | |
3 | * | |
4 | * This file contains the processor specific definitions of the TI OMAP34XX. | |
5 | * | |
6 | * Copyright (C) 2007 Texas Instruments. | |
7 | * Copyright (C) 2007 Nokia Corporation. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #ifndef __ASM_ARCH_OMAP34XX_H | |
25 | #define __ASM_ARCH_OMAP34XX_H | |
26 | ||
27 | /* | |
28 | * Please place only base defines here and put the rest in device | |
29 | * specific headers. | |
30 | */ | |
31 | ||
32 | #define L4_34XX_BASE 0x48000000 | |
33 | #define L4_WK_34XX_BASE 0x48300000 | |
34 | #define L4_WK_OMAP_BASE L4_WK_34XX_BASE | |
35 | #define L4_PER_34XX_BASE 0x49000000 | |
36 | #define L4_PER_OMAP_BASE L4_PER_34XX_BASE | |
37 | #define L4_EMU_34XX_BASE 0x54000000 | |
38 | #define L4_EMU_BASE L4_EMU_34XX_BASE | |
39 | #define L3_34XX_BASE 0x68000000 | |
40 | #define L3_OMAP_BASE L3_34XX_BASE | |
41 | ||
42 | #define OMAP3430_32KSYNCT_BASE 0x48320000 | |
43 | #define OMAP3430_CM_BASE 0x48004800 | |
44 | #define OMAP3430_PRM_BASE 0x48306800 | |
45 | #define OMAP343X_SMS_BASE 0x6C000000 | |
46 | #define OMAP343X_SDRC_BASE 0x6D000000 | |
47 | #define OMAP34XX_GPMC_BASE 0x6E000000 | |
48 | #define OMAP343X_SCM_BASE 0x48002000 | |
49 | #define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE | |
50 | ||
51 | #define OMAP34XX_IC_BASE 0x48200000 | |
52 | #define OMAP34XX_IVA_INTC_BASE 0x40000000 | |
53 | #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) | |
54 | #define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000) | |
55 | #define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) | |
56 | ||
57 | ||
58 | #if defined(CONFIG_ARCH_OMAP3430) | |
59 | ||
60 | #define OMAP2_32KSYNCT_BASE OMAP3430_32KSYNCT_BASE | |
61 | #define OMAP2_CM_BASE OMAP3430_CM_BASE | |
62 | #define OMAP2_PRM_BASE OMAP3430_PRM_BASE | |
63 | #define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE) | |
64 | ||
65 | #endif | |
66 | ||
67 | #define OMAP34XX_DSP_BASE 0x58000000 | |
68 | #define OMAP34XX_DSP_MEM_BASE (OMAP34XX_DSP_BASE + 0x0) | |
69 | #define OMAP34XX_DSP_IPI_BASE (OMAP34XX_DSP_BASE + 0x1000000) | |
70 | #define OMAP34XX_DSP_MMU_BASE (OMAP34XX_DSP_BASE + 0x2000000) | |
71 | #endif /* __ASM_ARCH_OMAP34XX_H */ | |
72 |