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1da177e4 LT |
1 | /* |
2 | * Copied from linux/include/asm-arm/arch-sa1100/system.h | |
3 | * Copyright (c) 1999 Nicolas Pitre <nico@cam.org> | |
4 | */ | |
5 | #ifndef __ASM_ARCH_SYSTEM_H | |
6 | #define __ASM_ARCH_SYSTEM_H | |
7 | #include <linux/config.h> | |
f8ce2547 RK |
8 | #include <linux/clk.h> |
9 | ||
af973d2a | 10 | #include <asm/mach-types.h> |
0a5709b2 | 11 | #include <asm/hardware.h> |
9ad5897c TL |
12 | #include <asm/arch/prcm.h> |
13 | ||
14 | #ifndef CONFIG_MACH_VOICEBLUE | |
15 | #define voiceblue_reset() do {} while (0) | |
16 | #endif | |
1da177e4 LT |
17 | |
18 | static inline void arch_idle(void) | |
19 | { | |
20 | cpu_do_idle(); | |
21 | } | |
22 | ||
9ad5897c | 23 | static inline void omap1_arch_reset(char mode) |
1da177e4 | 24 | { |
af973d2a TL |
25 | /* |
26 | * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 | |
27 | * "Global Software Reset Affects Traffic Controller Frequency". | |
28 | */ | |
29 | if (cpu_is_omap5912()) { | |
30 | omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), | |
31 | DPLL_CTL); | |
32 | omap_writew(0x8, ARM_RSTCT1); | |
33 | } | |
9ad5897c | 34 | |
af973d2a TL |
35 | if (machine_is_voiceblue()) |
36 | voiceblue_reset(); | |
37 | else | |
af973d2a | 38 | omap_writew(1, ARM_RSTCT1); |
1da177e4 LT |
39 | } |
40 | ||
9ad5897c TL |
41 | static inline void omap2_arch_reset(char mode) |
42 | { | |
43 | u32 rate; | |
44 | struct clk *vclk, *sclk; | |
45 | ||
46 | vclk = clk_get(NULL, "virt_prcm_set"); | |
47 | sclk = clk_get(NULL, "sys_ck"); | |
48 | rate = clk_get_rate(sclk); | |
49 | clk_set_rate(vclk, rate); /* go to bypass for OMAP limitation */ | |
50 | RM_RSTCTRL_WKUP |= 2; | |
51 | } | |
52 | ||
53 | static inline void arch_reset(char mode) | |
54 | { | |
55 | if (!cpu_is_omap24xx()) | |
56 | omap1_arch_reset(mode); | |
57 | else | |
58 | omap2_arch_reset(mode); | |
59 | } | |
60 | ||
1da177e4 | 61 | #endif |