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1da177e4 LT |
1 | /* |
2 | * include/asm-arm/arch-pxa/entry-macro.S | |
3 | * | |
4 | * Low-level IRQ helper macros for PXA-based platforms | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
78ff18a4 RK |
10 | #include <asm/hardware.h> |
11 | #include <asm/arch/irqs.h> | |
1da177e4 LT |
12 | |
13 | .macro disable_fiq | |
14 | .endm | |
15 | ||
f80dff9d DW |
16 | .macro get_irqnr_preamble, base, tmp |
17 | .endm | |
18 | ||
19 | .macro arch_ret_to_user, tmp1, tmp2 | |
20 | .endm | |
21 | ||
1da177e4 | 22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
8118d124 EM |
23 | mrc p15, 0, \tmp, c0, c0, 0 @ CPUID |
24 | mov \tmp, \tmp, lsr #13 | |
25 | and \tmp, \tmp, #0x7 @ Core G | |
26 | cmp \tmp, #1 | |
27 | bhi 1004f | |
28 | ||
1da177e4 LT |
29 | mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000 |
30 | add \base, \base, #0x00d00000 | |
31 | ldr \irqstat, [\base, #0] @ ICIP | |
32 | ldr \irqnr, [\base, #4] @ ICMR | |
8118d124 EM |
33 | b 1002f |
34 | ||
35 | 1004: | |
36 | mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2 | |
37 | mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2 | |
a3359e21 | 38 | ands \irqnr, \irqstat, \irqnr |
8118d124 EM |
39 | beq 1003f |
40 | rsb \irqstat, \irqnr, #0 | |
41 | and \irqstat, \irqstat, \irqnr | |
42 | clz \irqnr, \irqstat | |
43 | rsb \irqnr, \irqnr, #31 | |
44 | add \irqnr, \irqnr, #32 | |
45 | b 1001f | |
46 | 1003: | |
47 | mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP | |
48 | mrc p6, 0, \irqnr, c1, c0, 0 @ ICMR | |
49 | 1002: | |
1da177e4 LT |
50 | ands \irqnr, \irqstat, \irqnr |
51 | beq 1001f | |
52 | rsb \irqstat, \irqnr, #0 | |
53 | and \irqstat, \irqstat, \irqnr | |
54 | clz \irqnr, \irqstat | |
486c9551 | 55 | rsb \irqnr, \irqnr, #31 |
1da177e4 LT |
56 | 1001: |
57 | .endm |