]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/include/asm-arm/arch-pxa/irqs.h | |
3 | * | |
4 | * Author: Nicolas Pitre | |
5 | * Created: Jun 15, 2001 | |
6 | * Copyright: MontaVista Software Inc. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
1da177e4 | 13 | |
486c9551 | 14 | #define PXA_IRQ(x) (x) |
1da177e4 | 15 | |
a8929198 | 16 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
1da177e4 LT |
17 | #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ |
18 | #define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ | |
19 | #define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */ | |
20 | #define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI) */ | |
21 | #define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */ | |
22 | #define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt */ | |
23 | #define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */ | |
486c9551 EM |
24 | #endif |
25 | ||
1da177e4 LT |
26 | #define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */ |
27 | #define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */ | |
28 | #define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */ | |
29 | #define IRQ_GPIO1 PXA_IRQ(9) /* GPIO1 Edge Detect */ | |
30 | #define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */ | |
31 | #define IRQ_USB PXA_IRQ(11) /* USB Service */ | |
32 | #define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */ | |
33 | #define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt */ | |
34 | #define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */ | |
35 | #define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */ | |
36 | #define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */ | |
37 | #define IRQ_NSSP PXA_IRQ(16) /* Network SSP Service Request (PXA25x) */ | |
38 | #define IRQ_SSP2 PXA_IRQ(16) /* SSP2 interrupt (PXA27x) */ | |
39 | #define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */ | |
40 | #define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */ | |
41 | #define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */ | |
42 | #define IRQ_STUART PXA_IRQ(20) /* STUART Transmit/Receive/Error */ | |
43 | #define IRQ_BTUART PXA_IRQ(21) /* BTUART Transmit/Receive/Error */ | |
44 | #define IRQ_FFUART PXA_IRQ(22) /* FFUART Transmit/Receive/Error*/ | |
45 | #define IRQ_MMC PXA_IRQ(23) /* MMC Status/Error Detection */ | |
46 | #define IRQ_SSP PXA_IRQ(24) /* SSP Service Request */ | |
47 | #define IRQ_DMA PXA_IRQ(25) /* DMA Channel Service Request */ | |
48 | #define IRQ_OST0 PXA_IRQ(26) /* OS Timer match 0 */ | |
49 | #define IRQ_OST1 PXA_IRQ(27) /* OS Timer match 1 */ | |
50 | #define IRQ_OST2 PXA_IRQ(28) /* OS Timer match 2 */ | |
51 | #define IRQ_OST3 PXA_IRQ(29) /* OS Timer match 3 */ | |
52 | #define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */ | |
53 | #define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */ | |
54 | ||
a8929198 | 55 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
1da177e4 LT |
56 | #define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ |
57 | #define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ | |
1da177e4 LT |
58 | #endif |
59 | ||
a8929198 | 60 | #ifdef CONFIG_PXA3xx |
399c153f | 61 | #define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */ |
a8929198 | 62 | #define IRQ_CIR PXA_IRQ(34) /* Consumer IR */ |
63 | #define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */ | |
64 | #define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */ | |
65 | #define IRQ_GRPHICS PXA_IRQ(39) /* Graphics Controller */ | |
66 | #define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */ | |
67 | #define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */ | |
68 | #define IRQ_NAND PXA_IRQ(45) /* NAND Controller */ | |
69 | #define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */ | |
70 | #define IRQ_WAKEUP0 PXA_IRQ(49) /* EXT_WAKEUP0 */ | |
71 | #define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */ | |
72 | #define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */ | |
73 | #define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ | |
74 | #endif | |
75 | ||
c08b7b3e EM |
76 | #define PXA_GPIO_IRQ_BASE (64) |
77 | #define PXA_GPIO_IRQ_NUM (128) | |
78 | ||
79 | #define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) | |
1da177e4 LT |
80 | #define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) |
81 | ||
c08b7b3e | 82 | #define IRQ_TO_GPIO_2_x(i) ((i) - PXA_GPIO_IRQ_BASE) |
1da177e4 LT |
83 | #define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) |
84 | ||
1da177e4 LT |
85 | /* |
86 | * The next 16 interrupts are for board specific purposes. Since | |
87 | * the kernel can only run on one machine at a time, we can re-use | |
88 | * these. If you need more, increase IRQ_BOARD_END, but keep it | |
89 | * within sensible limits. | |
90 | */ | |
c08b7b3e | 91 | #define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) |
1da177e4 LT |
92 | #define IRQ_BOARD_END (IRQ_BOARD_START + 16) |
93 | ||
94 | #define IRQ_SA1111_START (IRQ_BOARD_END) | |
95 | #define IRQ_GPAIN0 (IRQ_BOARD_END + 0) | |
96 | #define IRQ_GPAIN1 (IRQ_BOARD_END + 1) | |
97 | #define IRQ_GPAIN2 (IRQ_BOARD_END + 2) | |
98 | #define IRQ_GPAIN3 (IRQ_BOARD_END + 3) | |
99 | #define IRQ_GPBIN0 (IRQ_BOARD_END + 4) | |
100 | #define IRQ_GPBIN1 (IRQ_BOARD_END + 5) | |
101 | #define IRQ_GPBIN2 (IRQ_BOARD_END + 6) | |
102 | #define IRQ_GPBIN3 (IRQ_BOARD_END + 7) | |
103 | #define IRQ_GPBIN4 (IRQ_BOARD_END + 8) | |
104 | #define IRQ_GPBIN5 (IRQ_BOARD_END + 9) | |
105 | #define IRQ_GPCIN0 (IRQ_BOARD_END + 10) | |
106 | #define IRQ_GPCIN1 (IRQ_BOARD_END + 11) | |
107 | #define IRQ_GPCIN2 (IRQ_BOARD_END + 12) | |
108 | #define IRQ_GPCIN3 (IRQ_BOARD_END + 13) | |
109 | #define IRQ_GPCIN4 (IRQ_BOARD_END + 14) | |
110 | #define IRQ_GPCIN5 (IRQ_BOARD_END + 15) | |
111 | #define IRQ_GPCIN6 (IRQ_BOARD_END + 16) | |
112 | #define IRQ_GPCIN7 (IRQ_BOARD_END + 17) | |
113 | #define IRQ_MSTXINT (IRQ_BOARD_END + 18) | |
114 | #define IRQ_MSRXINT (IRQ_BOARD_END + 19) | |
115 | #define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20) | |
116 | #define IRQ_TPTXINT (IRQ_BOARD_END + 21) | |
117 | #define IRQ_TPRXINT (IRQ_BOARD_END + 22) | |
118 | #define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23) | |
119 | #define SSPXMTINT (IRQ_BOARD_END + 24) | |
120 | #define SSPRCVINT (IRQ_BOARD_END + 25) | |
121 | #define SSPROR (IRQ_BOARD_END + 26) | |
122 | #define AUDXMTDMADONEA (IRQ_BOARD_END + 32) | |
123 | #define AUDRCVDMADONEA (IRQ_BOARD_END + 33) | |
124 | #define AUDXMTDMADONEB (IRQ_BOARD_END + 34) | |
125 | #define AUDRCVDMADONEB (IRQ_BOARD_END + 35) | |
126 | #define AUDTFSR (IRQ_BOARD_END + 36) | |
127 | #define AUDRFSR (IRQ_BOARD_END + 37) | |
128 | #define AUDTUR (IRQ_BOARD_END + 38) | |
129 | #define AUDROR (IRQ_BOARD_END + 39) | |
130 | #define AUDDTS (IRQ_BOARD_END + 40) | |
131 | #define AUDRDD (IRQ_BOARD_END + 41) | |
132 | #define AUDSTO (IRQ_BOARD_END + 42) | |
133 | #define IRQ_USBPWR (IRQ_BOARD_END + 43) | |
134 | #define IRQ_HCIM (IRQ_BOARD_END + 44) | |
135 | #define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45) | |
136 | #define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46) | |
137 | #define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47) | |
138 | #define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48) | |
139 | #define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49) | |
140 | #define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50) | |
141 | #define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51) | |
142 | #define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52) | |
143 | #define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53) | |
144 | #define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54) | |
145 | ||
146 | #define IRQ_LOCOMO_START (IRQ_BOARD_END) | |
147 | #define IRQ_LOCOMO_KEY (IRQ_BOARD_END + 0) | |
148 | #define IRQ_LOCOMO_GPIO0 (IRQ_BOARD_END + 1) | |
149 | #define IRQ_LOCOMO_GPIO1 (IRQ_BOARD_END + 2) | |
150 | #define IRQ_LOCOMO_GPIO2 (IRQ_BOARD_END + 3) | |
151 | #define IRQ_LOCOMO_GPIO3 (IRQ_BOARD_END + 4) | |
152 | #define IRQ_LOCOMO_GPIO4 (IRQ_BOARD_END + 5) | |
153 | #define IRQ_LOCOMO_GPIO5 (IRQ_BOARD_END + 6) | |
154 | #define IRQ_LOCOMO_GPIO6 (IRQ_BOARD_END + 7) | |
155 | #define IRQ_LOCOMO_GPIO7 (IRQ_BOARD_END + 8) | |
156 | #define IRQ_LOCOMO_GPIO8 (IRQ_BOARD_END + 9) | |
157 | #define IRQ_LOCOMO_GPIO9 (IRQ_BOARD_END + 10) | |
158 | #define IRQ_LOCOMO_GPIO10 (IRQ_BOARD_END + 11) | |
159 | #define IRQ_LOCOMO_GPIO11 (IRQ_BOARD_END + 12) | |
160 | #define IRQ_LOCOMO_GPIO12 (IRQ_BOARD_END + 13) | |
161 | #define IRQ_LOCOMO_GPIO13 (IRQ_BOARD_END + 14) | |
162 | #define IRQ_LOCOMO_GPIO14 (IRQ_BOARD_END + 15) | |
163 | #define IRQ_LOCOMO_GPIO15 (IRQ_BOARD_END + 16) | |
164 | #define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17) | |
165 | #define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18) | |
166 | #define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19) | |
167 | #define IRQ_LOCOMO_SPI_OVRN (IRQ_BOARD_END + 20) | |
168 | #define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21) | |
169 | ||
170 | /* | |
171 | * Figure out the MAX IRQ number. | |
172 | * | |
173 | * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1. | |
174 | * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1 | |
175 | * Otherwise, we have the standard IRQs only. | |
176 | */ | |
177 | #ifdef CONFIG_SA1111 | |
178 | #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) | |
179 | #elif defined(CONFIG_SHARP_LOCOMO) | |
180 | #define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) | |
181 | #elif defined(CONFIG_ARCH_LUBBOCK) || \ | |
e9937d4b | 182 | defined(CONFIG_MACH_LOGICPD_PXA270) || \ |
bf0116e5 | 183 | defined(CONFIG_MACH_TOSA) || \ |
34e31d87 | 184 | defined(CONFIG_MACH_MAINSTONE) || \ |
70e357f8 PZ |
185 | defined(CONFIG_MACH_PCM027) || \ |
186 | defined(CONFIG_MACH_MAGICIAN) | |
1da177e4 | 187 | #define NR_IRQS (IRQ_BOARD_END) |
a1f7fc48 EM |
188 | #elif defined(CONFIG_MACH_ZYLONITE) |
189 | #define NR_IRQS (IRQ_BOARD_START + 32) | |
1da177e4 LT |
190 | #else |
191 | #define NR_IRQS (IRQ_BOARD_START) | |
192 | #endif | |
193 | ||
194 | /* | |
195 | * Board specific IRQs. Define them here. | |
196 | * Do not surround them with ifdefs. | |
197 | */ | |
198 | #define LUBBOCK_IRQ(x) (IRQ_BOARD_START + (x)) | |
199 | #define LUBBOCK_SD_IRQ LUBBOCK_IRQ(0) | |
200 | #define LUBBOCK_SA1111_IRQ LUBBOCK_IRQ(1) | |
201 | #define LUBBOCK_USB_IRQ LUBBOCK_IRQ(2) /* usb connect */ | |
202 | #define LUBBOCK_ETH_IRQ LUBBOCK_IRQ(3) | |
203 | #define LUBBOCK_UCB1400_IRQ LUBBOCK_IRQ(4) | |
204 | #define LUBBOCK_BB_IRQ LUBBOCK_IRQ(5) | |
205 | #define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */ | |
206 | #define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6) | |
207 | ||
e9937d4b LB |
208 | #define LPD270_IRQ(x) (IRQ_BOARD_START + (x)) |
209 | #define LPD270_USBC_IRQ LPD270_IRQ(2) | |
210 | #define LPD270_ETHERNET_IRQ LPD270_IRQ(3) | |
211 | #define LPD270_AC97_IRQ LPD270_IRQ(4) | |
212 | ||
1da177e4 LT |
213 | #define MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x)) |
214 | #define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0) | |
215 | #define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1) | |
216 | #define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2) | |
217 | #define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3) | |
218 | #define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4) | |
219 | #define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5) | |
220 | #define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6) | |
221 | #define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7) | |
222 | #define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9) | |
223 | #define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10) | |
224 | #define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11) | |
225 | #define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13) | |
226 | #define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) | |
227 | #define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) | |
228 | ||
229 | /* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */ | |
230 | #define IRQ_LOCOMO_KEY_BASE (IRQ_BOARD_START + 0) | |
231 | #define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1) | |
232 | #define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) | |
233 | #define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) | |
3696a8a4 | 234 | |
34e31d87 RS |
235 | /* phyCORE-PXA270 (PCM027) Interrupts */ |
236 | #define PCM027_IRQ(x) (IRQ_BOARD_START + (x)) | |
237 | #define PCM027_BTDET_IRQ PCM027_IRQ(0) | |
238 | #define PCM027_FF_RI_IRQ PCM027_IRQ(1) | |
239 | #define PCM027_MMCDET_IRQ PCM027_IRQ(2) | |
240 | #define PCM027_PM_5V_IRQ PCM027_IRQ(3) | |
241 | ||
3696a8a4 MR |
242 | /* ITE8152 irqs */ |
243 | /* add IT8152 IRQs beyond BOARD_END */ | |
244 | #ifdef CONFIG_PCI_HOST_ITE8152 | |
406b1ea4 | 245 | #define IT8152_IRQ(x) (IRQ_BOARD_END + (x)) |
3696a8a4 MR |
246 | |
247 | /* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ | |
248 | #define IT8152_LD_IRQ_COUNT 9 | |
249 | #define IT8152_LP_IRQ_COUNT 16 | |
250 | #define IT8152_PD_IRQ_COUNT 15 | |
251 | ||
252 | /* Priorities: */ | |
253 | #define IT8152_PD_IRQ(i) IT8152_IRQ(i) | |
254 | #define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT) | |
255 | #define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT) | |
256 | ||
257 | #define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1) | |
258 | ||
406b1ea4 | 259 | #if NR_IRQS < (IT8152_LAST_IRQ+1) |
3696a8a4 MR |
260 | #undef NR_IRQS |
261 | #define NR_IRQS (IT8152_LAST_IRQ+1) | |
262 | #endif | |
406b1ea4 MR |
263 | |
264 | #endif /* CONFIG_PCI_HOST_ITE8152 */ |