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1 | /* linux/include/asm-arm/arch-s3c2410/hardware.h |
2 | * | |
3 | * (c) 2003 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * S3C2410 - hardware | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * Changelog: | |
13 | * 21-May-2003 BJD Created file | |
14 | * 06-Jun-2003 BJD Added CPU frequency settings | |
15 | * 03-Sep-2003 BJD Linux v2.6 support | |
16 | * 12-Mar-2004 BJD Fixed include protection, fixed type of clock vars | |
17 | * 14-Sep-2004 BJD Added misccr and getpin to gpio | |
18 | * 01-Oct-2004 BJD Added the new gpio functions | |
19 | * 16-Oct-2004 BJD Removed the clock variables | |
20 | */ | |
21 | ||
22 | #ifndef __ASM_ARCH_HARDWARE_H | |
23 | #define __ASM_ARCH_HARDWARE_H | |
24 | ||
25 | #ifndef __ASSEMBLY__ | |
26 | ||
27 | /* external functions for GPIO support | |
28 | * | |
29 | * These allow various different clients to access the same GPIO | |
30 | * registers without conflicting. If your driver only owns the entire | |
31 | * GPIO register, then it is safe to ioremap/__raw_{read|write} to it. | |
32 | */ | |
33 | ||
34 | /* s3c2410_gpio_cfgpin | |
35 | * | |
36 | * set the configuration of the given pin to the value passed. | |
37 | * | |
38 | * eg: | |
39 | * s3c2410_gpio_cfgpin(S3C2410_GPA0, S3C2410_GPA0_ADDR0); | |
40 | * s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1); | |
41 | */ | |
42 | ||
43 | extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function); | |
44 | ||
45 | extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); | |
46 | ||
47 | /* s3c2410_gpio_getirq | |
48 | * | |
49 | * turn the given pin number into the corresponding IRQ number | |
50 | * | |
51 | * returns: | |
52 | * < 0 = no interrupt for this pin | |
53 | * >=0 = interrupt number for the pin | |
54 | */ | |
55 | ||
56 | extern int s3c2410_gpio_getirq(unsigned int pin); | |
57 | ||
58 | /* s3c2410_gpio_irqfilter | |
59 | * | |
60 | * set the irq filtering on the given pin | |
61 | * | |
62 | * on = 0 => disable filtering | |
63 | * 1 => enable filtering | |
64 | * | |
65 | * config = S3C2410_EINTFLT_PCLK or S3C2410_EINTFLT_EXTCLK orred with | |
66 | * width of filter (0 through 63) | |
67 | * | |
68 | * | |
69 | */ | |
70 | ||
71 | extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, | |
72 | unsigned int config); | |
73 | ||
74 | /* s3c2410_gpio_pullup | |
75 | * | |
76 | * configure the pull-up control on the given pin | |
77 | * | |
78 | * to = 1 => disable the pull-up | |
79 | * 0 => enable the pull-up | |
80 | * | |
81 | * eg; | |
82 | * | |
83 | * s3c2410_gpio_pullup(S3C2410_GPB0, 0); | |
84 | * s3c2410_gpio_pullup(S3C2410_GPE8, 0); | |
85 | */ | |
86 | ||
87 | extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to); | |
88 | ||
89 | extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to); | |
90 | ||
91 | extern unsigned int s3c2410_gpio_getpin(unsigned int pin); | |
92 | ||
93 | extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg); | |
94 | ||
95 | #endif /* __ASSEMBLY__ */ | |
96 | ||
97 | #include <asm/sizes.h> | |
98 | #include <asm/arch/map.h> | |
99 | ||
100 | /* machine specific hardware definitions should go after this */ | |
101 | ||
102 | /* currently here until moved into config (todo) */ | |
103 | #define CONFIG_NO_MULTIWORD_IO | |
104 | ||
105 | #endif /* __ASM_ARCH_HARDWARE_H */ |