[mirror_ubuntu-bionic-kernel.git] / include / asm-frv / highmem.h

/* highmem.h: virtual kernel memory mappings for high memory
 *
 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
 * Written by David Howells (dhowells@redhat.com)
 * - Derived from include/asm-i386/highmem.h
 *
 * See Documentation/frv/mmu-layout.txt for more information.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef _ASM_HIGHMEM_H
#define _ASM_HIGHMEM_H

#ifdef __KERNEL__

#include <linux/init.h>
#include <linux/highmem.h>
#include <asm/mem-layout.h>
#include <asm/spr-regs.h>
#include <asm/mb-regs.h>

#define NR_TLB_LINES		64	/* number of lines in the TLB */

#ifndef __ASSEMBLY__

#include <linux/interrupt.h>
#include <asm/kmap_types.h>
#include <asm/pgtable.h>

#ifdef CONFIG_DEBUG_HIGHMEM
#define HIGHMEM_DEBUG 1
#else
#define HIGHMEM_DEBUG 0
#endif

/* declarations for highmem.c */
extern unsigned long highstart_pfn, highend_pfn;

#define kmap_prot PAGE_KERNEL
#define kmap_pte ______kmap_pte_in_TLB
extern pte_t *pkmap_page_table;

#define flush_cache_kmaps()  do { } while (0)

/*
 * Right now we initialize only a single pte table. It can be extended
 * easily, subsequent pte tables have to be allocated in one physical
 * chunk of RAM.
 */
#define LAST_PKMAP	PTRS_PER_PTE
#define LAST_PKMAP_MASK	(LAST_PKMAP - 1)
#define PKMAP_NR(virt)	((virt - PKMAP_BASE) >> PAGE_SHIFT)
#define PKMAP_ADDR(nr)	(PKMAP_BASE + ((nr) << PAGE_SHIFT))

extern void *kmap_high(struct page *page);
extern void kunmap_high(struct page *page);

extern void *kmap(struct page *page);
extern void kunmap(struct page *page);

extern struct page *kmap_atomic_to_page(void *ptr);

#endif /* !__ASSEMBLY__ */

/*
 * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
 * gives a more generic (and caching) interface. But kmap_atomic can
 * be used in IRQ contexts, so in some (very limited) cases we need
 * it.
 */
#define KMAP_ATOMIC_CACHE_DAMR		8

#ifndef __ASSEMBLY__

#define __kmap_atomic_primary(type, paddr, ampr)						\
({												\
	unsigned long damlr, dampr;								\
												\
	dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V;		\
												\
	if (type != __KM_CACHE)									\
		asm volatile("movgs %0,dampr"#ampr :: "r"(dampr) : "memory");			\
	else											\
		asm volatile("movgs %0,iampr"#ampr"\n"						\
			     "movgs %0,dampr"#ampr"\n"						\
			     :: "r"(dampr) : "memory"						\
			     );									\
												\
	asm("movsg damlr"#ampr",%0" : "=r"(damlr));						\
												\
	/*printk("DAMR"#ampr": PRIM sl=%d L=%08lx P=%08lx\n", type, damlr, dampr);*/		\
												\
	(void *) damlr;										\
})

#define __kmap_atomic_secondary(slot, paddr)							  \
({												  \
	unsigned long damlr = KMAP_ATOMIC_SECONDARY_FRAME + (slot) * PAGE_SIZE;			  \
	unsigned long dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \
												  \
	asm volatile("movgs %0,tplr \n"								  \
		     "movgs %1,tppr \n"								  \
		     "tlbpr %0,gr0,#2,#1"							  \
		     : : "r"(damlr), "r"(dampr) : "memory");					  \
												  \
	/*printk("TLB: SECN sl=%d L=%08lx P=%08lx\n", slot, damlr, dampr);*/			  \
												  \
	(void *) damlr;										  \
})

static inline void *kmap_atomic(struct page *page, enum km_type type)
{
	unsigned long paddr;

	pagefault_disable();
	debug_kmap_atomic(type);
	paddr = page_to_phys(page);

	switch (type) {
        case 0:		return __kmap_atomic_primary(0, paddr, 2);
        case 1:		return __kmap_atomic_primary(1, paddr, 3);
        case 2:		return __kmap_atomic_primary(2, paddr, 4);
        case 3:		return __kmap_atomic_primary(3, paddr, 5);
        case 4:		return __kmap_atomic_primary(4, paddr, 6);
        case 5:		return __kmap_atomic_primary(5, paddr, 7);
        case 6:		return __kmap_atomic_primary(6, paddr, 8);
        case 7:		return __kmap_atomic_primary(7, paddr, 9);
        case 8:		return __kmap_atomic_primary(8, paddr, 10);

	case 9 ... 9 + NR_TLB_LINES - 1:
		return __kmap_atomic_secondary(type - 9, paddr);

	default:
		BUG();
		return NULL;
	}
}

#define __kunmap_atomic_primary(type, ampr)				\
do {									\
	asm volatile("movgs gr0,dampr"#ampr"\n" ::: "memory");		\
	if (type == __KM_CACHE)						\
		asm volatile("movgs gr0,iampr"#ampr"\n" ::: "memory");	\
} while(0)

#define __kunmap_atomic_secondary(slot, vaddr)				\
do {									\
	asm volatile("tlbpr %0,gr0,#4,#1" : : "r"(vaddr) : "memory");	\
} while(0)

static inline void kunmap_atomic(void *kvaddr, enum km_type type)
{
	switch (type) {
        case 0:		__kunmap_atomic_primary(0, 2);	break;
        case 1:		__kunmap_atomic_primary(1, 3);	break;
        case 2:		__kunmap_atomic_primary(2, 4);	break;
        case 3:		__kunmap_atomic_primary(3, 5);	break;
        case 4:		__kunmap_atomic_primary(4, 6);	break;
        case 5:		__kunmap_atomic_primary(5, 7);	break;
        case 6:		__kunmap_atomic_primary(6, 8);	break;
        case 7:		__kunmap_atomic_primary(7, 9);	break;
        case 8:		__kunmap_atomic_primary(8, 10);	break;

	case 9 ... 9 + NR_TLB_LINES - 1:
		__kunmap_atomic_secondary(type - 9, kvaddr);
		break;

	default:
		BUG();
	}
	pagefault_enable();
}

#endif /* !__ASSEMBLY__ */

#endif /* __KERNEL__ */

#endif /* _ASM_HIGHMEM_H */
Commit	Line	Data
1da177e4 LT	1	/* highmem.h: virtual kernel memory mappings for high memory
	2	*
	3	* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
	4	* Written by David Howells (dhowells@redhat.com)
	5	* - Derived from include/asm-i386/highmem.h
	6	*
0868ff7a	7	* See Documentation/frv/mmu-layout.txt for more information.
1da177e4 LT	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; either version
	12	* 2 of the License, or (at your option) any later version.
	13	*/
	14
	15	#ifndef _ASM_HIGHMEM_H
	16	#define _ASM_HIGHMEM_H
	17
	18	#ifdef __KERNEL__
	19
1da177e4	20	#include <linux/init.h>
7ca43e75	21	#include <linux/highmem.h>
1da177e4 LT	22	#include <asm/mem-layout.h>
	23	#include <asm/spr-regs.h>
	24	#include <asm/mb-regs.h>
	25
	26	#define NR_TLB_LINES 64 /* number of lines in the TLB */
	27
	28	#ifndef __ASSEMBLY__
	29
	30	#include <linux/interrupt.h>
	31	#include <asm/kmap_types.h>
	32	#include <asm/pgtable.h>
	33
	34	#ifdef CONFIG_DEBUG_HIGHMEM
	35	#define HIGHMEM_DEBUG 1
	36	#else
	37	#define HIGHMEM_DEBUG 0
	38	#endif
	39
	40	/* declarations for highmem.c */
	41	extern unsigned long highstart_pfn, highend_pfn;
	42
	43	#define kmap_prot PAGE_KERNEL
	44	#define kmap_pte ______kmap_pte_in_TLB
	45	extern pte_t *pkmap_page_table;
	46
	47	#define flush_cache_kmaps() do { } while (0)
	48
	49	/*
	50	* Right now we initialize only a single pte table. It can be extended
	51	* easily, subsequent pte tables have to be allocated in one physical
	52	* chunk of RAM.
	53	*/
	54	#define LAST_PKMAP PTRS_PER_PTE
	55	#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
	56	#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
	57	#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
	58
	59	extern void kmap_high(struct page page);
	60	extern void kunmap_high(struct page *page);
	61
	62	extern void kmap(struct page page);
	63	extern void kunmap(struct page *page);
	64
	65	extern struct page kmap_atomic_to_page(void ptr);
	66
	67	#endif /* !__ASSEMBLY__ */
	68
	69	/*
	70	* The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
	71	* gives a more generic (and caching) interface. But kmap_atomic can
	72	* be used in IRQ contexts, so in some (very limited) cases we need
	73	* it.
	74	*/
	75	#define KMAP_ATOMIC_CACHE_DAMR 8
	76
	77	#ifndef __ASSEMBLY__
	78
	79	#define __kmap_atomic_primary(type, paddr, ampr) \
	80	({ \
	81	unsigned long damlr, dampr; \
	82	\
	83	dampr = paddr \| xAMPRx_L \| xAMPRx_M \| xAMPRx_S \| xAMPRx_SS_16Kb \| xAMPRx_V; \
	84	\
	85	if (type != __KM_CACHE) \
29da7eb0	86	asm volatile("movgs %0,dampr"#ampr :: "r"(dampr) : "memory"); \
1da177e4 LT	87	else \
	88	asm volatile("movgs %0,iampr"#ampr"\n" \
	89	"movgs %0,dampr"#ampr"\n" \
29da7eb0	90	:: "r"(dampr) : "memory" \
1da177e4 LT	91	); \
	92	\
	93	asm("movsg damlr"#ampr",%0" : "=r"(damlr)); \
	94	\
	95	/printk("DAMR"#ampr": PRIM sl=%d L=%08lx P=%08lx\n", type, damlr, dampr);/ \
	96	\
	97	(void *) damlr; \
	98	})
	99
	100	#define __kmap_atomic_secondary(slot, paddr) \
	101	({ \
	102	unsigned long damlr = KMAP_ATOMIC_SECONDARY_FRAME + (slot) * PAGE_SIZE; \
	103	unsigned long dampr = paddr \| xAMPRx_L \| xAMPRx_M \| xAMPRx_S \| xAMPRx_SS_16Kb \| xAMPRx_V; \
	104	\
	105	asm volatile("movgs %0,tplr \n" \
	106	"movgs %1,tppr \n" \
	107	"tlbpr %0,gr0,#2,#1" \
29da7eb0	108	: : "r"(damlr), "r"(dampr) : "memory"); \
1da177e4 LT	109	\
	110	/printk("TLB: SECN sl=%d L=%08lx P=%08lx\n", slot, damlr, dampr);/ \
	111	\
	112	(void *) damlr; \
	113	})
	114
	115	static inline void kmap_atomic(struct page page, enum km_type type)
	116	{
	117	unsigned long paddr;
	118
a866374a	119	pagefault_disable();
7ca43e75	120	debug_kmap_atomic(type);
1da177e4 LT	121	paddr = page_to_phys(page);
	122
	123	switch (type) {
	124	case 0: return __kmap_atomic_primary(0, paddr, 2);
	125	case 1: return __kmap_atomic_primary(1, paddr, 3);
	126	case 2: return __kmap_atomic_primary(2, paddr, 4);
	127	case 3: return __kmap_atomic_primary(3, paddr, 5);
	128	case 4: return __kmap_atomic_primary(4, paddr, 6);
	129	case 5: return __kmap_atomic_primary(5, paddr, 7);
	130	case 6: return __kmap_atomic_primary(6, paddr, 8);
	131	case 7: return __kmap_atomic_primary(7, paddr, 9);
	132	case 8: return __kmap_atomic_primary(8, paddr, 10);
	133
	134	case 9 ... 9 + NR_TLB_LINES - 1:
	135	return __kmap_atomic_secondary(type - 9, paddr);
	136
	137	default:
	138	BUG();
576132b4	139	return NULL;
1da177e4 LT	140	}
	141	}
	142
29da7eb0 DH	143	#define __kunmap_atomic_primary(type, ampr) \
	144	do { \
	145	asm volatile("movgs gr0,dampr"#ampr"\n" ::: "memory"); \
	146	if (type == __KM_CACHE) \
	147	asm volatile("movgs gr0,iampr"#ampr"\n" ::: "memory"); \
1da177e4 LT	148	} while(0)
1da177e4 LT	149
29da7eb0 DH	150	#define __kunmap_atomic_secondary(slot, vaddr) \
	151	do { \
	152	asm volatile("tlbpr %0,gr0,#4,#1" : : "r"(vaddr) : "memory"); \
1da177e4 LT	153	} while(0)
	154
	155	static inline void kunmap_atomic(void *kvaddr, enum km_type type)
	156	{
	157	switch (type) {
	158	case 0: __kunmap_atomic_primary(0, 2); break;
	159	case 1: __kunmap_atomic_primary(1, 3); break;
	160	case 2: __kunmap_atomic_primary(2, 4); break;
	161	case 3: __kunmap_atomic_primary(3, 5); break;
	162	case 4: __kunmap_atomic_primary(4, 6); break;
	163	case 5: __kunmap_atomic_primary(5, 7); break;
	164	case 6: __kunmap_atomic_primary(6, 8); break;
	165	case 7: __kunmap_atomic_primary(7, 9); break;
	166	case 8: __kunmap_atomic_primary(8, 10); break;
	167
	168	case 9 ... 9 + NR_TLB_LINES - 1:
	169	__kunmap_atomic_secondary(type - 9, kvaddr);
	170	break;
	171
	172	default:
	173	BUG();
	174	}
a866374a	175	pagefault_enable();
1da177e4 LT	176	}
	177
	178	#endif /* !__ASSEMBLY__ */
	179
	180	#endif /* __KERNEL__ */
	181
	182	#endif /* _ASM_HIGHMEM_H */