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dmaengine: Fix access to uninitialized dma_slave_caps
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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
1da177e4
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2#ifndef __GENERIC_IO_H
3#define __GENERIC_IO_H
4
5#include <linux/linkage.h>
dae409a2 6#include <asm/byteorder.h>
1da177e4
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7
8/*
9 * These are the "generic" interfaces for doing new-style
10 * memory-mapped or PIO accesses. Architectures may do
11 * their own arch-optimized versions, these just act as
12 * wrappers around the old-style IO register access functions:
13 * read[bwl]/write[bwl]/in[bwl]/out[bwl]
14 *
15 * Don't include this directly, include it from <asm/io.h>.
16 */
17
18/*
19 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
20 * access or a MMIO access, these functions don't care. The info is
21 * encoded in the hardware mapping set up by the mapping functions
22 * (or the cookie itself, depending on implementation and hw).
23 *
24 * The generic routines just encode the PIO/MMIO as part of the
25 * cookie, and coldly assume that the MMIO IO mappings are not
26 * in the low address range. Architectures for which this is not
27 * true can't use this generic implementation.
28 */
144b2a91
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29extern unsigned int ioread8(void __iomem *);
30extern unsigned int ioread16(void __iomem *);
31extern unsigned int ioread16be(void __iomem *);
32extern unsigned int ioread32(void __iomem *);
33extern unsigned int ioread32be(void __iomem *);
9e44fb18
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34#ifdef CONFIG_64BIT
35extern u64 ioread64(void __iomem *);
36extern u64 ioread64be(void __iomem *);
37#endif
1da177e4 38
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39extern void iowrite8(u8, void __iomem *);
40extern void iowrite16(u16, void __iomem *);
41extern void iowrite16be(u16, void __iomem *);
42extern void iowrite32(u32, void __iomem *);
43extern void iowrite32be(u32, void __iomem *);
9e44fb18
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44#ifdef CONFIG_64BIT
45extern void iowrite64(u64, void __iomem *);
46extern void iowrite64be(u64, void __iomem *);
47#endif
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48
49/*
50 * "string" versions of the above. Note that they
51 * use native byte ordering for the accesses (on
52 * the assumption that IO and memory agree on a
53 * byte order, and CPU byteorder is irrelevant).
54 *
55 * They do _not_ update the port address. If you
56 * want MMIO that copies stuff laid out in MMIO
57 * memory across multiple ports, use "memcpy_toio()"
58 * and friends.
59 */
144b2a91
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60extern void ioread8_rep(void __iomem *port, void *buf, unsigned long count);
61extern void ioread16_rep(void __iomem *port, void *buf, unsigned long count);
62extern void ioread32_rep(void __iomem *port, void *buf, unsigned long count);
1da177e4 63
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64extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);
65extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);
66extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);
1da177e4 67
ce816fa8 68#ifdef CONFIG_HAS_IOPORT_MAP
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69/* Create a virtual mapping cookie for an IO port range */
70extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
71extern void ioport_unmap(void __iomem *);
82ed223c 72#endif
1da177e4 73
1526a756 74#ifndef ARCH_HAS_IOREMAP_WC
75#define ioremap_wc ioremap_nocache
76#endif
77
d838270e
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78#ifndef ARCH_HAS_IOREMAP_WT
79#define ioremap_wt ioremap_nocache
80#endif
81
82ed223c 82#ifdef CONFIG_PCI
66eab4df 83/* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */
1da177e4 84struct pci_dev;
1da177e4 85extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
97a29d59 86#elif defined(CONFIG_GENERIC_IOMAP)
fea80311 87struct pci_dev;
fea80311
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88static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
89{ }
82ed223c 90#endif
1da177e4 91
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92#include <asm-generic/pci_iomap.h>
93
1da177e4 94#endif