]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #ifndef _ASM_GENERIC_PGTABLE_H |
2 | #define _ASM_GENERIC_PGTABLE_H | |
3 | ||
673eae82 | 4 | #ifndef __ASSEMBLY__ |
9535239f | 5 | #ifdef CONFIG_MMU |
673eae82 | 6 | |
fbd71844 | 7 | #include <linux/mm_types.h> |
187f1882 | 8 | #include <linux/bug.h> |
e61ce6ad | 9 | #include <linux/errno.h> |
fbd71844 | 10 | |
235a8f02 KS |
11 | #if 4 - defined(__PAGETABLE_PUD_FOLDED) - defined(__PAGETABLE_PMD_FOLDED) != \ |
12 | CONFIG_PGTABLE_LEVELS | |
13 | #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{PUD,PMD}_FOLDED | |
14 | #endif | |
15 | ||
6ee8630e HD |
16 | /* |
17 | * On almost all architectures and configurations, 0 can be used as the | |
18 | * upper ceiling to free_pgtables(): on many architectures it has the same | |
19 | * effect as using TASK_SIZE. However, there is one configuration which | |
20 | * must impose a more careful limit, to avoid freeing kernel pgtables. | |
21 | */ | |
22 | #ifndef USER_PGTABLES_CEILING | |
23 | #define USER_PGTABLES_CEILING 0UL | |
24 | #endif | |
25 | ||
1da177e4 | 26 | #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
e2cda322 AA |
27 | extern int ptep_set_access_flags(struct vm_area_struct *vma, |
28 | unsigned long address, pte_t *ptep, | |
29 | pte_t entry, int dirty); | |
30 | #endif | |
31 | ||
32 | #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS | |
33 | extern int pmdp_set_access_flags(struct vm_area_struct *vma, | |
34 | unsigned long address, pmd_t *pmdp, | |
35 | pmd_t entry, int dirty); | |
1da177e4 LT |
36 | #endif |
37 | ||
38 | #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | |
e2cda322 AA |
39 | static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, |
40 | unsigned long address, | |
41 | pte_t *ptep) | |
42 | { | |
43 | pte_t pte = *ptep; | |
44 | int r = 1; | |
45 | if (!pte_young(pte)) | |
46 | r = 0; | |
47 | else | |
48 | set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte)); | |
49 | return r; | |
50 | } | |
51 | #endif | |
52 | ||
53 | #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG | |
54 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
55 | static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
56 | unsigned long address, | |
57 | pmd_t *pmdp) | |
58 | { | |
59 | pmd_t pmd = *pmdp; | |
60 | int r = 1; | |
61 | if (!pmd_young(pmd)) | |
62 | r = 0; | |
63 | else | |
64 | set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd)); | |
65 | return r; | |
66 | } | |
67 | #else /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
68 | static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
69 | unsigned long address, | |
70 | pmd_t *pmdp) | |
71 | { | |
72 | BUG(); | |
73 | return 0; | |
74 | } | |
75 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
1da177e4 LT |
76 | #endif |
77 | ||
78 | #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH | |
e2cda322 AA |
79 | int ptep_clear_flush_young(struct vm_area_struct *vma, |
80 | unsigned long address, pte_t *ptep); | |
81 | #endif | |
82 | ||
83 | #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH | |
84 | int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
85 | unsigned long address, pmd_t *pmdp); | |
1da177e4 LT |
86 | #endif |
87 | ||
1da177e4 | 88 | #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR |
e2cda322 AA |
89 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, |
90 | unsigned long address, | |
91 | pte_t *ptep) | |
92 | { | |
93 | pte_t pte = *ptep; | |
94 | pte_clear(mm, address, ptep); | |
95 | return pte; | |
96 | } | |
97 | #endif | |
98 | ||
99 | #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR | |
100 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
101 | static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, | |
102 | unsigned long address, | |
103 | pmd_t *pmdp) | |
104 | { | |
105 | pmd_t pmd = *pmdp; | |
2d28a227 | 106 | pmd_clear(pmdp); |
e2cda322 | 107 | return pmd; |
49b24d6b | 108 | } |
e2cda322 | 109 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |
1da177e4 LT |
110 | #endif |
111 | ||
fcbe08d6 MS |
112 | #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR_FULL |
113 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
114 | static inline pmd_t pmdp_get_and_clear_full(struct mm_struct *mm, | |
115 | unsigned long address, pmd_t *pmdp, | |
116 | int full) | |
117 | { | |
118 | return pmdp_get_and_clear(mm, address, pmdp); | |
119 | } | |
120 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
121 | #endif | |
122 | ||
a600388d | 123 | #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL |
e2cda322 AA |
124 | static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, |
125 | unsigned long address, pte_t *ptep, | |
126 | int full) | |
127 | { | |
128 | pte_t pte; | |
129 | pte = ptep_get_and_clear(mm, address, ptep); | |
130 | return pte; | |
131 | } | |
a600388d ZA |
132 | #endif |
133 | ||
9888a1ca ZA |
134 | /* |
135 | * Some architectures may be able to avoid expensive synchronization | |
136 | * primitives when modifications are made to PTE's which are already | |
137 | * not present, or in the process of an address space destruction. | |
138 | */ | |
139 | #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL | |
e2cda322 AA |
140 | static inline void pte_clear_not_present_full(struct mm_struct *mm, |
141 | unsigned long address, | |
142 | pte_t *ptep, | |
143 | int full) | |
144 | { | |
145 | pte_clear(mm, address, ptep); | |
146 | } | |
a600388d ZA |
147 | #endif |
148 | ||
1da177e4 | 149 | #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH |
e2cda322 AA |
150 | extern pte_t ptep_clear_flush(struct vm_area_struct *vma, |
151 | unsigned long address, | |
152 | pte_t *ptep); | |
153 | #endif | |
154 | ||
155 | #ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH | |
156 | extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma, | |
157 | unsigned long address, | |
158 | pmd_t *pmdp); | |
1da177e4 LT |
159 | #endif |
160 | ||
161 | #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT | |
8c65b4a6 | 162 | struct mm_struct; |
1da177e4 LT |
163 | static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) |
164 | { | |
165 | pte_t old_pte = *ptep; | |
166 | set_pte_at(mm, address, ptep, pte_wrprotect(old_pte)); | |
167 | } | |
168 | #endif | |
169 | ||
e2cda322 AA |
170 | #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT |
171 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
172 | static inline void pmdp_set_wrprotect(struct mm_struct *mm, | |
173 | unsigned long address, pmd_t *pmdp) | |
174 | { | |
175 | pmd_t old_pmd = *pmdp; | |
176 | set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd)); | |
177 | } | |
178 | #else /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
179 | static inline void pmdp_set_wrprotect(struct mm_struct *mm, | |
180 | unsigned long address, pmd_t *pmdp) | |
181 | { | |
182 | BUG(); | |
183 | } | |
184 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
185 | #endif | |
186 | ||
187 | #ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH | |
73636b1a CM |
188 | extern void pmdp_splitting_flush(struct vm_area_struct *vma, |
189 | unsigned long address, pmd_t *pmdp); | |
e2cda322 AA |
190 | #endif |
191 | ||
e3ebcf64 | 192 | #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT |
6b0b50b0 AK |
193 | extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, |
194 | pgtable_t pgtable); | |
e3ebcf64 GS |
195 | #endif |
196 | ||
197 | #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW | |
6b0b50b0 | 198 | extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); |
e3ebcf64 GS |
199 | #endif |
200 | ||
46dcde73 GS |
201 | #ifndef __HAVE_ARCH_PMDP_INVALIDATE |
202 | extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, | |
203 | pmd_t *pmdp); | |
204 | #endif | |
205 | ||
1da177e4 | 206 | #ifndef __HAVE_ARCH_PTE_SAME |
e2cda322 AA |
207 | static inline int pte_same(pte_t pte_a, pte_t pte_b) |
208 | { | |
209 | return pte_val(pte_a) == pte_val(pte_b); | |
210 | } | |
211 | #endif | |
212 | ||
45961722 KW |
213 | #ifndef __HAVE_ARCH_PTE_UNUSED |
214 | /* | |
215 | * Some architectures provide facilities to virtualization guests | |
216 | * so that they can flag allocated pages as unused. This allows the | |
217 | * host to transparently reclaim unused pages. This function returns | |
218 | * whether the pte's page is unused. | |
219 | */ | |
220 | static inline int pte_unused(pte_t pte) | |
221 | { | |
222 | return 0; | |
223 | } | |
224 | #endif | |
225 | ||
e2cda322 AA |
226 | #ifndef __HAVE_ARCH_PMD_SAME |
227 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
228 | static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) | |
229 | { | |
230 | return pmd_val(pmd_a) == pmd_val(pmd_b); | |
231 | } | |
232 | #else /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
233 | static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) | |
234 | { | |
235 | BUG(); | |
236 | return 0; | |
237 | } | |
238 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
1da177e4 LT |
239 | #endif |
240 | ||
1da177e4 LT |
241 | #ifndef __HAVE_ARCH_PGD_OFFSET_GATE |
242 | #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr) | |
243 | #endif | |
244 | ||
0b0968a3 | 245 | #ifndef __HAVE_ARCH_MOVE_PTE |
8b1f3124 | 246 | #define move_pte(pte, prot, old_addr, new_addr) (pte) |
8b1f3124 NP |
247 | #endif |
248 | ||
2c3cf556 | 249 | #ifndef pte_accessible |
20841405 | 250 | # define pte_accessible(mm, pte) ((void)(pte), 1) |
2c3cf556 RR |
251 | #endif |
252 | ||
61c77326 SL |
253 | #ifndef flush_tlb_fix_spurious_fault |
254 | #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address) | |
255 | #endif | |
256 | ||
0634a632 PM |
257 | #ifndef pgprot_noncached |
258 | #define pgprot_noncached(prot) (prot) | |
259 | #endif | |
260 | ||
2520bd31 | 261 | #ifndef pgprot_writecombine |
262 | #define pgprot_writecombine pgprot_noncached | |
263 | #endif | |
264 | ||
d1b4bfbf TK |
265 | #ifndef pgprot_writethrough |
266 | #define pgprot_writethrough pgprot_noncached | |
267 | #endif | |
268 | ||
8b921acf LD |
269 | #ifndef pgprot_device |
270 | #define pgprot_device pgprot_noncached | |
271 | #endif | |
272 | ||
64e45507 PF |
273 | #ifndef pgprot_modify |
274 | #define pgprot_modify pgprot_modify | |
275 | static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) | |
276 | { | |
277 | if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot))) | |
278 | newprot = pgprot_noncached(newprot); | |
279 | if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot))) | |
280 | newprot = pgprot_writecombine(newprot); | |
281 | if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot))) | |
282 | newprot = pgprot_device(newprot); | |
283 | return newprot; | |
284 | } | |
285 | #endif | |
286 | ||
1da177e4 | 287 | /* |
8f6c99c1 HD |
288 | * When walking page tables, get the address of the next boundary, |
289 | * or the end address of the range if that comes earlier. Although no | |
290 | * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. | |
1da177e4 LT |
291 | */ |
292 | ||
1da177e4 LT |
293 | #define pgd_addr_end(addr, end) \ |
294 | ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ | |
295 | (__boundary - 1 < (end) - 1)? __boundary: (end); \ | |
296 | }) | |
1da177e4 LT |
297 | |
298 | #ifndef pud_addr_end | |
299 | #define pud_addr_end(addr, end) \ | |
300 | ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \ | |
301 | (__boundary - 1 < (end) - 1)? __boundary: (end); \ | |
302 | }) | |
303 | #endif | |
304 | ||
305 | #ifndef pmd_addr_end | |
306 | #define pmd_addr_end(addr, end) \ | |
307 | ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ | |
308 | (__boundary - 1 < (end) - 1)? __boundary: (end); \ | |
309 | }) | |
310 | #endif | |
311 | ||
1da177e4 LT |
312 | /* |
313 | * When walking page tables, we usually want to skip any p?d_none entries; | |
314 | * and any p?d_bad entries - reporting the error before resetting to none. | |
315 | * Do the tests inline, but report and clear the bad entry in mm/memory.c. | |
316 | */ | |
317 | void pgd_clear_bad(pgd_t *); | |
318 | void pud_clear_bad(pud_t *); | |
319 | void pmd_clear_bad(pmd_t *); | |
320 | ||
321 | static inline int pgd_none_or_clear_bad(pgd_t *pgd) | |
322 | { | |
323 | if (pgd_none(*pgd)) | |
324 | return 1; | |
325 | if (unlikely(pgd_bad(*pgd))) { | |
326 | pgd_clear_bad(pgd); | |
327 | return 1; | |
328 | } | |
329 | return 0; | |
330 | } | |
331 | ||
332 | static inline int pud_none_or_clear_bad(pud_t *pud) | |
333 | { | |
334 | if (pud_none(*pud)) | |
335 | return 1; | |
336 | if (unlikely(pud_bad(*pud))) { | |
337 | pud_clear_bad(pud); | |
338 | return 1; | |
339 | } | |
340 | return 0; | |
341 | } | |
342 | ||
343 | static inline int pmd_none_or_clear_bad(pmd_t *pmd) | |
344 | { | |
345 | if (pmd_none(*pmd)) | |
346 | return 1; | |
347 | if (unlikely(pmd_bad(*pmd))) { | |
348 | pmd_clear_bad(pmd); | |
349 | return 1; | |
350 | } | |
351 | return 0; | |
352 | } | |
9535239f | 353 | |
1ea0704e JF |
354 | static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm, |
355 | unsigned long addr, | |
356 | pte_t *ptep) | |
357 | { | |
358 | /* | |
359 | * Get the current pte state, but zero it out to make it | |
360 | * non-present, preventing the hardware from asynchronously | |
361 | * updating it. | |
362 | */ | |
363 | return ptep_get_and_clear(mm, addr, ptep); | |
364 | } | |
365 | ||
366 | static inline void __ptep_modify_prot_commit(struct mm_struct *mm, | |
367 | unsigned long addr, | |
368 | pte_t *ptep, pte_t pte) | |
369 | { | |
370 | /* | |
371 | * The pte is non-present, so there's no hardware state to | |
372 | * preserve. | |
373 | */ | |
374 | set_pte_at(mm, addr, ptep, pte); | |
375 | } | |
376 | ||
377 | #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION | |
378 | /* | |
379 | * Start a pte protection read-modify-write transaction, which | |
380 | * protects against asynchronous hardware modifications to the pte. | |
381 | * The intention is not to prevent the hardware from making pte | |
382 | * updates, but to prevent any updates it may make from being lost. | |
383 | * | |
384 | * This does not protect against other software modifications of the | |
385 | * pte; the appropriate pte lock must be held over the transation. | |
386 | * | |
387 | * Note that this interface is intended to be batchable, meaning that | |
388 | * ptep_modify_prot_commit may not actually update the pte, but merely | |
389 | * queue the update to be done at some later time. The update must be | |
390 | * actually committed before the pte lock is released, however. | |
391 | */ | |
392 | static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, | |
393 | unsigned long addr, | |
394 | pte_t *ptep) | |
395 | { | |
396 | return __ptep_modify_prot_start(mm, addr, ptep); | |
397 | } | |
398 | ||
399 | /* | |
400 | * Commit an update to a pte, leaving any hardware-controlled bits in | |
401 | * the PTE unmodified. | |
402 | */ | |
403 | static inline void ptep_modify_prot_commit(struct mm_struct *mm, | |
404 | unsigned long addr, | |
405 | pte_t *ptep, pte_t pte) | |
406 | { | |
407 | __ptep_modify_prot_commit(mm, addr, ptep, pte); | |
408 | } | |
409 | #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ | |
fe1a6875 | 410 | #endif /* CONFIG_MMU */ |
1ea0704e | 411 | |
9535239f GU |
412 | /* |
413 | * A facility to provide lazy MMU batching. This allows PTE updates and | |
414 | * page invalidations to be delayed until a call to leave lazy MMU mode | |
415 | * is issued. Some architectures may benefit from doing this, and it is | |
416 | * beneficial for both shadow and direct mode hypervisors, which may batch | |
417 | * the PTE updates which happen during this window. Note that using this | |
418 | * interface requires that read hazards be removed from the code. A read | |
419 | * hazard could result in the direct mode hypervisor case, since the actual | |
420 | * write to the page tables may not yet have taken place, so reads though | |
421 | * a raw PTE pointer after it has been modified are not guaranteed to be | |
422 | * up to date. This mode can only be entered and left under the protection of | |
423 | * the page table locks for all page tables which may be modified. In the UP | |
424 | * case, this is required so that preemption is disabled, and in the SMP case, | |
425 | * it must synchronize the delayed page table writes properly on other CPUs. | |
426 | */ | |
427 | #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE | |
428 | #define arch_enter_lazy_mmu_mode() do {} while (0) | |
429 | #define arch_leave_lazy_mmu_mode() do {} while (0) | |
430 | #define arch_flush_lazy_mmu_mode() do {} while (0) | |
431 | #endif | |
432 | ||
433 | /* | |
7fd7d83d JF |
434 | * A facility to provide batching of the reload of page tables and |
435 | * other process state with the actual context switch code for | |
436 | * paravirtualized guests. By convention, only one of the batched | |
437 | * update (lazy) modes (CPU, MMU) should be active at any given time, | |
438 | * entry should never be nested, and entry and exits should always be | |
439 | * paired. This is for sanity of maintaining and reasoning about the | |
440 | * kernel code. In this case, the exit (end of the context switch) is | |
441 | * in architecture-specific code, and so doesn't need a generic | |
442 | * definition. | |
9535239f | 443 | */ |
7fd7d83d | 444 | #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH |
224101ed | 445 | #define arch_start_context_switch(prev) do {} while (0) |
9535239f GU |
446 | #endif |
447 | ||
0f8975ec PE |
448 | #ifndef CONFIG_HAVE_ARCH_SOFT_DIRTY |
449 | static inline int pte_soft_dirty(pte_t pte) | |
450 | { | |
451 | return 0; | |
452 | } | |
453 | ||
454 | static inline int pmd_soft_dirty(pmd_t pmd) | |
455 | { | |
456 | return 0; | |
457 | } | |
458 | ||
459 | static inline pte_t pte_mksoft_dirty(pte_t pte) | |
460 | { | |
461 | return pte; | |
462 | } | |
463 | ||
464 | static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) | |
465 | { | |
466 | return pmd; | |
467 | } | |
179ef71c CG |
468 | |
469 | static inline pte_t pte_swp_mksoft_dirty(pte_t pte) | |
470 | { | |
471 | return pte; | |
472 | } | |
473 | ||
474 | static inline int pte_swp_soft_dirty(pte_t pte) | |
475 | { | |
476 | return 0; | |
477 | } | |
478 | ||
479 | static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) | |
480 | { | |
481 | return pte; | |
482 | } | |
0f8975ec PE |
483 | #endif |
484 | ||
34801ba9 | 485 | #ifndef __HAVE_PFNMAP_TRACKING |
486 | /* | |
5180da41 SS |
487 | * Interfaces that can be used by architecture code to keep track of |
488 | * memory type of pfn mappings specified by the remap_pfn_range, | |
489 | * vm_insert_pfn. | |
490 | */ | |
491 | ||
492 | /* | |
493 | * track_pfn_remap is called when a _new_ pfn mapping is being established | |
494 | * by remap_pfn_range() for physical range indicated by pfn and size. | |
34801ba9 | 495 | */ |
5180da41 | 496 | static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, |
b3b9c293 KK |
497 | unsigned long pfn, unsigned long addr, |
498 | unsigned long size) | |
34801ba9 | 499 | { |
500 | return 0; | |
501 | } | |
502 | ||
503 | /* | |
5180da41 SS |
504 | * track_pfn_insert is called when a _new_ single pfn is established |
505 | * by vm_insert_pfn(). | |
506 | */ | |
507 | static inline int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, | |
508 | unsigned long pfn) | |
509 | { | |
510 | return 0; | |
511 | } | |
512 | ||
513 | /* | |
514 | * track_pfn_copy is called when vma that is covering the pfnmap gets | |
34801ba9 | 515 | * copied through copy_page_range(). |
516 | */ | |
5180da41 | 517 | static inline int track_pfn_copy(struct vm_area_struct *vma) |
34801ba9 | 518 | { |
519 | return 0; | |
520 | } | |
521 | ||
522 | /* | |
34801ba9 | 523 | * untrack_pfn_vma is called while unmapping a pfnmap for a region. |
524 | * untrack can be called for a specific region indicated by pfn and size or | |
5180da41 | 525 | * can be for the entire vma (in which case pfn, size are zero). |
34801ba9 | 526 | */ |
5180da41 SS |
527 | static inline void untrack_pfn(struct vm_area_struct *vma, |
528 | unsigned long pfn, unsigned long size) | |
34801ba9 | 529 | { |
530 | } | |
531 | #else | |
5180da41 | 532 | extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, |
b3b9c293 KK |
533 | unsigned long pfn, unsigned long addr, |
534 | unsigned long size); | |
5180da41 SS |
535 | extern int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, |
536 | unsigned long pfn); | |
537 | extern int track_pfn_copy(struct vm_area_struct *vma); | |
538 | extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, | |
539 | unsigned long size); | |
34801ba9 | 540 | #endif |
541 | ||
816422ad KS |
542 | #ifdef __HAVE_COLOR_ZERO_PAGE |
543 | static inline int is_zero_pfn(unsigned long pfn) | |
544 | { | |
545 | extern unsigned long zero_pfn; | |
546 | unsigned long offset_from_zero_pfn = pfn - zero_pfn; | |
547 | return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT); | |
548 | } | |
549 | ||
2f91ec8c KS |
550 | #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr)) |
551 | ||
816422ad KS |
552 | #else |
553 | static inline int is_zero_pfn(unsigned long pfn) | |
554 | { | |
555 | extern unsigned long zero_pfn; | |
556 | return pfn == zero_pfn; | |
557 | } | |
558 | ||
559 | static inline unsigned long my_zero_pfn(unsigned long addr) | |
560 | { | |
561 | extern unsigned long zero_pfn; | |
562 | return zero_pfn; | |
563 | } | |
564 | #endif | |
565 | ||
1a5a9906 AA |
566 | #ifdef CONFIG_MMU |
567 | ||
5f6e8da7 AA |
568 | #ifndef CONFIG_TRANSPARENT_HUGEPAGE |
569 | static inline int pmd_trans_huge(pmd_t pmd) | |
570 | { | |
571 | return 0; | |
572 | } | |
573 | static inline int pmd_trans_splitting(pmd_t pmd) | |
574 | { | |
575 | return 0; | |
576 | } | |
e2cda322 AA |
577 | #ifndef __HAVE_ARCH_PMD_WRITE |
578 | static inline int pmd_write(pmd_t pmd) | |
579 | { | |
580 | BUG(); | |
581 | return 0; | |
582 | } | |
583 | #endif /* __HAVE_ARCH_PMD_WRITE */ | |
1a5a9906 AA |
584 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |
585 | ||
26c19178 AA |
586 | #ifndef pmd_read_atomic |
587 | static inline pmd_t pmd_read_atomic(pmd_t *pmdp) | |
588 | { | |
589 | /* | |
590 | * Depend on compiler for an atomic pmd read. NOTE: this is | |
591 | * only going to work, if the pmdval_t isn't larger than | |
592 | * an unsigned long. | |
593 | */ | |
594 | return *pmdp; | |
595 | } | |
596 | #endif | |
597 | ||
b3084f4d AK |
598 | #ifndef pmd_move_must_withdraw |
599 | static inline int pmd_move_must_withdraw(spinlock_t *new_pmd_ptl, | |
600 | spinlock_t *old_pmd_ptl) | |
601 | { | |
602 | /* | |
603 | * With split pmd lock we also need to move preallocated | |
604 | * PTE page table if new_pmd is on different PMD page table. | |
605 | */ | |
606 | return new_pmd_ptl != old_pmd_ptl; | |
607 | } | |
608 | #endif | |
609 | ||
1a5a9906 AA |
610 | /* |
611 | * This function is meant to be used by sites walking pagetables with | |
612 | * the mmap_sem hold in read mode to protect against MADV_DONTNEED and | |
613 | * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd | |
614 | * into a null pmd and the transhuge page fault can convert a null pmd | |
615 | * into an hugepmd or into a regular pmd (if the hugepage allocation | |
616 | * fails). While holding the mmap_sem in read mode the pmd becomes | |
617 | * stable and stops changing under us only if it's not null and not a | |
618 | * transhuge pmd. When those races occurs and this function makes a | |
619 | * difference vs the standard pmd_none_or_clear_bad, the result is | |
620 | * undefined so behaving like if the pmd was none is safe (because it | |
621 | * can return none anyway). The compiler level barrier() is critically | |
622 | * important to compute the two checks atomically on the same pmdval. | |
26c19178 AA |
623 | * |
624 | * For 32bit kernels with a 64bit large pmd_t this automatically takes | |
625 | * care of reading the pmd atomically to avoid SMP race conditions | |
626 | * against pmd_populate() when the mmap_sem is hold for reading by the | |
627 | * caller (a special atomic read not done by "gcc" as in the generic | |
628 | * version above, is also needed when THP is disabled because the page | |
629 | * fault can populate the pmd from under us). | |
1a5a9906 AA |
630 | */ |
631 | static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd) | |
632 | { | |
26c19178 | 633 | pmd_t pmdval = pmd_read_atomic(pmd); |
1a5a9906 AA |
634 | /* |
635 | * The barrier will stabilize the pmdval in a register or on | |
636 | * the stack so that it will stop changing under the code. | |
e4eed03f AA |
637 | * |
638 | * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE, | |
639 | * pmd_read_atomic is allowed to return a not atomic pmdval | |
640 | * (for example pointing to an hugepage that has never been | |
641 | * mapped in the pmd). The below checks will only care about | |
642 | * the low part of the pmd with 32bit PAE x86 anyway, with the | |
643 | * exception of pmd_none(). So the important thing is that if | |
644 | * the low part of the pmd is found null, the high part will | |
645 | * be also null or the pmd_none() check below would be | |
646 | * confused. | |
1a5a9906 AA |
647 | */ |
648 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
649 | barrier(); | |
650 | #endif | |
ee53664b | 651 | if (pmd_none(pmdval) || pmd_trans_huge(pmdval)) |
1a5a9906 AA |
652 | return 1; |
653 | if (unlikely(pmd_bad(pmdval))) { | |
ee53664b | 654 | pmd_clear_bad(pmd); |
1a5a9906 AA |
655 | return 1; |
656 | } | |
657 | return 0; | |
658 | } | |
659 | ||
660 | /* | |
661 | * This is a noop if Transparent Hugepage Support is not built into | |
662 | * the kernel. Otherwise it is equivalent to | |
663 | * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in | |
664 | * places that already verified the pmd is not none and they want to | |
665 | * walk ptes while holding the mmap sem in read mode (write mode don't | |
666 | * need this). If THP is not enabled, the pmd can't go away under the | |
667 | * code even if MADV_DONTNEED runs, but if THP is enabled we need to | |
668 | * run a pmd_trans_unstable before walking the ptes after | |
669 | * split_huge_page_pmd returns (because it may have run when the pmd | |
670 | * become null, but then a page fault can map in a THP and not a | |
671 | * regular page). | |
672 | */ | |
673 | static inline int pmd_trans_unstable(pmd_t *pmd) | |
674 | { | |
675 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
676 | return pmd_none_or_trans_huge_or_clear_bad(pmd); | |
677 | #else | |
678 | return 0; | |
5f6e8da7 | 679 | #endif |
1a5a9906 AA |
680 | } |
681 | ||
e7bb4b6d MG |
682 | #ifndef CONFIG_NUMA_BALANCING |
683 | /* | |
684 | * Technically a PTE can be PROTNONE even when not doing NUMA balancing but | |
685 | * the only case the kernel cares is for NUMA balancing and is only ever set | |
686 | * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked | |
687 | * _PAGE_PROTNONE so by by default, implement the helper as "always no". It | |
688 | * is the responsibility of the caller to distinguish between PROT_NONE | |
689 | * protections and NUMA hinting fault protections. | |
690 | */ | |
691 | static inline int pte_protnone(pte_t pte) | |
692 | { | |
693 | return 0; | |
694 | } | |
695 | ||
696 | static inline int pmd_protnone(pmd_t pmd) | |
697 | { | |
698 | return 0; | |
699 | } | |
700 | #endif /* CONFIG_NUMA_BALANCING */ | |
701 | ||
1a5a9906 | 702 | #endif /* CONFIG_MMU */ |
5f6e8da7 | 703 | |
e61ce6ad TK |
704 | #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP |
705 | int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot); | |
706 | int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot); | |
b9820d8f TK |
707 | int pud_clear_huge(pud_t *pud); |
708 | int pmd_clear_huge(pmd_t *pmd); | |
e61ce6ad TK |
709 | #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */ |
710 | static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot) | |
711 | { | |
712 | return 0; | |
713 | } | |
714 | static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot) | |
715 | { | |
716 | return 0; | |
717 | } | |
b9820d8f TK |
718 | static inline int pud_clear_huge(pud_t *pud) |
719 | { | |
720 | return 0; | |
721 | } | |
722 | static inline int pmd_clear_huge(pmd_t *pmd) | |
723 | { | |
724 | return 0; | |
725 | } | |
e61ce6ad TK |
726 | #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */ |
727 | ||
1da177e4 LT |
728 | #endif /* !__ASSEMBLY__ */ |
729 | ||
40d158e6 AV |
730 | #ifndef io_remap_pfn_range |
731 | #define io_remap_pfn_range remap_pfn_range | |
732 | #endif | |
733 | ||
1da177e4 | 734 | #endif /* _ASM_GENERIC_PGTABLE_H */ |