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CommitLineData
1da177e4
LT
1#ifndef _ASM_GENERIC_PGTABLE_H
2#define _ASM_GENERIC_PGTABLE_H
3
f25748e3
DW
4#include <linux/pfn.h>
5
673eae82 6#ifndef __ASSEMBLY__
9535239f 7#ifdef CONFIG_MMU
673eae82 8
fbd71844 9#include <linux/mm_types.h>
187f1882 10#include <linux/bug.h>
e61ce6ad 11#include <linux/errno.h>
fbd71844 12
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13#if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
14 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
15#error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
235a8f02
KS
16#endif
17
6ee8630e
HD
18/*
19 * On almost all architectures and configurations, 0 can be used as the
20 * upper ceiling to free_pgtables(): on many architectures it has the same
21 * effect as using TASK_SIZE. However, there is one configuration which
22 * must impose a more careful limit, to avoid freeing kernel pgtables.
23 */
24#ifndef USER_PGTABLES_CEILING
25#define USER_PGTABLES_CEILING 0UL
26#endif
27
1da177e4 28#ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
e2cda322
AA
29extern int ptep_set_access_flags(struct vm_area_struct *vma,
30 unsigned long address, pte_t *ptep,
31 pte_t entry, int dirty);
32#endif
33
34#ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
bd5e88ad 35#ifdef CONFIG_TRANSPARENT_HUGEPAGE
e2cda322
AA
36extern int pmdp_set_access_flags(struct vm_area_struct *vma,
37 unsigned long address, pmd_t *pmdp,
38 pmd_t entry, int dirty);
a00cc7d9
MW
39extern int pudp_set_access_flags(struct vm_area_struct *vma,
40 unsigned long address, pud_t *pudp,
41 pud_t entry, int dirty);
bd5e88ad
VG
42#else
43static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
44 unsigned long address, pmd_t *pmdp,
45 pmd_t entry, int dirty)
46{
47 BUILD_BUG();
48 return 0;
49}
a00cc7d9
MW
50static inline int pudp_set_access_flags(struct vm_area_struct *vma,
51 unsigned long address, pud_t *pudp,
52 pud_t entry, int dirty)
53{
54 BUILD_BUG();
55 return 0;
56}
bd5e88ad 57#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4
LT
58#endif
59
60#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
e2cda322
AA
61static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
62 unsigned long address,
63 pte_t *ptep)
64{
65 pte_t pte = *ptep;
66 int r = 1;
67 if (!pte_young(pte))
68 r = 0;
69 else
70 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
71 return r;
72}
73#endif
74
75#ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
76#ifdef CONFIG_TRANSPARENT_HUGEPAGE
77static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
78 unsigned long address,
79 pmd_t *pmdp)
80{
81 pmd_t pmd = *pmdp;
82 int r = 1;
83 if (!pmd_young(pmd))
84 r = 0;
85 else
86 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
87 return r;
88}
bd5e88ad 89#else
e2cda322
AA
90static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
91 unsigned long address,
92 pmd_t *pmdp)
93{
bd5e88ad 94 BUILD_BUG();
e2cda322
AA
95 return 0;
96}
97#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4
LT
98#endif
99
100#ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
e2cda322
AA
101int ptep_clear_flush_young(struct vm_area_struct *vma,
102 unsigned long address, pte_t *ptep);
103#endif
104
105#ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
bd5e88ad
VG
106#ifdef CONFIG_TRANSPARENT_HUGEPAGE
107extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
108 unsigned long address, pmd_t *pmdp);
109#else
110/*
111 * Despite relevant to THP only, this API is called from generic rmap code
112 * under PageTransHuge(), hence needs a dummy implementation for !THP
113 */
114static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
115 unsigned long address, pmd_t *pmdp)
116{
117 BUILD_BUG();
118 return 0;
119}
120#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4
LT
121#endif
122
1da177e4 123#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
e2cda322
AA
124static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
125 unsigned long address,
126 pte_t *ptep)
127{
128 pte_t pte = *ptep;
129 pte_clear(mm, address, ptep);
130 return pte;
131}
132#endif
133
e2cda322 134#ifdef CONFIG_TRANSPARENT_HUGEPAGE
a00cc7d9 135#ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
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136static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
137 unsigned long address,
138 pmd_t *pmdp)
e2cda322
AA
139{
140 pmd_t pmd = *pmdp;
2d28a227 141 pmd_clear(pmdp);
e2cda322 142 return pmd;
49b24d6b 143}
a00cc7d9
MW
144#endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
145#ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
146static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
147 unsigned long address,
148 pud_t *pudp)
149{
150 pud_t pud = *pudp;
151
152 pud_clear(pudp);
153 return pud;
154}
155#endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
e2cda322 156#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4 157
fcbe08d6 158#ifdef CONFIG_TRANSPARENT_HUGEPAGE
a00cc7d9 159#ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
8809aa2d 160static inline pmd_t pmdp_huge_get_and_clear_full(struct mm_struct *mm,
fcbe08d6
MS
161 unsigned long address, pmd_t *pmdp,
162 int full)
163{
8809aa2d 164 return pmdp_huge_get_and_clear(mm, address, pmdp);
fcbe08d6 165}
fcbe08d6
MS
166#endif
167
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MW
168#ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
169static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
170 unsigned long address, pud_t *pudp,
171 int full)
172{
173 return pudp_huge_get_and_clear(mm, address, pudp);
174}
175#endif
176#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
177
a600388d 178#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
e2cda322
AA
179static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
180 unsigned long address, pte_t *ptep,
181 int full)
182{
183 pte_t pte;
184 pte = ptep_get_and_clear(mm, address, ptep);
185 return pte;
186}
a600388d
ZA
187#endif
188
9888a1ca
ZA
189/*
190 * Some architectures may be able to avoid expensive synchronization
191 * primitives when modifications are made to PTE's which are already
192 * not present, or in the process of an address space destruction.
193 */
194#ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
e2cda322
AA
195static inline void pte_clear_not_present_full(struct mm_struct *mm,
196 unsigned long address,
197 pte_t *ptep,
198 int full)
199{
200 pte_clear(mm, address, ptep);
201}
a600388d
ZA
202#endif
203
1da177e4 204#ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
e2cda322
AA
205extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
206 unsigned long address,
207 pte_t *ptep);
208#endif
209
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210#ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
211extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
e2cda322
AA
212 unsigned long address,
213 pmd_t *pmdp);
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MW
214extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
215 unsigned long address,
216 pud_t *pudp);
1da177e4
LT
217#endif
218
219#ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
8c65b4a6 220struct mm_struct;
1da177e4
LT
221static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
222{
223 pte_t old_pte = *ptep;
224 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
225}
226#endif
227
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228#ifndef pte_savedwrite
229#define pte_savedwrite pte_write
230#endif
231
232#ifndef pte_mk_savedwrite
233#define pte_mk_savedwrite pte_mkwrite
234#endif
235
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236#ifndef pte_clear_savedwrite
237#define pte_clear_savedwrite pte_wrprotect
238#endif
239
288bc549
AK
240#ifndef pmd_savedwrite
241#define pmd_savedwrite pmd_write
242#endif
243
244#ifndef pmd_mk_savedwrite
245#define pmd_mk_savedwrite pmd_mkwrite
246#endif
247
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AK
248#ifndef pmd_clear_savedwrite
249#define pmd_clear_savedwrite pmd_wrprotect
250#endif
251
e2cda322
AA
252#ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
253#ifdef CONFIG_TRANSPARENT_HUGEPAGE
254static inline void pmdp_set_wrprotect(struct mm_struct *mm,
255 unsigned long address, pmd_t *pmdp)
256{
257 pmd_t old_pmd = *pmdp;
258 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
259}
bd5e88ad 260#else
e2cda322
AA
261static inline void pmdp_set_wrprotect(struct mm_struct *mm,
262 unsigned long address, pmd_t *pmdp)
263{
bd5e88ad 264 BUILD_BUG();
e2cda322
AA
265}
266#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
267#endif
a00cc7d9
MW
268#ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
269#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
270static inline void pudp_set_wrprotect(struct mm_struct *mm,
271 unsigned long address, pud_t *pudp)
272{
273 pud_t old_pud = *pudp;
274
275 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
276}
277#else
278static inline void pudp_set_wrprotect(struct mm_struct *mm,
279 unsigned long address, pud_t *pudp)
280{
281 BUILD_BUG();
282}
283#endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
284#endif
e2cda322 285
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AK
286#ifndef pmdp_collapse_flush
287#ifdef CONFIG_TRANSPARENT_HUGEPAGE
f28b6ff8
AK
288extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
289 unsigned long address, pmd_t *pmdp);
15a25b2e
AK
290#else
291static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
292 unsigned long address,
293 pmd_t *pmdp)
294{
295 BUILD_BUG();
296 return *pmdp;
297}
298#define pmdp_collapse_flush pmdp_collapse_flush
299#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
300#endif
301
e3ebcf64 302#ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
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AK
303extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
304 pgtable_t pgtable);
e3ebcf64
GS
305#endif
306
307#ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
6b0b50b0 308extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
e3ebcf64
GS
309#endif
310
46dcde73
GS
311#ifndef __HAVE_ARCH_PMDP_INVALIDATE
312extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
313 pmd_t *pmdp);
314#endif
315
c777e2a8
AK
316#ifndef __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPARE
317static inline void pmdp_huge_split_prepare(struct vm_area_struct *vma,
318 unsigned long address, pmd_t *pmdp)
319{
320
321}
322#endif
323
1da177e4 324#ifndef __HAVE_ARCH_PTE_SAME
e2cda322
AA
325static inline int pte_same(pte_t pte_a, pte_t pte_b)
326{
327 return pte_val(pte_a) == pte_val(pte_b);
328}
329#endif
330
45961722
KW
331#ifndef __HAVE_ARCH_PTE_UNUSED
332/*
333 * Some architectures provide facilities to virtualization guests
334 * so that they can flag allocated pages as unused. This allows the
335 * host to transparently reclaim unused pages. This function returns
336 * whether the pte's page is unused.
337 */
338static inline int pte_unused(pte_t pte)
339{
340 return 0;
341}
342#endif
343
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KS
344#ifndef pte_access_permitted
345#define pte_access_permitted(pte, write) \
346 (pte_present(pte) && (!(write) || pte_write(pte)))
347#endif
348
349#ifndef pmd_access_permitted
350#define pmd_access_permitted(pmd, write) \
351 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
352#endif
353
354#ifndef pud_access_permitted
355#define pud_access_permitted(pud, write) \
356 (pud_present(pud) && (!(write) || pud_write(pud)))
357#endif
358
359#ifndef p4d_access_permitted
360#define p4d_access_permitted(p4d, write) \
361 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
362#endif
363
364#ifndef pgd_access_permitted
365#define pgd_access_permitted(pgd, write) \
366 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
367#endif
368
e2cda322
AA
369#ifndef __HAVE_ARCH_PMD_SAME
370#ifdef CONFIG_TRANSPARENT_HUGEPAGE
371static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
372{
373 return pmd_val(pmd_a) == pmd_val(pmd_b);
374}
a00cc7d9
MW
375
376static inline int pud_same(pud_t pud_a, pud_t pud_b)
377{
378 return pud_val(pud_a) == pud_val(pud_b);
379}
e2cda322
AA
380#else /* CONFIG_TRANSPARENT_HUGEPAGE */
381static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
382{
bd5e88ad 383 BUILD_BUG();
e2cda322
AA
384 return 0;
385}
a00cc7d9
MW
386
387static inline int pud_same(pud_t pud_a, pud_t pud_b)
388{
389 BUILD_BUG();
390 return 0;
391}
e2cda322 392#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4
LT
393#endif
394
1da177e4
LT
395#ifndef __HAVE_ARCH_PGD_OFFSET_GATE
396#define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
397#endif
398
0b0968a3 399#ifndef __HAVE_ARCH_MOVE_PTE
8b1f3124 400#define move_pte(pte, prot, old_addr, new_addr) (pte)
8b1f3124
NP
401#endif
402
2c3cf556 403#ifndef pte_accessible
20841405 404# define pte_accessible(mm, pte) ((void)(pte), 1)
2c3cf556
RR
405#endif
406
61c77326
SL
407#ifndef flush_tlb_fix_spurious_fault
408#define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
409#endif
410
0634a632
PM
411#ifndef pgprot_noncached
412#define pgprot_noncached(prot) (prot)
413#endif
414
2520bd31 415#ifndef pgprot_writecombine
416#define pgprot_writecombine pgprot_noncached
417#endif
418
d1b4bfbf
TK
419#ifndef pgprot_writethrough
420#define pgprot_writethrough pgprot_noncached
421#endif
422
8b921acf
LD
423#ifndef pgprot_device
424#define pgprot_device pgprot_noncached
425#endif
426
64e45507
PF
427#ifndef pgprot_modify
428#define pgprot_modify pgprot_modify
429static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
430{
431 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
432 newprot = pgprot_noncached(newprot);
433 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
434 newprot = pgprot_writecombine(newprot);
435 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
436 newprot = pgprot_device(newprot);
437 return newprot;
438}
439#endif
440
1da177e4 441/*
8f6c99c1
HD
442 * When walking page tables, get the address of the next boundary,
443 * or the end address of the range if that comes earlier. Although no
444 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
1da177e4
LT
445 */
446
1da177e4
LT
447#define pgd_addr_end(addr, end) \
448({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
449 (__boundary - 1 < (end) - 1)? __boundary: (end); \
450})
1da177e4 451
c2febafc
KS
452#ifndef p4d_addr_end
453#define p4d_addr_end(addr, end) \
454({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
455 (__boundary - 1 < (end) - 1)? __boundary: (end); \
456})
457#endif
458
1da177e4
LT
459#ifndef pud_addr_end
460#define pud_addr_end(addr, end) \
461({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
462 (__boundary - 1 < (end) - 1)? __boundary: (end); \
463})
464#endif
465
466#ifndef pmd_addr_end
467#define pmd_addr_end(addr, end) \
468({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
469 (__boundary - 1 < (end) - 1)? __boundary: (end); \
470})
471#endif
472
1da177e4
LT
473/*
474 * When walking page tables, we usually want to skip any p?d_none entries;
475 * and any p?d_bad entries - reporting the error before resetting to none.
476 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
477 */
478void pgd_clear_bad(pgd_t *);
c2febafc 479void p4d_clear_bad(p4d_t *);
1da177e4
LT
480void pud_clear_bad(pud_t *);
481void pmd_clear_bad(pmd_t *);
482
483static inline int pgd_none_or_clear_bad(pgd_t *pgd)
484{
485 if (pgd_none(*pgd))
486 return 1;
487 if (unlikely(pgd_bad(*pgd))) {
488 pgd_clear_bad(pgd);
489 return 1;
490 }
491 return 0;
492}
493
c2febafc
KS
494static inline int p4d_none_or_clear_bad(p4d_t *p4d)
495{
496 if (p4d_none(*p4d))
497 return 1;
498 if (unlikely(p4d_bad(*p4d))) {
499 p4d_clear_bad(p4d);
500 return 1;
501 }
502 return 0;
503}
504
1da177e4
LT
505static inline int pud_none_or_clear_bad(pud_t *pud)
506{
507 if (pud_none(*pud))
508 return 1;
509 if (unlikely(pud_bad(*pud))) {
510 pud_clear_bad(pud);
511 return 1;
512 }
513 return 0;
514}
515
516static inline int pmd_none_or_clear_bad(pmd_t *pmd)
517{
518 if (pmd_none(*pmd))
519 return 1;
520 if (unlikely(pmd_bad(*pmd))) {
521 pmd_clear_bad(pmd);
522 return 1;
523 }
524 return 0;
525}
9535239f 526
1ea0704e
JF
527static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
528 unsigned long addr,
529 pte_t *ptep)
530{
531 /*
532 * Get the current pte state, but zero it out to make it
533 * non-present, preventing the hardware from asynchronously
534 * updating it.
535 */
536 return ptep_get_and_clear(mm, addr, ptep);
537}
538
539static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
540 unsigned long addr,
541 pte_t *ptep, pte_t pte)
542{
543 /*
544 * The pte is non-present, so there's no hardware state to
545 * preserve.
546 */
547 set_pte_at(mm, addr, ptep, pte);
548}
549
550#ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
551/*
552 * Start a pte protection read-modify-write transaction, which
553 * protects against asynchronous hardware modifications to the pte.
554 * The intention is not to prevent the hardware from making pte
555 * updates, but to prevent any updates it may make from being lost.
556 *
557 * This does not protect against other software modifications of the
558 * pte; the appropriate pte lock must be held over the transation.
559 *
560 * Note that this interface is intended to be batchable, meaning that
561 * ptep_modify_prot_commit may not actually update the pte, but merely
562 * queue the update to be done at some later time. The update must be
563 * actually committed before the pte lock is released, however.
564 */
565static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
566 unsigned long addr,
567 pte_t *ptep)
568{
569 return __ptep_modify_prot_start(mm, addr, ptep);
570}
571
572/*
573 * Commit an update to a pte, leaving any hardware-controlled bits in
574 * the PTE unmodified.
575 */
576static inline void ptep_modify_prot_commit(struct mm_struct *mm,
577 unsigned long addr,
578 pte_t *ptep, pte_t pte)
579{
580 __ptep_modify_prot_commit(mm, addr, ptep, pte);
581}
582#endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
fe1a6875 583#endif /* CONFIG_MMU */
1ea0704e 584
21729f81
TL
585/*
586 * No-op macros that just return the current protection value. Defined here
587 * because these macros can be used used even if CONFIG_MMU is not defined.
588 */
589#ifndef pgprot_encrypted
590#define pgprot_encrypted(prot) (prot)
591#endif
592
593#ifndef pgprot_decrypted
594#define pgprot_decrypted(prot) (prot)
595#endif
596
9535239f
GU
597/*
598 * A facility to provide lazy MMU batching. This allows PTE updates and
599 * page invalidations to be delayed until a call to leave lazy MMU mode
600 * is issued. Some architectures may benefit from doing this, and it is
601 * beneficial for both shadow and direct mode hypervisors, which may batch
602 * the PTE updates which happen during this window. Note that using this
603 * interface requires that read hazards be removed from the code. A read
604 * hazard could result in the direct mode hypervisor case, since the actual
605 * write to the page tables may not yet have taken place, so reads though
606 * a raw PTE pointer after it has been modified are not guaranteed to be
607 * up to date. This mode can only be entered and left under the protection of
608 * the page table locks for all page tables which may be modified. In the UP
609 * case, this is required so that preemption is disabled, and in the SMP case,
610 * it must synchronize the delayed page table writes properly on other CPUs.
611 */
612#ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
613#define arch_enter_lazy_mmu_mode() do {} while (0)
614#define arch_leave_lazy_mmu_mode() do {} while (0)
615#define arch_flush_lazy_mmu_mode() do {} while (0)
616#endif
617
618/*
7fd7d83d
JF
619 * A facility to provide batching of the reload of page tables and
620 * other process state with the actual context switch code for
621 * paravirtualized guests. By convention, only one of the batched
622 * update (lazy) modes (CPU, MMU) should be active at any given time,
623 * entry should never be nested, and entry and exits should always be
624 * paired. This is for sanity of maintaining and reasoning about the
625 * kernel code. In this case, the exit (end of the context switch) is
626 * in architecture-specific code, and so doesn't need a generic
627 * definition.
9535239f 628 */
7fd7d83d 629#ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
224101ed 630#define arch_start_context_switch(prev) do {} while (0)
9535239f
GU
631#endif
632
ab6e3d09
NH
633#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
634#ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
635static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
636{
637 return pmd;
638}
639
640static inline int pmd_swp_soft_dirty(pmd_t pmd)
641{
642 return 0;
643}
644
645static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
646{
647 return pmd;
648}
649#endif
650#else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
0f8975ec
PE
651static inline int pte_soft_dirty(pte_t pte)
652{
653 return 0;
654}
655
656static inline int pmd_soft_dirty(pmd_t pmd)
657{
658 return 0;
659}
660
661static inline pte_t pte_mksoft_dirty(pte_t pte)
662{
663 return pte;
664}
665
666static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
667{
668 return pmd;
669}
179ef71c 670
a7b76174
MS
671static inline pte_t pte_clear_soft_dirty(pte_t pte)
672{
673 return pte;
674}
675
676static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
677{
678 return pmd;
679}
680
179ef71c
CG
681static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
682{
683 return pte;
684}
685
686static inline int pte_swp_soft_dirty(pte_t pte)
687{
688 return 0;
689}
690
691static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
692{
693 return pte;
694}
ab6e3d09
NH
695
696static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
697{
698 return pmd;
699}
700
701static inline int pmd_swp_soft_dirty(pmd_t pmd)
702{
703 return 0;
704}
705
706static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
707{
708 return pmd;
709}
0f8975ec
PE
710#endif
711
34801ba9 712#ifndef __HAVE_PFNMAP_TRACKING
713/*
5180da41
SS
714 * Interfaces that can be used by architecture code to keep track of
715 * memory type of pfn mappings specified by the remap_pfn_range,
716 * vm_insert_pfn.
717 */
718
719/*
720 * track_pfn_remap is called when a _new_ pfn mapping is being established
721 * by remap_pfn_range() for physical range indicated by pfn and size.
34801ba9 722 */
5180da41 723static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
b3b9c293
KK
724 unsigned long pfn, unsigned long addr,
725 unsigned long size)
34801ba9 726{
727 return 0;
728}
729
730/*
5180da41
SS
731 * track_pfn_insert is called when a _new_ single pfn is established
732 * by vm_insert_pfn().
733 */
308a047c
BP
734static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
735 pfn_t pfn)
5180da41 736{
5180da41
SS
737}
738
739/*
740 * track_pfn_copy is called when vma that is covering the pfnmap gets
34801ba9 741 * copied through copy_page_range().
742 */
5180da41 743static inline int track_pfn_copy(struct vm_area_struct *vma)
34801ba9 744{
745 return 0;
746}
747
748/*
d9fe4fab 749 * untrack_pfn is called while unmapping a pfnmap for a region.
34801ba9 750 * untrack can be called for a specific region indicated by pfn and size or
5180da41 751 * can be for the entire vma (in which case pfn, size are zero).
34801ba9 752 */
5180da41
SS
753static inline void untrack_pfn(struct vm_area_struct *vma,
754 unsigned long pfn, unsigned long size)
34801ba9 755{
756}
d9fe4fab
TK
757
758/*
759 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
760 */
761static inline void untrack_pfn_moved(struct vm_area_struct *vma)
762{
763}
34801ba9 764#else
5180da41 765extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
b3b9c293
KK
766 unsigned long pfn, unsigned long addr,
767 unsigned long size);
308a047c
BP
768extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
769 pfn_t pfn);
5180da41
SS
770extern int track_pfn_copy(struct vm_area_struct *vma);
771extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
772 unsigned long size);
d9fe4fab 773extern void untrack_pfn_moved(struct vm_area_struct *vma);
34801ba9 774#endif
775
816422ad
KS
776#ifdef __HAVE_COLOR_ZERO_PAGE
777static inline int is_zero_pfn(unsigned long pfn)
778{
779 extern unsigned long zero_pfn;
780 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
781 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
782}
783
2f91ec8c
KS
784#define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
785
816422ad
KS
786#else
787static inline int is_zero_pfn(unsigned long pfn)
788{
789 extern unsigned long zero_pfn;
790 return pfn == zero_pfn;
791}
792
793static inline unsigned long my_zero_pfn(unsigned long addr)
794{
795 extern unsigned long zero_pfn;
796 return zero_pfn;
797}
798#endif
799
1a5a9906
AA
800#ifdef CONFIG_MMU
801
5f6e8da7
AA
802#ifndef CONFIG_TRANSPARENT_HUGEPAGE
803static inline int pmd_trans_huge(pmd_t pmd)
804{
805 return 0;
806}
e2cda322
AA
807#ifndef __HAVE_ARCH_PMD_WRITE
808static inline int pmd_write(pmd_t pmd)
809{
810 BUG();
811 return 0;
812}
813#endif /* __HAVE_ARCH_PMD_WRITE */
1a5a9906
AA
814#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
815
a00cc7d9
MW
816#if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
817 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
818 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
819static inline int pud_trans_huge(pud_t pud)
820{
821 return 0;
822}
823#endif
824
26c19178
AA
825#ifndef pmd_read_atomic
826static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
827{
828 /*
829 * Depend on compiler for an atomic pmd read. NOTE: this is
830 * only going to work, if the pmdval_t isn't larger than
831 * an unsigned long.
832 */
833 return *pmdp;
834}
835#endif
836
953c66c2
AK
837#ifndef arch_needs_pgtable_deposit
838#define arch_needs_pgtable_deposit() (false)
839#endif
1a5a9906
AA
840/*
841 * This function is meant to be used by sites walking pagetables with
842 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
843 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
844 * into a null pmd and the transhuge page fault can convert a null pmd
845 * into an hugepmd or into a regular pmd (if the hugepage allocation
846 * fails). While holding the mmap_sem in read mode the pmd becomes
847 * stable and stops changing under us only if it's not null and not a
848 * transhuge pmd. When those races occurs and this function makes a
849 * difference vs the standard pmd_none_or_clear_bad, the result is
850 * undefined so behaving like if the pmd was none is safe (because it
851 * can return none anyway). The compiler level barrier() is critically
852 * important to compute the two checks atomically on the same pmdval.
26c19178
AA
853 *
854 * For 32bit kernels with a 64bit large pmd_t this automatically takes
855 * care of reading the pmd atomically to avoid SMP race conditions
856 * against pmd_populate() when the mmap_sem is hold for reading by the
857 * caller (a special atomic read not done by "gcc" as in the generic
858 * version above, is also needed when THP is disabled because the page
859 * fault can populate the pmd from under us).
1a5a9906
AA
860 */
861static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
862{
26c19178 863 pmd_t pmdval = pmd_read_atomic(pmd);
1a5a9906
AA
864 /*
865 * The barrier will stabilize the pmdval in a register or on
866 * the stack so that it will stop changing under the code.
e4eed03f
AA
867 *
868 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
869 * pmd_read_atomic is allowed to return a not atomic pmdval
870 * (for example pointing to an hugepage that has never been
871 * mapped in the pmd). The below checks will only care about
872 * the low part of the pmd with 32bit PAE x86 anyway, with the
873 * exception of pmd_none(). So the important thing is that if
874 * the low part of the pmd is found null, the high part will
875 * be also null or the pmd_none() check below would be
876 * confused.
1a5a9906
AA
877 */
878#ifdef CONFIG_TRANSPARENT_HUGEPAGE
879 barrier();
880#endif
84c3fc4e
ZY
881 /*
882 * !pmd_present() checks for pmd migration entries
883 *
884 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
885 * But using that requires moving current function and pmd_trans_unstable()
886 * to linux/swapops.h to resovle dependency, which is too much code move.
887 *
888 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
889 * because !pmd_present() pages can only be under migration not swapped
890 * out.
891 *
892 * pmd_none() is preseved for future condition checks on pmd migration
893 * entries and not confusing with this function name, although it is
894 * redundant with !pmd_present().
895 */
896 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
897 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1a5a9906
AA
898 return 1;
899 if (unlikely(pmd_bad(pmdval))) {
ee53664b 900 pmd_clear_bad(pmd);
1a5a9906
AA
901 return 1;
902 }
903 return 0;
904}
905
906/*
907 * This is a noop if Transparent Hugepage Support is not built into
908 * the kernel. Otherwise it is equivalent to
909 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
910 * places that already verified the pmd is not none and they want to
911 * walk ptes while holding the mmap sem in read mode (write mode don't
912 * need this). If THP is not enabled, the pmd can't go away under the
913 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
914 * run a pmd_trans_unstable before walking the ptes after
915 * split_huge_page_pmd returns (because it may have run when the pmd
916 * become null, but then a page fault can map in a THP and not a
917 * regular page).
918 */
919static inline int pmd_trans_unstable(pmd_t *pmd)
920{
921#ifdef CONFIG_TRANSPARENT_HUGEPAGE
922 return pmd_none_or_trans_huge_or_clear_bad(pmd);
923#else
924 return 0;
5f6e8da7 925#endif
1a5a9906
AA
926}
927
e7bb4b6d
MG
928#ifndef CONFIG_NUMA_BALANCING
929/*
930 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
931 * the only case the kernel cares is for NUMA balancing and is only ever set
932 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
933 * _PAGE_PROTNONE so by by default, implement the helper as "always no". It
934 * is the responsibility of the caller to distinguish between PROT_NONE
935 * protections and NUMA hinting fault protections.
936 */
937static inline int pte_protnone(pte_t pte)
938{
939 return 0;
940}
941
942static inline int pmd_protnone(pmd_t pmd)
943{
944 return 0;
945}
946#endif /* CONFIG_NUMA_BALANCING */
947
1a5a9906 948#endif /* CONFIG_MMU */
5f6e8da7 949
e61ce6ad 950#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
c2febafc
KS
951
952#ifndef __PAGETABLE_P4D_FOLDED
953int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
954int p4d_clear_huge(p4d_t *p4d);
955#else
956static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
957{
958 return 0;
959}
960static inline int p4d_clear_huge(p4d_t *p4d)
961{
962 return 0;
963}
964#endif /* !__PAGETABLE_P4D_FOLDED */
965
e61ce6ad
TK
966int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
967int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
b9820d8f
TK
968int pud_clear_huge(pud_t *pud);
969int pmd_clear_huge(pmd_t *pmd);
e61ce6ad 970#else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
c2febafc
KS
971static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
972{
973 return 0;
974}
e61ce6ad
TK
975static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
976{
977 return 0;
978}
979static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
980{
981 return 0;
982}
c2febafc
KS
983static inline int p4d_clear_huge(p4d_t *p4d)
984{
985 return 0;
986}
b9820d8f
TK
987static inline int pud_clear_huge(pud_t *pud)
988{
989 return 0;
990}
991static inline int pmd_clear_huge(pmd_t *pmd)
992{
993 return 0;
994}
e61ce6ad
TK
995#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
996
458aa76d
AK
997#ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
998#ifdef CONFIG_TRANSPARENT_HUGEPAGE
999/*
1000 * ARCHes with special requirements for evicting THP backing TLB entries can
1001 * implement this. Otherwise also, it can help optimize normal TLB flush in
1002 * THP regime. stock flush_tlb_range() typically has optimization to nuke the
1003 * entire TLB TLB if flush span is greater than a threshold, which will
1004 * likely be true for a single huge page. Thus a single thp flush will
1005 * invalidate the entire TLB which is not desitable.
1006 * e.g. see arch/arc: flush_pmd_tlb_range
1007 */
1008#define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
a00cc7d9 1009#define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
458aa76d
AK
1010#else
1011#define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
a00cc7d9 1012#define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
458aa76d
AK
1013#endif
1014#endif
1015
08ea8c07
BX
1016struct file;
1017int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1018 unsigned long size, pgprot_t *vma_prot);
1da177e4
LT
1019#endif /* !__ASSEMBLY__ */
1020
40d158e6
AV
1021#ifndef io_remap_pfn_range
1022#define io_remap_pfn_range remap_pfn_range
1023#endif
1024
fd8cfd30
HD
1025#ifndef has_transparent_hugepage
1026#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1027#define has_transparent_hugepage() 1
1028#else
1029#define has_transparent_hugepage() 0
1030#endif
1031#endif
1032
1da177e4 1033#endif /* _ASM_GENERIC_PGTABLE_H */