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2874c5fd 1/* SPDX-License-Identifier: GPL-2.0-or-later */
f30c2269 2/* include/asm-generic/tlb.h
1da177e4
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3 *
4 * Generic TLB shootdown code
5 *
6 * Copyright 2001 Red Hat, Inc.
7 * Based on code from mm/memory.c Copyright Linus Torvalds and others.
8 *
90eec103 9 * Copyright 2011 Red Hat, Inc., Peter Zijlstra
1da177e4
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10 */
11#ifndef _ASM_GENERIC__TLB_H
12#define _ASM_GENERIC__TLB_H
13
fd1102f0 14#include <linux/mmu_notifier.h>
1da177e4 15#include <linux/swap.h>
62152d0e 16#include <asm/pgalloc.h>
1da177e4 17#include <asm/tlbflush.h>
e7fd28a7 18#include <asm/cacheflush.h>
1da177e4 19
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20/*
21 * Blindly accessing user memory from NMI context can be dangerous
22 * if we're in the middle of switching the current user task or switching
23 * the loaded mm.
24 */
25#ifndef nmi_uaccess_okay
26# define nmi_uaccess_okay() true
27#endif
28
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29#ifdef CONFIG_MMU
30
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31/*
32 * Generic MMU-gather implementation.
33 *
34 * The mmu_gather data structure is used by the mm code to implement the
35 * correct and efficient ordering of freeing pages and TLB invalidations.
36 *
37 * This correct ordering is:
38 *
39 * 1) unhook page
40 * 2) TLB invalidate page
41 * 3) free page
42 *
43 * That is, we must never free a page before we have ensured there are no live
44 * translations left to it. Otherwise it might be possible to observe (or
45 * worse, change) the page content after it has been reused.
46 *
47 * The mmu_gather API consists of:
48 *
49 * - tlb_gather_mmu() / tlb_finish_mmu(); start and finish a mmu_gather
50 *
51 * Finish in particular will issue a (final) TLB invalidate and free
52 * all (remaining) queued pages.
53 *
54 * - tlb_start_vma() / tlb_end_vma(); marks the start / end of a VMA
55 *
56 * Defaults to flushing at tlb_end_vma() to reset the range; helps when
57 * there's large holes between the VMAs.
58 *
59 * - tlb_remove_page() / __tlb_remove_page()
60 * - tlb_remove_page_size() / __tlb_remove_page_size()
61 *
62 * __tlb_remove_page_size() is the basic primitive that queues a page for
63 * freeing. __tlb_remove_page() assumes PAGE_SIZE. Both will return a
64 * boolean indicating if the queue is (now) full and a call to
65 * tlb_flush_mmu() is required.
66 *
67 * tlb_remove_page() and tlb_remove_page_size() imply the call to
68 * tlb_flush_mmu() when required and has no return value.
69 *
ed6a7935 70 * - tlb_change_page_size()
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71 *
72 * call before __tlb_remove_page*() to set the current page-size; implies a
73 * possible tlb_flush_mmu() call.
74 *
fa0aafb8 75 * - tlb_flush_mmu() / tlb_flush_mmu_tlbonly()
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76 *
77 * tlb_flush_mmu_tlbonly() - does the TLB invalidate (and resets
78 * related state, like the range)
79 *
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80 * tlb_flush_mmu() - in addition to the above TLB invalidate, also frees
81 * whatever pages are still batched.
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82 *
83 * - mmu_gather::fullmm
84 *
85 * A flag set by tlb_gather_mmu() to indicate we're going to free
86 * the entire mm; this allows a number of optimizations.
87 *
88 * - We can ignore tlb_{start,end}_vma(); because we don't
89 * care about ranges. Everything will be shot down.
90 *
91 * - (RISC) architectures that use ASIDs can cycle to a new ASID
92 * and delay the invalidation until ASID space runs out.
93 *
94 * - mmu_gather::need_flush_all
95 *
96 * A flag that can be set by the arch code if it wants to force
97 * flush the entire TLB irrespective of the range. For instance
98 * x86-PAE needs this when changing top-level entries.
99 *
5f307be1 100 * And allows the architecture to provide and implement tlb_flush():
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101 *
102 * tlb_flush() may, in addition to the above mentioned mmu_gather fields, make
103 * use of:
104 *
105 * - mmu_gather::start / mmu_gather::end
106 *
107 * which provides the range that needs to be flushed to cover the pages to
108 * be freed.
109 *
110 * - mmu_gather::freed_tables
111 *
112 * set when we freed page table pages
113 *
114 * - tlb_get_unmap_shift() / tlb_get_unmap_size()
115 *
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116 * returns the smallest TLB entry size unmapped in this range.
117 *
118 * If an architecture does not provide tlb_flush() a default implementation
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119 * based on flush_tlb_range() will be used, unless MMU_GATHER_NO_RANGE is
120 * specified, in which case we'll default to flush_tlb_mm().
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121 *
122 * Additionally there are a few opt-in features:
123 *
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124 * HAVE_MMU_GATHER_PAGE_SIZE
125 *
126 * This ensures we call tlb_flush() every time tlb_change_page_size() actually
127 * changes the size and provides mmu_gather::page_size to tlb_flush().
128 *
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129 * HAVE_RCU_TABLE_FREE
130 *
131 * This provides tlb_remove_table(), to be used instead of tlb_remove_page()
132 * for page directores (__p*_free_tlb()). This provides separate freeing of
133 * the page-table pages themselves in a semi-RCU fashion (see comment below).
134 * Useful if your architecture doesn't use IPIs for remote TLB invalidates
135 * and therefore doesn't naturally serialize with software page-table walkers.
136 *
137 * When used, an architecture is expected to provide __tlb_remove_table()
138 * which does the actual freeing of these pages.
139 *
96bc9567 140 * HAVE_RCU_TABLE_NO_INVALIDATE
dea2434c 141 *
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142 * This makes HAVE_RCU_TABLE_FREE avoid calling tlb_flush_mmu_tlbonly() before
143 * freeing the page-table pages. This can be avoided if you use
144 * HAVE_RCU_TABLE_FREE and your architecture does _NOT_ use the Linux
145 * page-tables natively.
dea2434c 146 *
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147 * MMU_GATHER_NO_RANGE
148 *
149 * Use this if your architecture lacks an efficient flush_tlb_range().
dea2434c 150 */
dea2434c 151
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152#ifdef CONFIG_HAVE_RCU_TABLE_FREE
153/*
154 * Semi RCU freeing of the page directories.
155 *
156 * This is needed by some architectures to implement software pagetable walkers.
157 *
158 * gup_fast() and other software pagetable walkers do a lockless page-table
159 * walk and therefore needs some synchronization with the freeing of the page
160 * directories. The chosen means to accomplish that is by disabling IRQs over
161 * the walk.
162 *
163 * Architectures that use IPIs to flush TLBs will then automagically DTRT,
164 * since we unlink the page, flush TLBs, free the page. Since the disabling of
165 * IRQs delays the completion of the TLB flush we can never observe an already
166 * freed page.
167 *
168 * Architectures that do not have this (PPC) need to delay the freeing by some
169 * other means, this is that means.
170 *
171 * What we do is batch the freed directory pages (tables) and RCU free them.
172 * We use the sched RCU variant, as that guarantees that IRQ/preempt disabling
173 * holds off grace periods.
174 *
175 * However, in order to batch these pages we need to allocate storage, this
176 * allocation is deep inside the MM code and can thus easily fail on memory
177 * pressure. To guarantee progress we fall back to single table freeing, see
178 * the implementation of tlb_remove_table_one().
179 *
180 */
181struct mmu_table_batch {
182 struct rcu_head rcu;
183 unsigned int nr;
184 void *tables[0];
185};
186
187#define MAX_TABLE_BATCH \
188 ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
189
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190extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
191
192#endif
193
952a31c9 194#ifndef CONFIG_HAVE_MMU_GATHER_NO_GATHER
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195/*
196 * If we can't allocate a page to make a big batch of page pointers
197 * to work on, then just handle a few from the on-stack structure.
198 */
199#define MMU_GATHER_BUNDLE 8
200
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201struct mmu_gather_batch {
202 struct mmu_gather_batch *next;
203 unsigned int nr;
204 unsigned int max;
205 struct page *pages[0];
206};
207
208#define MAX_GATHER_BATCH \
209 ((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))
210
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211/*
212 * Limit the maximum number of mmu_gather batches to reduce a risk of soft
213 * lockups for non-preemptible kernels on huge machines when a lot of memory
214 * is zapped during unmapping.
215 * 10K pages freed at once should be safe even without a preemption point.
216 */
217#define MAX_GATHER_BATCH_COUNT (10000UL/MAX_GATHER_BATCH)
218
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219extern bool __tlb_remove_page_size(struct mmu_gather *tlb, struct page *page,
220 int page_size);
221#endif
222
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223/*
224 * struct mmu_gather is an opaque type used by the mm code for passing around
15a23ffa 225 * any data needed by arch specific code for tlb_remove_page.
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226 */
227struct mmu_gather {
228 struct mm_struct *mm;
dea2434c 229
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230#ifdef CONFIG_HAVE_RCU_TABLE_FREE
231 struct mmu_table_batch *batch;
232#endif
dea2434c 233
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234 unsigned long start;
235 unsigned long end;
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236 /*
237 * we are in the middle of an operation to clear
238 * a full mm and can make some optimizations
239 */
240 unsigned int fullmm : 1;
241
242 /*
243 * we have performed an operation which
244 * requires a complete flush of the tlb
245 */
246 unsigned int need_flush_all : 1;
247
248 /*
249 * we have removed page directories
250 */
251 unsigned int freed_tables : 1;
e303297e 252
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253 /*
254 * at which levels have we cleared entries?
255 */
256 unsigned int cleared_ptes : 1;
257 unsigned int cleared_pmds : 1;
258 unsigned int cleared_puds : 1;
259 unsigned int cleared_p4ds : 1;
260
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261 /*
262 * tracks VM_EXEC | VM_HUGETLB in tlb_start_vma
263 */
264 unsigned int vma_exec : 1;
265 unsigned int vma_huge : 1;
266
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267 unsigned int batch_count;
268
952a31c9 269#ifndef CONFIG_HAVE_MMU_GATHER_NO_GATHER
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270 struct mmu_gather_batch *active;
271 struct mmu_gather_batch local;
272 struct page *__pages[MMU_GATHER_BUNDLE];
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273
274#ifdef CONFIG_HAVE_MMU_GATHER_PAGE_SIZE
275 unsigned int page_size;
276#endif
952a31c9 277#endif
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278};
279
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280void arch_tlb_gather_mmu(struct mmu_gather *tlb,
281 struct mm_struct *mm, unsigned long start, unsigned long end);
9547d01b 282void tlb_flush_mmu(struct mmu_gather *tlb);
56236a59 283void arch_tlb_finish_mmu(struct mmu_gather *tlb,
99baac21 284 unsigned long start, unsigned long end, bool force);
1da177e4 285
fb7332a9 286static inline void __tlb_adjust_range(struct mmu_gather *tlb,
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287 unsigned long address,
288 unsigned int range_size)
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289{
290 tlb->start = min(tlb->start, address);
b5bc66b7 291 tlb->end = max(tlb->end, address + range_size);
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292}
293
294static inline void __tlb_reset_range(struct mmu_gather *tlb)
295{
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296 if (tlb->fullmm) {
297 tlb->start = tlb->end = ~0;
298 } else {
299 tlb->start = TASK_SIZE;
300 tlb->end = 0;
301 }
22a61c3c 302 tlb->freed_tables = 0;
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303 tlb->cleared_ptes = 0;
304 tlb->cleared_pmds = 0;
305 tlb->cleared_puds = 0;
306 tlb->cleared_p4ds = 0;
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307 /*
308 * Do not reset mmu_gather::vma_* fields here, we do not
309 * call into tlb_start_vma() again to set them if there is an
310 * intermediate flush.
311 */
312}
313
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314#ifdef CONFIG_MMU_GATHER_NO_RANGE
315
316#if defined(tlb_flush) || defined(tlb_start_vma) || defined(tlb_end_vma)
317#error MMU_GATHER_NO_RANGE relies on default tlb_flush(), tlb_start_vma() and tlb_end_vma()
318#endif
319
320/*
321 * When an architecture does not have efficient means of range flushing TLBs
322 * there is no point in doing intermediate flushes on tlb_end_vma() to keep the
323 * range small. We equally don't have to worry about page granularity or other
324 * things.
325 *
326 * All we need to do is issue a full flush for any !0 range.
327 */
328static inline void tlb_flush(struct mmu_gather *tlb)
329{
330 if (tlb->end)
331 flush_tlb_mm(tlb->mm);
332}
333
334static inline void
335tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) { }
336
337#define tlb_end_vma tlb_end_vma
338static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) { }
339
340#else /* CONFIG_MMU_GATHER_NO_RANGE */
341
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342#ifndef tlb_flush
343
344#if defined(tlb_start_vma) || defined(tlb_end_vma)
345#error Default tlb_flush() relies on default tlb_start_vma() and tlb_end_vma()
346#endif
347
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348/*
349 * When an architecture does not provide its own tlb_flush() implementation
350 * but does have a reasonably efficient flush_vma_range() implementation
351 * use that.
352 */
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353static inline void tlb_flush(struct mmu_gather *tlb)
354{
355 if (tlb->fullmm || tlb->need_flush_all) {
356 flush_tlb_mm(tlb->mm);
357 } else if (tlb->end) {
358 struct vm_area_struct vma = {
359 .vm_mm = tlb->mm,
360 .vm_flags = (tlb->vma_exec ? VM_EXEC : 0) |
361 (tlb->vma_huge ? VM_HUGETLB : 0),
362 };
363
364 flush_tlb_range(&vma, tlb->start, tlb->end);
365 }
366}
367
368static inline void
369tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma)
370{
371 /*
372 * flush_tlb_range() implementations that look at VM_HUGETLB (tile,
373 * mips-4k) flush only large pages.
374 *
375 * flush_tlb_range() implementations that flush I-TLB also flush D-TLB
376 * (tile, xtensa, arm), so it's ok to just add VM_EXEC to an existing
377 * range.
378 *
379 * We rely on tlb_end_vma() to issue a flush, such that when we reset
380 * these values the batch is empty.
381 */
382 tlb->vma_huge = !!(vma->vm_flags & VM_HUGETLB);
383 tlb->vma_exec = !!(vma->vm_flags & VM_EXEC);
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384}
385
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386#else
387
388static inline void
389tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) { }
390
391#endif
392
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393#endif /* CONFIG_MMU_GATHER_NO_RANGE */
394
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395static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
396{
397 if (!tlb->end)
398 return;
399
400 tlb_flush(tlb);
401 mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end);
402 __tlb_reset_range(tlb);
403}
404
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405static inline void tlb_remove_page_size(struct mmu_gather *tlb,
406 struct page *page, int page_size)
407{
692a68c1 408 if (__tlb_remove_page_size(tlb, page, page_size))
e77b0852 409 tlb_flush_mmu(tlb);
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410}
411
692a68c1 412static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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413{
414 return __tlb_remove_page_size(tlb, page, PAGE_SIZE);
415}
416
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417/* tlb_remove_page
418 * Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when
419 * required.
420 */
421static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
422{
e77b0852 423 return tlb_remove_page_size(tlb, page, PAGE_SIZE);
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424}
425
ed6a7935 426static inline void tlb_change_page_size(struct mmu_gather *tlb,
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427 unsigned int page_size)
428{
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429#ifdef CONFIG_HAVE_MMU_GATHER_PAGE_SIZE
430 if (tlb->page_size && tlb->page_size != page_size) {
431 if (!tlb->fullmm)
432 tlb_flush_mmu(tlb);
433 }
434
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435 tlb->page_size = page_size;
436#endif
437}
07e32661 438
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439static inline unsigned long tlb_get_unmap_shift(struct mmu_gather *tlb)
440{
441 if (tlb->cleared_ptes)
442 return PAGE_SHIFT;
443 if (tlb->cleared_pmds)
444 return PMD_SHIFT;
445 if (tlb->cleared_puds)
446 return PUD_SHIFT;
447 if (tlb->cleared_p4ds)
448 return P4D_SHIFT;
449
450 return PAGE_SHIFT;
451}
452
453static inline unsigned long tlb_get_unmap_size(struct mmu_gather *tlb)
454{
455 return 1UL << tlb_get_unmap_shift(tlb);
456}
457
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458/*
459 * In the case of tlb vma handling, we can optimise these away in the
460 * case where we're doing a full MM flush. When we're doing a munmap,
461 * the vmas are adjusted to only cover the region to be torn down.
462 */
463#ifndef tlb_start_vma
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464static inline void tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
465{
466 if (tlb->fullmm)
467 return;
468
469 tlb_update_vma_flags(tlb, vma);
470 flush_cache_range(vma, vma->vm_start, vma->vm_end);
471}
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472#endif
473
fb7332a9 474#ifndef tlb_end_vma
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475static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
476{
477 if (tlb->fullmm)
478 return;
479
480 /*
481 * Do a TLB flush and reset the range at VMA boundaries; this avoids
482 * the ranges growing with the unused space between consecutive VMAs,
483 * but also the mmu_gather::vma_* flags from tlb_start_vma() rely on
484 * this.
485 */
486 tlb_flush_mmu_tlbonly(tlb);
487}
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488#endif
489
490#ifndef __tlb_remove_tlb_entry
491#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
492#endif
493
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494/**
495 * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
496 *
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497 * Record the fact that pte's were really unmapped by updating the range,
498 * so we can later optimise away the tlb invalidate. This helps when
499 * userspace is unmapping already-unmapped pages, which happens quite a lot.
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500 */
501#define tlb_remove_tlb_entry(tlb, ptep, address) \
502 do { \
b5bc66b7 503 __tlb_adjust_range(tlb, address, PAGE_SIZE); \
a6d60245 504 tlb->cleared_ptes = 1; \
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505 __tlb_remove_tlb_entry(tlb, ptep, address); \
506 } while (0)
507
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508#define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \
509 do { \
510 unsigned long _sz = huge_page_size(h); \
511 __tlb_adjust_range(tlb, address, _sz); \
512 if (_sz == PMD_SIZE) \
513 tlb->cleared_pmds = 1; \
514 else if (_sz == PUD_SIZE) \
515 tlb->cleared_puds = 1; \
516 __tlb_remove_tlb_entry(tlb, ptep, address); \
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517 } while (0)
518
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519/**
520 * tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
521 * This is a nop so far, because only x86 needs it.
522 */
523#ifndef __tlb_remove_pmd_tlb_entry
524#define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0)
525#endif
526
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527#define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \
528 do { \
529 __tlb_adjust_range(tlb, address, HPAGE_PMD_SIZE); \
a6d60245 530 tlb->cleared_pmds = 1; \
b5bc66b7 531 __tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \
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532 } while (0)
533
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534/**
535 * tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb
536 * invalidation. This is a nop so far, because only x86 needs it.
537 */
538#ifndef __tlb_remove_pud_tlb_entry
539#define __tlb_remove_pud_tlb_entry(tlb, pudp, address) do {} while (0)
540#endif
541
542#define tlb_remove_pud_tlb_entry(tlb, pudp, address) \
543 do { \
544 __tlb_adjust_range(tlb, address, HPAGE_PUD_SIZE); \
a6d60245 545 tlb->cleared_puds = 1; \
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546 __tlb_remove_pud_tlb_entry(tlb, pudp, address); \
547 } while (0)
548
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549/*
550 * For things like page tables caches (ie caching addresses "inside" the
551 * page tables, like x86 does), for legacy reasons, flushing an
552 * individual page had better flush the page table caches behind it. This
553 * is definitely how x86 works, for example. And if you have an
554 * architected non-legacy page table cache (which I'm not aware of
555 * anybody actually doing), you're going to have some architecturally
556 * explicit flushing for that, likely *separate* from a regular TLB entry
557 * flush, and thus you'd need more than just some range expansion..
558 *
559 * So if we ever find an architecture
560 * that would want something that odd, I think it is up to that
561 * architecture to do its own odd thing, not cause pain for others
562 * http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com
563 *
564 * For now w.r.t page table cache, mark the range_size as PAGE_SIZE
565 */
566
a90744ba 567#ifndef pte_free_tlb
9e1b32ca 568#define pte_free_tlb(tlb, ptep, address) \
1da177e4 569 do { \
b5bc66b7 570 __tlb_adjust_range(tlb, address, PAGE_SIZE); \
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571 tlb->freed_tables = 1; \
572 tlb->cleared_pmds = 1; \
9e1b32ca 573 __pte_free_tlb(tlb, ptep, address); \
1da177e4 574 } while (0)
a90744ba 575#endif
1da177e4 576
a90744ba 577#ifndef pmd_free_tlb
048456dc
KS
578#define pmd_free_tlb(tlb, pmdp, address) \
579 do { \
22a61c3c 580 __tlb_adjust_range(tlb, address, PAGE_SIZE); \
a6d60245
WD
581 tlb->freed_tables = 1; \
582 tlb->cleared_puds = 1; \
048456dc
KS
583 __pmd_free_tlb(tlb, pmdp, address); \
584 } while (0)
a90744ba 585#endif
048456dc 586
1da177e4 587#ifndef __ARCH_HAS_4LEVEL_HACK
a90744ba 588#ifndef pud_free_tlb
9e1b32ca 589#define pud_free_tlb(tlb, pudp, address) \
1da177e4 590 do { \
b5bc66b7 591 __tlb_adjust_range(tlb, address, PAGE_SIZE); \
a6d60245
WD
592 tlb->freed_tables = 1; \
593 tlb->cleared_p4ds = 1; \
9e1b32ca 594 __pud_free_tlb(tlb, pudp, address); \
1da177e4
LT
595 } while (0)
596#endif
a90744ba 597#endif
1da177e4 598
048456dc 599#ifndef __ARCH_HAS_5LEVEL_HACK
a90744ba 600#ifndef p4d_free_tlb
048456dc 601#define p4d_free_tlb(tlb, pudp, address) \
1da177e4 602 do { \
22a61c3c 603 __tlb_adjust_range(tlb, address, PAGE_SIZE); \
a6d60245 604 tlb->freed_tables = 1; \
048456dc 605 __p4d_free_tlb(tlb, pudp, address); \
1da177e4 606 } while (0)
048456dc 607#endif
a90744ba 608#endif
1da177e4 609
faaadaf3
WD
610#endif /* CONFIG_MMU */
611
1da177e4 612#endif /* _ASM_GENERIC__TLB_H */