[mirror_ubuntu-bionic-kernel.git] / include / asm-generic / tlb.h

/* include/asm-generic/tlb.h
 *
 *	Generic TLB shootdown code
 *
 * Copyright 2001 Red Hat, Inc.
 * Based on code from mm/memory.c Copyright Linus Torvalds and others.
 *
 * Copyright 2011 Red Hat, Inc., Peter Zijlstra
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
#ifndef _ASM_GENERIC__TLB_H
#define _ASM_GENERIC__TLB_H

#include <linux/swap.h>
#include <asm/pgalloc.h>
#include <asm/tlbflush.h>

#ifdef CONFIG_HAVE_RCU_TABLE_FREE
/*
 * Semi RCU freeing of the page directories.
 *
 * This is needed by some architectures to implement software pagetable walkers.
 *
 * gup_fast() and other software pagetable walkers do a lockless page-table
 * walk and therefore needs some synchronization with the freeing of the page
 * directories. The chosen means to accomplish that is by disabling IRQs over
 * the walk.
 *
 * Architectures that use IPIs to flush TLBs will then automagically DTRT,
 * since we unlink the page, flush TLBs, free the page. Since the disabling of
 * IRQs delays the completion of the TLB flush we can never observe an already
 * freed page.
 *
 * Architectures that do not have this (PPC) need to delay the freeing by some
 * other means, this is that means.
 *
 * What we do is batch the freed directory pages (tables) and RCU free them.
 * We use the sched RCU variant, as that guarantees that IRQ/preempt disabling
 * holds off grace periods.
 *
 * However, in order to batch these pages we need to allocate storage, this
 * allocation is deep inside the MM code and can thus easily fail on memory
 * pressure. To guarantee progress we fall back to single table freeing, see
 * the implementation of tlb_remove_table_one().
 *
 */
struct mmu_table_batch {
	struct rcu_head		rcu;
	unsigned int		nr;
	void			*tables[0];
};

#define MAX_TABLE_BATCH		\
	((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))

extern void tlb_table_flush(struct mmu_gather *tlb);
extern void tlb_remove_table(struct mmu_gather *tlb, void *table);

#endif

/*
 * If we can't allocate a page to make a big batch of page pointers
 * to work on, then just handle a few from the on-stack structure.
 */
#define MMU_GATHER_BUNDLE	8

struct mmu_gather_batch {
	struct mmu_gather_batch	*next;
	unsigned int		nr;
	unsigned int		max;
	struct page		*pages[0];
};

#define MAX_GATHER_BATCH	\
	((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))

/*
 * Limit the maximum number of mmu_gather batches to reduce a risk of soft
 * lockups for non-preemptible kernels on huge machines when a lot of memory
 * is zapped during unmapping.
 * 10K pages freed at once should be safe even without a preemption point.
 */
#define MAX_GATHER_BATCH_COUNT	(10000UL/MAX_GATHER_BATCH)

/* struct mmu_gather is an opaque type used by the mm code for passing around
 * any data needed by arch specific code for tlb_remove_page.
 */
struct mmu_gather {
	struct mm_struct	*mm;
#ifdef CONFIG_HAVE_RCU_TABLE_FREE
	struct mmu_table_batch	*batch;
#endif
	unsigned long		start;
	unsigned long		end;
	/* we are in the middle of an operation to clear
	 * a full mm and can make some optimizations */
	unsigned int		fullmm : 1,
	/* we have performed an operation which
	 * requires a complete flush of the tlb */
				need_flush_all : 1;

	struct mmu_gather_batch *active;
	struct mmu_gather_batch	local;
	struct page		*__pages[MMU_GATHER_BUNDLE];
	unsigned int		batch_count;
	/*
	 * __tlb_adjust_range  will track the new addr here,
	 * that that we can adjust the range after the flush
	 */
	unsigned long addr;
	int page_size;
};

#define HAVE_GENERIC_MMU_GATHER

void tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end);
void tlb_flush_mmu(struct mmu_gather *tlb);
void tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start,
							unsigned long end);
extern bool __tlb_remove_page_size(struct mmu_gather *tlb, struct page *page,
				   int page_size);

static inline void __tlb_adjust_range(struct mmu_gather *tlb,
				      unsigned long address,
				      unsigned int range_size)
{
	tlb->start = min(tlb->start, address);
	tlb->end = max(tlb->end, address + range_size);
	/*
	 * Track the last address with which we adjusted the range. This
	 * will be used later to adjust again after a mmu_flush due to
	 * failed __tlb_remove_page
	 */
	tlb->addr = address;
}

static inline void __tlb_reset_range(struct mmu_gather *tlb)
{
	if (tlb->fullmm) {
		tlb->start = tlb->end = ~0;
	} else {
		tlb->start = TASK_SIZE;
		tlb->end = 0;
	}
}

static inline void tlb_remove_page_size(struct mmu_gather *tlb,
					struct page *page, int page_size)
{
	if (__tlb_remove_page_size(tlb, page, page_size)) {
		tlb_flush_mmu(tlb);
		tlb->page_size = page_size;
		__tlb_adjust_range(tlb, tlb->addr, page_size);
		__tlb_remove_page_size(tlb, page, page_size);
	}
}

static bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
{
	return __tlb_remove_page_size(tlb, page, PAGE_SIZE);
}

/* tlb_remove_page
 *	Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when
 *	required.
 */
static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
{
	return tlb_remove_page_size(tlb, page, PAGE_SIZE);
}

static inline bool __tlb_remove_pte_page(struct mmu_gather *tlb, struct page *page)
{
	/* active->nr should be zero when we call this */
	VM_BUG_ON_PAGE(tlb->active->nr, page);
	tlb->page_size = PAGE_SIZE;
	__tlb_adjust_range(tlb, tlb->addr, PAGE_SIZE);
	return __tlb_remove_page(tlb, page);
}

#ifndef tlb_remove_check_page_size_change
#define tlb_remove_check_page_size_change tlb_remove_check_page_size_change
static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
						     unsigned int page_size)
{
	/*
	 * We don't care about page size change, just update
	 * mmu_gather page size here so that debug checks
	 * doesn't throw false warning.
	 */
#ifdef CONFIG_DEBUG_VM
	tlb->page_size = page_size;
#endif
}
#endif

/*
 * In the case of tlb vma handling, we can optimise these away in the
 * case where we're doing a full MM flush.  When we're doing a munmap,
 * the vmas are adjusted to only cover the region to be torn down.
 */
#ifndef tlb_start_vma
#define tlb_start_vma(tlb, vma) do { } while (0)
#endif

#define __tlb_end_vma(tlb, vma)					\
	do {							\
		if (!tlb->fullmm && tlb->end) {			\
			tlb_flush(tlb);				\
			__tlb_reset_range(tlb);			\
		}						\
	} while (0)

#ifndef tlb_end_vma
#define tlb_end_vma	__tlb_end_vma
#endif

#ifndef __tlb_remove_tlb_entry
#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
#endif

/**
 * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
 *
 * Record the fact that pte's were really unmapped by updating the range,
 * so we can later optimise away the tlb invalidate.   This helps when
 * userspace is unmapping already-unmapped pages, which happens quite a lot.
 */
#define tlb_remove_tlb_entry(tlb, ptep, address)		\
	do {							\
		__tlb_adjust_range(tlb, address, PAGE_SIZE);	\
		__tlb_remove_tlb_entry(tlb, ptep, address);	\
	} while (0)

#define tlb_remove_huge_tlb_entry(h, tlb, ptep, address)	     \
	do {							     \
		__tlb_adjust_range(tlb, address, huge_page_size(h)); \
		__tlb_remove_tlb_entry(tlb, ptep, address);	     \
	} while (0)

/**
 * tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
 * This is a nop so far, because only x86 needs it.
 */
#ifndef __tlb_remove_pmd_tlb_entry
#define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0)
#endif

#define tlb_remove_pmd_tlb_entry(tlb, pmdp, address)			\
	do {								\
		__tlb_adjust_range(tlb, address, HPAGE_PMD_SIZE);	\
		__tlb_remove_pmd_tlb_entry(tlb, pmdp, address);		\
	} while (0)

/*
 * For things like page tables caches (ie caching addresses "inside" the
 * page tables, like x86 does), for legacy reasons, flushing an
 * individual page had better flush the page table caches behind it. This
 * is definitely how x86 works, for example. And if you have an
 * architected non-legacy page table cache (which I'm not aware of
 * anybody actually doing), you're going to have some architecturally
 * explicit flushing for that, likely *separate* from a regular TLB entry
 * flush, and thus you'd need more than just some range expansion..
 *
 * So if we ever find an architecture
 * that would want something that odd, I think it is up to that
 * architecture to do its own odd thing, not cause pain for others
 * http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com
 *
 * For now w.r.t page table cache, mark the range_size as PAGE_SIZE
 */

#define pte_free_tlb(tlb, ptep, address)			\
	do {							\
		__tlb_adjust_range(tlb, address, PAGE_SIZE);	\
		__pte_free_tlb(tlb, ptep, address);		\
	} while (0)

#ifndef __ARCH_HAS_4LEVEL_HACK
#define pud_free_tlb(tlb, pudp, address)			\
	do {							\
		__tlb_adjust_range(tlb, address, PAGE_SIZE);	\
		__pud_free_tlb(tlb, pudp, address);		\
	} while (0)
#endif

#define pmd_free_tlb(tlb, pmdp, address)			\
	do {							\
		__tlb_adjust_range(tlb, address, PAGE_SIZE);	\
		__pmd_free_tlb(tlb, pmdp, address);		\
	} while (0)

#define tlb_migrate_finish(mm) do {} while (0)

#endif /* _ASM_GENERIC__TLB_H */
Commit	Line	Data
f30c2269	1	/* include/asm-generic/tlb.h
1da177e4 LT	2	*
	3	* Generic TLB shootdown code
	4	*
	5	* Copyright 2001 Red Hat, Inc.
	6	* Based on code from mm/memory.c Copyright Linus Torvalds and others.
	7	*
90eec103	8	* Copyright 2011 Red Hat, Inc., Peter Zijlstra
d16dfc55	9	*
1da177e4 LT	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License
	12	* as published by the Free Software Foundation; either version
	13	* 2 of the License, or (at your option) any later version.
	14	*/
	15	#ifndef _ASM_GENERIC__TLB_H
	16	#define _ASM_GENERIC__TLB_H
	17
1da177e4	18	#include <linux/swap.h>
62152d0e	19	#include <asm/pgalloc.h>
1da177e4 LT	20	#include <asm/tlbflush.h>
1da177e4 LT	21
26723911 PZ	22	#ifdef CONFIG_HAVE_RCU_TABLE_FREE
	23	/*
	24	* Semi RCU freeing of the page directories.
	25	*
	26	* This is needed by some architectures to implement software pagetable walkers.
	27	*
	28	* gup_fast() and other software pagetable walkers do a lockless page-table
	29	* walk and therefore needs some synchronization with the freeing of the page
	30	* directories. The chosen means to accomplish that is by disabling IRQs over
	31	* the walk.
	32	*
	33	* Architectures that use IPIs to flush TLBs will then automagically DTRT,
	34	* since we unlink the page, flush TLBs, free the page. Since the disabling of
	35	* IRQs delays the completion of the TLB flush we can never observe an already
	36	* freed page.
	37	*
	38	* Architectures that do not have this (PPC) need to delay the freeing by some
	39	* other means, this is that means.
	40	*
	41	* What we do is batch the freed directory pages (tables) and RCU free them.
	42	* We use the sched RCU variant, as that guarantees that IRQ/preempt disabling
	43	* holds off grace periods.
	44	*
	45	* However, in order to batch these pages we need to allocate storage, this
	46	* allocation is deep inside the MM code and can thus easily fail on memory
	47	* pressure. To guarantee progress we fall back to single table freeing, see
	48	* the implementation of tlb_remove_table_one().
	49	*
	50	*/
	51	struct mmu_table_batch {
	52	struct rcu_head rcu;
	53	unsigned int nr;
	54	void *tables[0];
	55	};
	56
	57	#define MAX_TABLE_BATCH \
	58	((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
	59
	60	extern void tlb_table_flush(struct mmu_gather *tlb);
	61	extern void tlb_remove_table(struct mmu_gather tlb, void table);
	62
	63	#endif
	64
d16dfc55 PZ	65	/*
	66	* If we can't allocate a page to make a big batch of page pointers
	67	* to work on, then just handle a few from the on-stack structure.
	68	*/
	69	#define MMU_GATHER_BUNDLE 8
	70
e303297e PZ	71	struct mmu_gather_batch {
	72	struct mmu_gather_batch *next;
	73	unsigned int nr;
	74	unsigned int max;
	75	struct page *pages[0];
	76	};
	77
	78	#define MAX_GATHER_BATCH \
	79	((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))
	80
53a59fc6 MH	81	/*
	82	* Limit the maximum number of mmu_gather batches to reduce a risk of soft
	83	* lockups for non-preemptible kernels on huge machines when a lot of memory
	84	* is zapped during unmapping.
	85	* 10K pages freed at once should be safe even without a preemption point.
	86	*/
	87	#define MAX_GATHER_BATCH_COUNT (10000UL/MAX_GATHER_BATCH)
	88
1da177e4	89	/* struct mmu_gather is an opaque type used by the mm code for passing around
15a23ffa	90	* any data needed by arch specific code for tlb_remove_page.
1da177e4 LT	91	*/
	92	struct mmu_gather {
	93	struct mm_struct *mm;
26723911 PZ	94	#ifdef CONFIG_HAVE_RCU_TABLE_FREE
	95	struct mmu_table_batch *batch;
	96	#endif
597e1c35 AS	97	unsigned long start;
597e1c35 AS	98	unsigned long end;
1de14c3c DH	99	/* we are in the middle of an operation to clear
1de14c3c DH	100	* a full mm and can make some optimizations */
fb7332a9	101	unsigned int fullmm : 1,
1de14c3c DH	102	/* we have performed an operation which
	103	* requires a complete flush of the tlb */
	104	need_flush_all : 1;
e303297e PZ	105
	106	struct mmu_gather_batch *active;
	107	struct mmu_gather_batch local;
	108	struct page *__pages[MMU_GATHER_BUNDLE];
53a59fc6	109	unsigned int batch_count;
e9d55e15 AK	110	/*
	111	* __tlb_adjust_range will track the new addr here,
	112	* that that we can adjust the range after the flush
	113	*/
	114	unsigned long addr;
e77b0852	115	int page_size;
1da177e4 LT	116	};
1da177e4 LT	117
9547d01b	118	#define HAVE_GENERIC_MMU_GATHER
e303297e	119
2b047252	120	void tlb_gather_mmu(struct mmu_gather tlb, struct mm_struct mm, unsigned long start, unsigned long end);
9547d01b	121	void tlb_flush_mmu(struct mmu_gather *tlb);
c4211f42 AS	122	void tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start,
c4211f42 AS	123	unsigned long end);
e77b0852 AK	124	extern bool __tlb_remove_page_size(struct mmu_gather tlb, struct page page,
e77b0852 AK	125	int page_size);
1da177e4	126
fb7332a9	127	static inline void __tlb_adjust_range(struct mmu_gather *tlb,
b5bc66b7 AK	128	unsigned long address,
b5bc66b7 AK	129	unsigned int range_size)
fb7332a9 WD	130	{
fb7332a9 WD	131	tlb->start = min(tlb->start, address);
b5bc66b7	132	tlb->end = max(tlb->end, address + range_size);
e9d55e15 AK	133	/*
	134	* Track the last address with which we adjusted the range. This
	135	* will be used later to adjust again after a mmu_flush due to
	136	* failed __tlb_remove_page
	137	*/
	138	tlb->addr = address;
fb7332a9 WD	139	}
	140
	141	static inline void __tlb_reset_range(struct mmu_gather *tlb)
	142	{
721c21c1 WD	143	if (tlb->fullmm) {
	144	tlb->start = tlb->end = ~0;
	145	} else {
	146	tlb->start = TASK_SIZE;
	147	tlb->end = 0;
	148	}
fb7332a9 WD	149	}
fb7332a9 WD	150
e77b0852 AK	151	static inline void tlb_remove_page_size(struct mmu_gather *tlb,
	152	struct page *page, int page_size)
	153	{
	154	if (__tlb_remove_page_size(tlb, page, page_size)) {
	155	tlb_flush_mmu(tlb);
	156	tlb->page_size = page_size;
b5bc66b7	157	__tlb_adjust_range(tlb, tlb->addr, page_size);
e77b0852 AK	158	__tlb_remove_page_size(tlb, page, page_size);
	159	}
	160	}
	161
	162	static bool __tlb_remove_page(struct mmu_gather tlb, struct page page)
	163	{
	164	return __tlb_remove_page_size(tlb, page, PAGE_SIZE);
	165	}
	166
e9d55e15 AK	167	/* tlb_remove_page
	168	* Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when
	169	* required.
	170	*/
	171	static inline void tlb_remove_page(struct mmu_gather tlb, struct page page)
	172	{
e77b0852	173	return tlb_remove_page_size(tlb, page, PAGE_SIZE);
e9d55e15 AK	174	}
	175
	176	static inline bool __tlb_remove_pte_page(struct mmu_gather tlb, struct page page)
	177	{
	178	/* active->nr should be zero when we call this */
	179	VM_BUG_ON_PAGE(tlb->active->nr, page);
e77b0852	180	tlb->page_size = PAGE_SIZE;
b5bc66b7	181	__tlb_adjust_range(tlb, tlb->addr, PAGE_SIZE);
e9d55e15 AK	182	return __tlb_remove_page(tlb, page);
	183	}
	184
07e32661 AK	185	#ifndef tlb_remove_check_page_size_change
	186	#define tlb_remove_check_page_size_change tlb_remove_check_page_size_change
	187	static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
	188	unsigned int page_size)
	189	{
	190	/*
	191	* We don't care about page size change, just update
	192	* mmu_gather page size here so that debug checks
	193	* doesn't throw false warning.
	194	*/
	195	#ifdef CONFIG_DEBUG_VM
	196	tlb->page_size = page_size;
	197	#endif
	198	}
	199	#endif
	200
fb7332a9 WD	201	/*
	202	* In the case of tlb vma handling, we can optimise these away in the
	203	* case where we're doing a full MM flush. When we're doing a munmap,
	204	* the vmas are adjusted to only cover the region to be torn down.
	205	*/
	206	#ifndef tlb_start_vma
	207	#define tlb_start_vma(tlb, vma) do { } while (0)
	208	#endif
	209
	210	#define __tlb_end_vma(tlb, vma) \
	211	do { \
	212	if (!tlb->fullmm && tlb->end) { \
	213	tlb_flush(tlb); \
	214	__tlb_reset_range(tlb); \
	215	} \
	216	} while (0)
	217
	218	#ifndef tlb_end_vma
	219	#define tlb_end_vma __tlb_end_vma
	220	#endif
	221
	222	#ifndef __tlb_remove_tlb_entry
	223	#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
	224	#endif
	225
1da177e4 LT	226	/**
	227	* tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
	228	*
fb7332a9 WD	229	* Record the fact that pte's were really unmapped by updating the range,
	230	* so we can later optimise away the tlb invalidate. This helps when
	231	* userspace is unmapping already-unmapped pages, which happens quite a lot.
1da177e4 LT	232	*/
	233	#define tlb_remove_tlb_entry(tlb, ptep, address) \
	234	do { \
b5bc66b7	235	__tlb_adjust_range(tlb, address, PAGE_SIZE); \
1da177e4 LT	236	__tlb_remove_tlb_entry(tlb, ptep, address); \
	237	} while (0)
	238
b528e4b6 AK	239	#define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \
	240	do { \
	241	__tlb_adjust_range(tlb, address, huge_page_size(h)); \
	242	__tlb_remove_tlb_entry(tlb, ptep, address); \
	243	} while (0)
	244
f21760b1 SL	245	/**
	246	* tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
	247	* This is a nop so far, because only x86 needs it.
	248	*/
	249	#ifndef __tlb_remove_pmd_tlb_entry
	250	#define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0)
	251	#endif
	252
b5bc66b7 AK	253	#define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \
	254	do { \
	255	__tlb_adjust_range(tlb, address, HPAGE_PMD_SIZE); \
	256	__tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \
f21760b1 SL	257	} while (0)
f21760b1 SL	258
b5bc66b7 AK	259	/*
	260	* For things like page tables caches (ie caching addresses "inside" the
	261	* page tables, like x86 does), for legacy reasons, flushing an
	262	* individual page had better flush the page table caches behind it. This
	263	* is definitely how x86 works, for example. And if you have an
	264	* architected non-legacy page table cache (which I'm not aware of
	265	* anybody actually doing), you're going to have some architecturally
	266	* explicit flushing for that, likely separate from a regular TLB entry
	267	* flush, and thus you'd need more than just some range expansion..
	268	*
	269	* So if we ever find an architecture
	270	* that would want something that odd, I think it is up to that
	271	* architecture to do its own odd thing, not cause pain for others
	272	* http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com
	273	*
	274	* For now w.r.t page table cache, mark the range_size as PAGE_SIZE
	275	*/
	276
9e1b32ca	277	#define pte_free_tlb(tlb, ptep, address) \
1da177e4	278	do { \
b5bc66b7	279	__tlb_adjust_range(tlb, address, PAGE_SIZE); \
9e1b32ca	280	__pte_free_tlb(tlb, ptep, address); \
1da177e4 LT	281	} while (0)
	282
	283	#ifndef __ARCH_HAS_4LEVEL_HACK
9e1b32ca	284	#define pud_free_tlb(tlb, pudp, address) \
1da177e4	285	do { \
b5bc66b7	286	__tlb_adjust_range(tlb, address, PAGE_SIZE); \
9e1b32ca	287	__pud_free_tlb(tlb, pudp, address); \
1da177e4 LT	288	} while (0)
	289	#endif
	290
9e1b32ca	291	#define pmd_free_tlb(tlb, pmdp, address) \
1da177e4	292	do { \
b5bc66b7	293	__tlb_adjust_range(tlb, address, PAGE_SIZE); \
9e1b32ca	294	__pmd_free_tlb(tlb, pmdp, address); \
1da177e4 LT	295	} while (0)
	296
	297	#define tlb_migrate_finish(mm) do {} while (0)
	298
	299	#endif /* _ASM_GENERIC__TLB_H */