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[PATCH] i386: PARAVIRT: Use enums for paravirt lazy flush modi
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1#ifndef __ASM_PARAVIRT_H
2#define __ASM_PARAVIRT_H
3/* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
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5
6#ifdef CONFIG_PARAVIRT
da181a8b 7#include <asm/page.h>
d3561b7f 8
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9/* Bitmask of what can be clobbered: usually at least eax. */
10#define CLBR_NONE 0x0
11#define CLBR_EAX 0x1
12#define CLBR_ECX 0x2
13#define CLBR_EDX 0x4
14#define CLBR_ANY 0x7
15
d3561b7f 16#ifndef __ASSEMBLY__
3dc494e8 17#include <linux/types.h>
d4c10477 18#include <linux/cpumask.h>
ce6234b5 19#include <asm/kmap_types.h>
3dc494e8 20
ce6234b5 21struct page;
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22struct thread_struct;
23struct Xgt_desc_struct;
24struct tss_struct;
da181a8b 25struct mm_struct;
90a0a06a 26struct desc_struct;
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27
28/* Lazy mode for batching updates / context switch */
29enum paravirt_lazy_mode {
30 PARAVIRT_LAZY_NONE = 0,
31 PARAVIRT_LAZY_MMU = 1,
32 PARAVIRT_LAZY_CPU = 2,
4e0fa856 33 PARAVIRT_LAZY_FLUSH = 3,
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34};
35
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36struct paravirt_ops
37{
38 unsigned int kernel_rpl;
5311ab62 39 int shared_kernel_pmd;
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40 int paravirt_enabled;
41 const char *name;
42
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43 /*
44 * Patch may replace one of the defined code sequences with arbitrary
45 * code, subject to the same register constraints. This generally
46 * means the code is not free to clobber any registers other than EAX.
47 * The patch function should return the number of bytes of code
48 * generated, as we nop pad the rest in generic code.
49 */
50 unsigned (*patch)(u8 type, u16 clobber, void *firstinsn, unsigned len);
51
294688c0 52 /* Basic arch-specific setup */
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53 void (*arch_setup)(void);
54 char *(*memory_setup)(void);
55 void (*init_IRQ)(void);
294688c0 56 void (*time_init)(void);
d3561b7f 57
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58 /*
59 * Called before/after init_mm pagetable setup. setup_start
60 * may reset %cr3, and may pre-install parts of the pagetable;
61 * pagetable setup is expected to preserve any existing
62 * mapping.
63 */
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64 void (*pagetable_setup_start)(pgd_t *pgd_base);
65 void (*pagetable_setup_done)(pgd_t *pgd_base);
66
294688c0 67 /* Print a banner to identify the environment */
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68 void (*banner)(void);
69
294688c0 70 /* Set and set time of day */
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71 unsigned long (*get_wallclock)(void);
72 int (*set_wallclock)(unsigned long);
d3561b7f 73
294688c0 74 /* cpuid emulation, mostly so that caps bits can be disabled */
1a1eecd1 75 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
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76 unsigned int *ecx, unsigned int *edx);
77
294688c0 78 /* hooks for various privileged instructions */
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79 unsigned long (*get_debugreg)(int regno);
80 void (*set_debugreg)(int regno, unsigned long value);
d3561b7f 81
1a1eecd1 82 void (*clts)(void);
d3561b7f 83
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84 unsigned long (*read_cr0)(void);
85 void (*write_cr0)(unsigned long);
d3561b7f 86
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87 unsigned long (*read_cr2)(void);
88 void (*write_cr2)(unsigned long);
d3561b7f 89
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90 unsigned long (*read_cr3)(void);
91 void (*write_cr3)(unsigned long);
d3561b7f 92
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93 unsigned long (*read_cr4_safe)(void);
94 unsigned long (*read_cr4)(void);
95 void (*write_cr4)(unsigned long);
d3561b7f 96
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97 /*
98 * Get/set interrupt state. save_fl and restore_fl are only
99 * expected to use X86_EFLAGS_IF; all other bits
100 * returned from save_fl are undefined, and may be ignored by
101 * restore_fl.
102 */
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103 unsigned long (*save_fl)(void);
104 void (*restore_fl)(unsigned long);
105 void (*irq_disable)(void);
106 void (*irq_enable)(void);
107 void (*safe_halt)(void);
108 void (*halt)(void);
294688c0 109
1a1eecd1 110 void (*wbinvd)(void);
d3561b7f 111
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112 /* MSR, PMC and TSR operations.
113 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
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114 u64 (*read_msr)(unsigned int msr, int *err);
115 int (*write_msr)(unsigned int msr, u64 val);
116
117 u64 (*read_tsc)(void);
118 u64 (*read_pmc)(void);
6cb9a835 119 u64 (*get_scheduled_cycles)(void);
1182d852 120 unsigned long (*get_cpu_khz)(void);
1a1eecd1 121
294688c0 122 /* Segment descriptor handling */
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123 void (*load_tr_desc)(void);
124 void (*load_gdt)(const struct Xgt_desc_struct *);
125 void (*load_idt)(const struct Xgt_desc_struct *);
126 void (*store_gdt)(struct Xgt_desc_struct *);
127 void (*store_idt)(struct Xgt_desc_struct *);
128 void (*set_ldt)(const void *desc, unsigned entries);
129 unsigned long (*store_tr)(void);
130 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
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131 void (*write_ldt_entry)(struct desc_struct *,
132 int entrynum, u32 low, u32 high);
133 void (*write_gdt_entry)(struct desc_struct *,
134 int entrynum, u32 low, u32 high);
135 void (*write_idt_entry)(struct desc_struct *,
136 int entrynum, u32 low, u32 high);
137 void (*load_esp0)(struct tss_struct *tss, struct thread_struct *t);
d3561b7f 138
1a1eecd1 139 void (*set_iopl_mask)(unsigned mask);
1a1eecd1 140 void (*io_delay)(void);
d3561b7f 141
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142 /*
143 * Hooks for intercepting the creation/use/destruction of an
144 * mm_struct.
145 */
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146 void (*activate_mm)(struct mm_struct *prev,
147 struct mm_struct *next);
148 void (*dup_mmap)(struct mm_struct *oldmm,
149 struct mm_struct *mm);
150 void (*exit_mmap)(struct mm_struct *mm);
151
13623d79 152#ifdef CONFIG_X86_LOCAL_APIC
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153 /*
154 * Direct APIC operations, principally for VMI. Ideally
155 * these shouldn't be in this interface.
156 */
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157 void (*apic_write)(unsigned long reg, unsigned long v);
158 void (*apic_write_atomic)(unsigned long reg, unsigned long v);
159 unsigned long (*apic_read)(unsigned long reg);
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160 void (*setup_boot_clock)(void);
161 void (*setup_secondary_clock)(void);
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162
163 void (*startup_ipi_hook)(int phys_apicid,
164 unsigned long start_eip,
165 unsigned long start_esp);
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166#endif
167
294688c0 168 /* TLB operations */
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169 void (*flush_tlb_user)(void);
170 void (*flush_tlb_kernel)(void);
f8822f42 171 void (*flush_tlb_single)(unsigned long addr);
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172 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
173 unsigned long va);
1a1eecd1 174
294688c0 175 /* Hooks for allocating/releasing pagetable pages */
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176 void (*alloc_pt)(u32 pfn);
177 void (*alloc_pd)(u32 pfn);
178 void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
179 void (*release_pt)(u32 pfn);
180 void (*release_pd)(u32 pfn);
181
294688c0 182 /* Pagetable manipulation functions */
1a1eecd1 183 void (*set_pte)(pte_t *ptep, pte_t pteval);
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184 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
185 pte_t *ptep, pte_t pteval);
1a1eecd1 186 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
3dc494e8 187 void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
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188 void (*pte_update_defer)(struct mm_struct *mm,
189 unsigned long addr, pte_t *ptep);
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190
191 pte_t (*ptep_get_and_clear)(pte_t *ptep);
192
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193#ifdef CONFIG_HIGHPTE
194 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
195#endif
196
da181a8b 197#ifdef CONFIG_X86_PAE
1a1eecd1 198 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
3dc494e8 199 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte);
1a1eecd1 200 void (*set_pud)(pud_t *pudp, pud_t pudval);
3dc494e8 201 void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
1a1eecd1 202 void (*pmd_clear)(pmd_t *pmdp);
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203
204 unsigned long long (*pte_val)(pte_t);
205 unsigned long long (*pmd_val)(pmd_t);
206 unsigned long long (*pgd_val)(pgd_t);
207
208 pte_t (*make_pte)(unsigned long long pte);
209 pmd_t (*make_pmd)(unsigned long long pmd);
210 pgd_t (*make_pgd)(unsigned long long pgd);
211#else
212 unsigned long (*pte_val)(pte_t);
213 unsigned long (*pgd_val)(pgd_t);
214
215 pte_t (*make_pte)(unsigned long pte);
216 pgd_t (*make_pgd)(unsigned long pgd);
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217#endif
218
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219 /* Set deferred update mode, used for batching operations. */
220 void (*set_lazy_mode)(enum paravirt_lazy_mode mode);
9226d125 221
d3561b7f 222 /* These two are jmp to, not actually called. */
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223 void (*irq_enable_sysexit)(void);
224 void (*iret)(void);
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225};
226
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227/* Mark a paravirt probe function. */
228#define paravirt_probe(fn) \
229 static asmlinkage void (*__paravirtprobe_##fn)(void) __attribute_used__ \
230 __attribute__((__section__(".paravirtprobe"))) = fn
231
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232extern struct paravirt_ops paravirt_ops;
233
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234#define PARAVIRT_PATCH(x) \
235 (offsetof(struct paravirt_ops, x) / sizeof(void *))
236
237#define paravirt_type(type) \
238 [paravirt_typenum] "i" (PARAVIRT_PATCH(type))
239#define paravirt_clobber(clobber) \
240 [paravirt_clobber] "i" (clobber)
241
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242/*
243 * Generate some code, and mark it as patchable by the
244 * apply_paravirt() alternate instruction patcher.
245 */
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246#define _paravirt_alt(insn_string, type, clobber) \
247 "771:\n\t" insn_string "\n" "772:\n" \
248 ".pushsection .parainstructions,\"a\"\n" \
249 " .long 771b\n" \
250 " .byte " type "\n" \
251 " .byte 772b-771b\n" \
252 " .short " clobber "\n" \
253 ".popsection\n"
254
294688c0 255/* Generate patchable code, with the default asm parameters. */
f8822f42 256#define paravirt_alt(insn_string) \
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257 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
258
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259unsigned paravirt_patch_nop(void);
260unsigned paravirt_patch_ignore(unsigned len);
261unsigned paravirt_patch_call(void *target, u16 tgt_clobbers,
262 void *site, u16 site_clobbers,
263 unsigned len);
264unsigned paravirt_patch_jmp(void *target, void *site, unsigned len);
265unsigned paravirt_patch_default(u8 type, u16 clobbers, void *site, unsigned len);
266
267unsigned paravirt_patch_insns(void *site, unsigned len,
268 const char *start, const char *end);
269
270
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271/*
272 * This generates an indirect call based on the operation type number.
273 * The type number, computed in PARAVIRT_PATCH, is derived from the
274 * offset into the paravirt_ops structure, and can therefore be freely
275 * converted back into a structure offset.
276 */
277#define PARAVIRT_CALL "call *(paravirt_ops+%c[paravirt_typenum]*4);"
278
279/*
280 * These macros are intended to wrap calls into a paravirt_ops
281 * operation, so that they can be later identified and patched at
282 * runtime.
283 *
284 * Normally, a call to a pv_op function is a simple indirect call:
285 * (paravirt_ops.operations)(args...).
286 *
287 * Unfortunately, this is a relatively slow operation for modern CPUs,
288 * because it cannot necessarily determine what the destination
289 * address is. In this case, the address is a runtime constant, so at
290 * the very least we can patch the call to e a simple direct call, or
291 * ideally, patch an inline implementation into the callsite. (Direct
292 * calls are essentially free, because the call and return addresses
293 * are completely predictable.)
294 *
295 * These macros rely on the standard gcc "regparm(3)" calling
296 * convention, in which the first three arguments are placed in %eax,
297 * %edx, %ecx (in that order), and the remaining arguments are placed
298 * on the stack. All caller-save registers (eax,edx,ecx) are expected
299 * to be modified (either clobbered or used for return values).
300 *
301 * The call instruction itself is marked by placing its start address
302 * and size into the .parainstructions section, so that
303 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
304 * appropriate patching under the control of the backend paravirt_ops
305 * implementation.
306 *
307 * Unfortunately there's no way to get gcc to generate the args setup
308 * for the call, and then allow the call itself to be generated by an
309 * inline asm. Because of this, we must do the complete arg setup and
310 * return value handling from within these macros. This is fairly
311 * cumbersome.
312 *
313 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
314 * It could be extended to more arguments, but there would be little
315 * to be gained from that. For each number of arguments, there are
316 * the two VCALL and CALL variants for void and non-void functions.
317 *
318 * When there is a return value, the invoker of the macro must specify
319 * the return type. The macro then uses sizeof() on that type to
320 * determine whether its a 32 or 64 bit value, and places the return
321 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
322 * 64-bit).
323 *
324 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
325 * in low,high order.
326 *
327 * Small structures are passed and returned in registers. The macro
328 * calling convention can't directly deal with this, so the wrapper
329 * functions must do this.
330 *
331 * These PVOP_* macros are only defined within this header. This
332 * means that all uses must be wrapped in inline functions. This also
333 * makes sure the incoming and outgoing types are always correct.
334 */
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335#define PVOP_CALL0(__rettype, __op) \
336 ({ \
337 __rettype __ret; \
338 if (sizeof(__rettype) > sizeof(unsigned long)) { \
339 unsigned long long __tmp; \
340 unsigned long __ecx; \
341 asm volatile(paravirt_alt(PARAVIRT_CALL) \
342 : "=A" (__tmp), "=c" (__ecx) \
343 : paravirt_type(__op), \
344 paravirt_clobber(CLBR_ANY) \
345 : "memory", "cc"); \
346 __ret = (__rettype)__tmp; \
347 } else { \
348 unsigned long __tmp, __edx, __ecx; \
349 asm volatile(paravirt_alt(PARAVIRT_CALL) \
350 : "=a" (__tmp), "=d" (__edx), \
351 "=c" (__ecx) \
352 : paravirt_type(__op), \
353 paravirt_clobber(CLBR_ANY) \
354 : "memory", "cc"); \
355 __ret = (__rettype)__tmp; \
356 } \
357 __ret; \
358 })
359#define PVOP_VCALL0(__op) \
360 ({ \
361 unsigned long __eax, __edx, __ecx; \
362 asm volatile(paravirt_alt(PARAVIRT_CALL) \
363 : "=a" (__eax), "=d" (__edx), "=c" (__ecx) \
364 : paravirt_type(__op), \
365 paravirt_clobber(CLBR_ANY) \
366 : "memory", "cc"); \
367 })
368
369#define PVOP_CALL1(__rettype, __op, arg1) \
370 ({ \
371 __rettype __ret; \
372 if (sizeof(__rettype) > sizeof(unsigned long)) { \
373 unsigned long long __tmp; \
374 unsigned long __ecx; \
375 asm volatile(paravirt_alt(PARAVIRT_CALL) \
376 : "=A" (__tmp), "=c" (__ecx) \
377 : "a" ((u32)(arg1)), \
378 paravirt_type(__op), \
379 paravirt_clobber(CLBR_ANY) \
380 : "memory", "cc"); \
381 __ret = (__rettype)__tmp; \
382 } else { \
383 unsigned long __tmp, __edx, __ecx; \
384 asm volatile(paravirt_alt(PARAVIRT_CALL) \
385 : "=a" (__tmp), "=d" (__edx), \
386 "=c" (__ecx) \
387 : "0" ((u32)(arg1)), \
388 paravirt_type(__op), \
389 paravirt_clobber(CLBR_ANY) \
390 : "memory", "cc"); \
391 __ret = (__rettype)__tmp; \
392 } \
393 __ret; \
394 })
395#define PVOP_VCALL1(__op, arg1) \
396 ({ \
397 unsigned long __eax, __edx, __ecx; \
398 asm volatile(paravirt_alt(PARAVIRT_CALL) \
399 : "=a" (__eax), "=d" (__edx), "=c" (__ecx) \
400 : "0" ((u32)(arg1)), \
401 paravirt_type(__op), \
402 paravirt_clobber(CLBR_ANY) \
403 : "memory", "cc"); \
404 })
405
406#define PVOP_CALL2(__rettype, __op, arg1, arg2) \
407 ({ \
408 __rettype __ret; \
409 if (sizeof(__rettype) > sizeof(unsigned long)) { \
410 unsigned long long __tmp; \
411 unsigned long __ecx; \
412 asm volatile(paravirt_alt(PARAVIRT_CALL) \
413 : "=A" (__tmp), "=c" (__ecx) \
414 : "a" ((u32)(arg1)), \
415 "d" ((u32)(arg2)), \
416 paravirt_type(__op), \
417 paravirt_clobber(CLBR_ANY) \
418 : "memory", "cc"); \
419 __ret = (__rettype)__tmp; \
420 } else { \
421 unsigned long __tmp, __edx, __ecx; \
422 asm volatile(paravirt_alt(PARAVIRT_CALL) \
423 : "=a" (__tmp), "=d" (__edx), \
424 "=c" (__ecx) \
425 : "0" ((u32)(arg1)), \
426 "1" ((u32)(arg2)), \
427 paravirt_type(__op), \
428 paravirt_clobber(CLBR_ANY) \
429 : "memory", "cc"); \
430 __ret = (__rettype)__tmp; \
431 } \
432 __ret; \
433 })
434#define PVOP_VCALL2(__op, arg1, arg2) \
435 ({ \
436 unsigned long __eax, __edx, __ecx; \
437 asm volatile(paravirt_alt(PARAVIRT_CALL) \
438 : "=a" (__eax), "=d" (__edx), "=c" (__ecx) \
439 : "0" ((u32)(arg1)), \
440 "1" ((u32)(arg2)), \
441 paravirt_type(__op), \
442 paravirt_clobber(CLBR_ANY) \
443 : "memory", "cc"); \
444 })
445
446#define PVOP_CALL3(__rettype, __op, arg1, arg2, arg3) \
447 ({ \
448 __rettype __ret; \
449 if (sizeof(__rettype) > sizeof(unsigned long)) { \
450 unsigned long long __tmp; \
451 unsigned long __ecx; \
452 asm volatile(paravirt_alt(PARAVIRT_CALL) \
453 : "=A" (__tmp), "=c" (__ecx) \
454 : "a" ((u32)(arg1)), \
455 "d" ((u32)(arg2)), \
456 "1" ((u32)(arg3)), \
457 paravirt_type(__op), \
458 paravirt_clobber(CLBR_ANY) \
459 : "memory", "cc"); \
460 __ret = (__rettype)__tmp; \
461 } else { \
462 unsigned long __tmp, __edx, __ecx; \
463 asm volatile(paravirt_alt(PARAVIRT_CALL) \
464 : "=a" (__tmp), "=d" (__edx), \
465 "=c" (__ecx) \
466 : "0" ((u32)(arg1)), \
467 "1" ((u32)(arg2)), \
468 "2" ((u32)(arg3)), \
469 paravirt_type(__op), \
470 paravirt_clobber(CLBR_ANY) \
471 : "memory", "cc"); \
472 __ret = (__rettype)__tmp; \
473 } \
474 __ret; \
475 })
476#define PVOP_VCALL3(__op, arg1, arg2, arg3) \
477 ({ \
478 unsigned long __eax, __edx, __ecx; \
479 asm volatile(paravirt_alt(PARAVIRT_CALL) \
480 : "=a" (__eax), "=d" (__edx), "=c" (__ecx) \
481 : "0" ((u32)(arg1)), \
482 "1" ((u32)(arg2)), \
483 "2" ((u32)(arg3)), \
484 paravirt_type(__op), \
485 paravirt_clobber(CLBR_ANY) \
486 : "memory", "cc"); \
487 })
488
489#define PVOP_CALL4(__rettype, __op, arg1, arg2, arg3, arg4) \
490 ({ \
491 __rettype __ret; \
492 if (sizeof(__rettype) > sizeof(unsigned long)) { \
493 unsigned long long __tmp; \
494 unsigned long __ecx; \
495 asm volatile("push %[_arg4]; " \
496 paravirt_alt(PARAVIRT_CALL) \
497 "lea 4(%%esp),%%esp" \
498 : "=A" (__tmp), "=c" (__ecx) \
499 : "a" ((u32)(arg1)), \
500 "d" ((u32)(arg2)), \
501 "1" ((u32)(arg3)), \
502 [_arg4] "mr" ((u32)(arg4)), \
503 paravirt_type(__op), \
504 paravirt_clobber(CLBR_ANY) \
505 : "memory", "cc",); \
506 __ret = (__rettype)__tmp; \
507 } else { \
508 unsigned long __tmp, __edx, __ecx; \
509 asm volatile("push %[_arg4]; " \
510 paravirt_alt(PARAVIRT_CALL) \
511 "lea 4(%%esp),%%esp" \
512 : "=a" (__tmp), "=d" (__edx), "=c" (__ecx) \
513 : "0" ((u32)(arg1)), \
514 "1" ((u32)(arg2)), \
515 "2" ((u32)(arg3)), \
516 [_arg4]"mr" ((u32)(arg4)), \
517 paravirt_type(__op), \
518 paravirt_clobber(CLBR_ANY) \
519 : "memory", "cc"); \
520 __ret = (__rettype)__tmp; \
521 } \
522 __ret; \
523 })
524#define PVOP_VCALL4(__op, arg1, arg2, arg3, arg4) \
525 ({ \
526 unsigned long __eax, __edx, __ecx; \
527 asm volatile("push %[_arg4]; " \
528 paravirt_alt(PARAVIRT_CALL) \
529 "lea 4(%%esp),%%esp" \
530 : "=a" (__eax), "=d" (__edx), "=c" (__ecx) \
531 : "0" ((u32)(arg1)), \
532 "1" ((u32)(arg2)), \
533 "2" ((u32)(arg3)), \
534 [_arg4]"mr" ((u32)(arg4)), \
535 paravirt_type(__op), \
536 paravirt_clobber(CLBR_ANY) \
537 : "memory", "cc"); \
538 })
539
540static inline int paravirt_enabled(void)
541{
542 return paravirt_ops.paravirt_enabled;
543}
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544
545static inline void load_esp0(struct tss_struct *tss,
546 struct thread_struct *thread)
547{
f8822f42 548 PVOP_VCALL2(load_esp0, tss, thread);
d3561b7f
RR
549}
550
551#define ARCH_SETUP paravirt_ops.arch_setup();
552static inline unsigned long get_wallclock(void)
553{
f8822f42 554 return PVOP_CALL0(unsigned long, get_wallclock);
d3561b7f
RR
555}
556
557static inline int set_wallclock(unsigned long nowtime)
558{
f8822f42 559 return PVOP_CALL1(int, set_wallclock, nowtime);
d3561b7f
RR
560}
561
e30fab3a 562static inline void (*choose_time_init(void))(void)
d3561b7f 563{
e30fab3a 564 return paravirt_ops.time_init;
d3561b7f
RR
565}
566
567/* The paravirtualized CPUID instruction. */
568static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
569 unsigned int *ecx, unsigned int *edx)
570{
f8822f42 571 PVOP_VCALL4(cpuid, eax, ebx, ecx, edx);
d3561b7f
RR
572}
573
574/*
575 * These special macros can be used to get or set a debugging register
576 */
f8822f42
JF
577static inline unsigned long paravirt_get_debugreg(int reg)
578{
579 return PVOP_CALL1(unsigned long, get_debugreg, reg);
580}
581#define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
582static inline void set_debugreg(unsigned long val, int reg)
583{
584 PVOP_VCALL2(set_debugreg, reg, val);
585}
d3561b7f 586
f8822f42
JF
587static inline void clts(void)
588{
589 PVOP_VCALL0(clts);
590}
d3561b7f 591
f8822f42
JF
592static inline unsigned long read_cr0(void)
593{
594 return PVOP_CALL0(unsigned long, read_cr0);
595}
d3561b7f 596
f8822f42
JF
597static inline void write_cr0(unsigned long x)
598{
599 PVOP_VCALL1(write_cr0, x);
600}
601
602static inline unsigned long read_cr2(void)
603{
604 return PVOP_CALL0(unsigned long, read_cr2);
605}
606
607static inline void write_cr2(unsigned long x)
608{
609 PVOP_VCALL1(write_cr2, x);
610}
611
612static inline unsigned long read_cr3(void)
613{
614 return PVOP_CALL0(unsigned long, read_cr3);
615}
d3561b7f 616
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617static inline void write_cr3(unsigned long x)
618{
619 PVOP_VCALL1(write_cr3, x);
620}
d3561b7f 621
f8822f42
JF
622static inline unsigned long read_cr4(void)
623{
624 return PVOP_CALL0(unsigned long, read_cr4);
625}
626static inline unsigned long read_cr4_safe(void)
627{
628 return PVOP_CALL0(unsigned long, read_cr4_safe);
629}
d3561b7f 630
f8822f42
JF
631static inline void write_cr4(unsigned long x)
632{
633 PVOP_VCALL1(write_cr4, x);
634}
3dc494e8 635
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636static inline void raw_safe_halt(void)
637{
f8822f42 638 PVOP_VCALL0(safe_halt);
d3561b7f
RR
639}
640
641static inline void halt(void)
642{
f8822f42
JF
643 PVOP_VCALL0(safe_halt);
644}
645
646static inline void wbinvd(void)
647{
648 PVOP_VCALL0(wbinvd);
d3561b7f 649}
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650
651#define get_kernel_rpl() (paravirt_ops.kernel_rpl)
652
f8822f42
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653static inline u64 paravirt_read_msr(unsigned msr, int *err)
654{
655 return PVOP_CALL2(u64, read_msr, msr, err);
656}
657static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
658{
659 return PVOP_CALL3(int, write_msr, msr, low, high);
660}
661
90a0a06a 662/* These should all do BUG_ON(_err), but our headers are too tangled. */
f8822f42
JF
663#define rdmsr(msr,val1,val2) do { \
664 int _err; \
665 u64 _l = paravirt_read_msr(msr, &_err); \
666 val1 = (u32)_l; \
667 val2 = _l >> 32; \
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RR
668} while(0)
669
f8822f42
JF
670#define wrmsr(msr,val1,val2) do { \
671 paravirt_write_msr(msr, val1, val2); \
d3561b7f
RR
672} while(0)
673
f8822f42
JF
674#define rdmsrl(msr,val) do { \
675 int _err; \
676 val = paravirt_read_msr(msr, &_err); \
d3561b7f
RR
677} while(0)
678
f8822f42
JF
679#define wrmsrl(msr,val) ((void)paravirt_write_msr(msr, val, 0))
680#define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b)
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RR
681
682/* rdmsr with exception handling */
f8822f42
JF
683#define rdmsr_safe(msr,a,b) ({ \
684 int _err; \
685 u64 _l = paravirt_read_msr(msr, &_err); \
686 (*a) = (u32)_l; \
687 (*b) = _l >> 32; \
d3561b7f
RR
688 _err; })
689
f8822f42
JF
690
691static inline u64 paravirt_read_tsc(void)
692{
693 return PVOP_CALL0(u64, read_tsc);
694}
695#define rdtsc(low,high) do { \
696 u64 _l = paravirt_read_tsc(); \
697 low = (u32)_l; \
698 high = _l >> 32; \
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RR
699} while(0)
700
f8822f42
JF
701#define rdtscl(low) do { \
702 u64 _l = paravirt_read_tsc(); \
703 low = (int)_l; \
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RR
704} while(0)
705
f8822f42 706#define rdtscll(val) (val = paravirt_read_tsc())
d3561b7f 707
6cb9a835 708#define get_scheduled_cycles(val) (val = paravirt_ops.get_scheduled_cycles())
1182d852 709#define calculate_cpu_khz() (paravirt_ops.get_cpu_khz())
6cb9a835 710
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711#define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
712
f8822f42
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713static inline unsigned long long paravirt_read_pmc(int counter)
714{
715 return PVOP_CALL1(u64, read_pmc, counter);
716}
d3561b7f 717
f8822f42
JF
718#define rdpmc(counter,low,high) do { \
719 u64 _l = paravirt_read_pmc(counter); \
720 low = (u32)_l; \
721 high = _l >> 32; \
722} while(0)
3dc494e8 723
f8822f42
JF
724static inline void load_TR_desc(void)
725{
726 PVOP_VCALL0(load_tr_desc);
727}
728static inline void load_gdt(const struct Xgt_desc_struct *dtr)
729{
730 PVOP_VCALL1(load_gdt, dtr);
731}
732static inline void load_idt(const struct Xgt_desc_struct *dtr)
733{
734 PVOP_VCALL1(load_idt, dtr);
735}
736static inline void set_ldt(const void *addr, unsigned entries)
737{
738 PVOP_VCALL2(set_ldt, addr, entries);
739}
740static inline void store_gdt(struct Xgt_desc_struct *dtr)
741{
742 PVOP_VCALL1(store_gdt, dtr);
743}
744static inline void store_idt(struct Xgt_desc_struct *dtr)
745{
746 PVOP_VCALL1(store_idt, dtr);
747}
748static inline unsigned long paravirt_store_tr(void)
749{
750 return PVOP_CALL0(unsigned long, store_tr);
751}
752#define store_tr(tr) ((tr) = paravirt_store_tr())
753static inline void load_TLS(struct thread_struct *t, unsigned cpu)
754{
755 PVOP_VCALL2(load_tls, t, cpu);
756}
757static inline void write_ldt_entry(void *dt, int entry, u32 low, u32 high)
758{
759 PVOP_VCALL4(write_ldt_entry, dt, entry, low, high);
760}
761static inline void write_gdt_entry(void *dt, int entry, u32 low, u32 high)
762{
763 PVOP_VCALL4(write_gdt_entry, dt, entry, low, high);
764}
765static inline void write_idt_entry(void *dt, int entry, u32 low, u32 high)
766{
767 PVOP_VCALL4(write_idt_entry, dt, entry, low, high);
768}
769static inline void set_iopl_mask(unsigned mask)
770{
771 PVOP_VCALL1(set_iopl_mask, mask);
772}
3dc494e8 773
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774/* The paravirtualized I/O functions */
775static inline void slow_down_io(void) {
776 paravirt_ops.io_delay();
777#ifdef REALLY_SLOW_IO
778 paravirt_ops.io_delay();
779 paravirt_ops.io_delay();
780 paravirt_ops.io_delay();
781#endif
782}
783
13623d79
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784#ifdef CONFIG_X86_LOCAL_APIC
785/*
786 * Basic functions accessing APICs.
787 */
788static inline void apic_write(unsigned long reg, unsigned long v)
789{
f8822f42 790 PVOP_VCALL2(apic_write, reg, v);
13623d79
RR
791}
792
793static inline void apic_write_atomic(unsigned long reg, unsigned long v)
794{
f8822f42 795 PVOP_VCALL2(apic_write_atomic, reg, v);
13623d79
RR
796}
797
798static inline unsigned long apic_read(unsigned long reg)
799{
f8822f42 800 return PVOP_CALL1(unsigned long, apic_read, reg);
13623d79 801}
bbab4f3b
ZA
802
803static inline void setup_boot_clock(void)
804{
f8822f42 805 PVOP_VCALL0(setup_boot_clock);
bbab4f3b
ZA
806}
807
808static inline void setup_secondary_clock(void)
809{
f8822f42 810 PVOP_VCALL0(setup_secondary_clock);
bbab4f3b 811}
13623d79
RR
812#endif
813
b239fb25
JF
814static inline void paravirt_pagetable_setup_start(pgd_t *base)
815{
816 if (paravirt_ops.pagetable_setup_start)
817 (*paravirt_ops.pagetable_setup_start)(base);
818}
819
820static inline void paravirt_pagetable_setup_done(pgd_t *base)
821{
822 if (paravirt_ops.pagetable_setup_done)
823 (*paravirt_ops.pagetable_setup_done)(base);
824}
3dc494e8 825
ae5da273
ZA
826#ifdef CONFIG_SMP
827static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
828 unsigned long start_esp)
829{
f8822f42 830 PVOP_VCALL3(startup_ipi_hook, phys_apicid, start_eip, start_esp);
ae5da273
ZA
831}
832#endif
13623d79 833
d6dd61c8
JF
834static inline void paravirt_activate_mm(struct mm_struct *prev,
835 struct mm_struct *next)
836{
f8822f42 837 PVOP_VCALL2(activate_mm, prev, next);
d6dd61c8
JF
838}
839
840static inline void arch_dup_mmap(struct mm_struct *oldmm,
841 struct mm_struct *mm)
842{
f8822f42 843 PVOP_VCALL2(dup_mmap, oldmm, mm);
d6dd61c8
JF
844}
845
846static inline void arch_exit_mmap(struct mm_struct *mm)
847{
f8822f42 848 PVOP_VCALL1(exit_mmap, mm);
d6dd61c8
JF
849}
850
f8822f42
JF
851static inline void __flush_tlb(void)
852{
853 PVOP_VCALL0(flush_tlb_user);
854}
855static inline void __flush_tlb_global(void)
856{
857 PVOP_VCALL0(flush_tlb_kernel);
858}
859static inline void __flush_tlb_single(unsigned long addr)
860{
861 PVOP_VCALL1(flush_tlb_single, addr);
862}
da181a8b 863
d4c10477
JF
864static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
865 unsigned long va)
866{
867 PVOP_VCALL3(flush_tlb_others, &cpumask, mm, va);
868}
869
f8822f42
JF
870static inline void paravirt_alloc_pt(unsigned pfn)
871{
872 PVOP_VCALL1(alloc_pt, pfn);
873}
874static inline void paravirt_release_pt(unsigned pfn)
875{
876 PVOP_VCALL1(release_pt, pfn);
877}
c119ecce 878
f8822f42
JF
879static inline void paravirt_alloc_pd(unsigned pfn)
880{
881 PVOP_VCALL1(alloc_pd, pfn);
882}
c119ecce 883
f8822f42
JF
884static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn,
885 unsigned start, unsigned count)
886{
887 PVOP_VCALL4(alloc_pd_clone, pfn, clonepfn, start, count);
888}
889static inline void paravirt_release_pd(unsigned pfn)
da181a8b 890{
f8822f42 891 PVOP_VCALL1(release_pd, pfn);
da181a8b
RR
892}
893
ce6234b5
JF
894#ifdef CONFIG_HIGHPTE
895static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
896{
897 unsigned long ret;
898 ret = PVOP_CALL2(unsigned long, kmap_atomic_pte, page, type);
899 return (void *)ret;
900}
901#endif
902
f8822f42
JF
903static inline void pte_update(struct mm_struct *mm, unsigned long addr,
904 pte_t *ptep)
da181a8b 905{
f8822f42 906 PVOP_VCALL3(pte_update, mm, addr, ptep);
da181a8b
RR
907}
908
f8822f42
JF
909static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
910 pte_t *ptep)
da181a8b 911{
f8822f42 912 PVOP_VCALL3(pte_update_defer, mm, addr, ptep);
da181a8b
RR
913}
914
f8822f42
JF
915#ifdef CONFIG_X86_PAE
916static inline pte_t __pte(unsigned long long val)
da181a8b 917{
f8822f42
JF
918 unsigned long long ret = PVOP_CALL2(unsigned long long, make_pte,
919 val, val >> 32);
920 return (pte_t) { ret, ret >> 32 };
da181a8b
RR
921}
922
f8822f42 923static inline pmd_t __pmd(unsigned long long val)
da181a8b 924{
f8822f42
JF
925 return (pmd_t) { PVOP_CALL2(unsigned long long, make_pmd, val, val >> 32) };
926}
927
928static inline pgd_t __pgd(unsigned long long val)
929{
930 return (pgd_t) { PVOP_CALL2(unsigned long long, make_pgd, val, val >> 32) };
931}
932
933static inline unsigned long long pte_val(pte_t x)
934{
935 return PVOP_CALL2(unsigned long long, pte_val, x.pte_low, x.pte_high);
936}
937
938static inline unsigned long long pmd_val(pmd_t x)
939{
940 return PVOP_CALL2(unsigned long long, pmd_val, x.pmd, x.pmd >> 32);
941}
942
943static inline unsigned long long pgd_val(pgd_t x)
944{
945 return PVOP_CALL2(unsigned long long, pgd_val, x.pgd, x.pgd >> 32);
946}
947
948static inline void set_pte(pte_t *ptep, pte_t pteval)
949{
950 PVOP_VCALL3(set_pte, ptep, pteval.pte_low, pteval.pte_high);
951}
952
953static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
954 pte_t *ptep, pte_t pteval)
955{
956 /* 5 arg words */
957 paravirt_ops.set_pte_at(mm, addr, ptep, pteval);
da181a8b
RR
958}
959
da181a8b
RR
960static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
961{
f8822f42 962 PVOP_VCALL3(set_pte_atomic, ptep, pteval.pte_low, pteval.pte_high);
da181a8b
RR
963}
964
f8822f42
JF
965static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
966 pte_t *ptep, pte_t pte)
da181a8b 967{
f8822f42 968 /* 5 arg words */
da181a8b
RR
969 paravirt_ops.set_pte_present(mm, addr, ptep, pte);
970}
971
f8822f42
JF
972static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
973{
974 PVOP_VCALL3(set_pmd, pmdp, pmdval.pmd, pmdval.pmd >> 32);
975}
976
da181a8b
RR
977static inline void set_pud(pud_t *pudp, pud_t pudval)
978{
f8822f42 979 PVOP_VCALL3(set_pud, pudp, pudval.pgd.pgd, pudval.pgd.pgd >> 32);
da181a8b
RR
980}
981
982static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
983{
f8822f42 984 PVOP_VCALL3(pte_clear, mm, addr, ptep);
da181a8b
RR
985}
986
987static inline void pmd_clear(pmd_t *pmdp)
988{
f8822f42
JF
989 PVOP_VCALL1(pmd_clear, pmdp);
990}
991
992static inline pte_t raw_ptep_get_and_clear(pte_t *p)
993{
994 unsigned long long val = PVOP_CALL1(unsigned long long, ptep_get_and_clear, p);
995 return (pte_t) { val, val >> 32 };
996}
997#else /* !CONFIG_X86_PAE */
998static inline pte_t __pte(unsigned long val)
999{
1000 return (pte_t) { PVOP_CALL1(unsigned long, make_pte, val) };
da181a8b 1001}
f8822f42
JF
1002
1003static inline pgd_t __pgd(unsigned long val)
1004{
1005 return (pgd_t) { PVOP_CALL1(unsigned long, make_pgd, val) };
1006}
1007
1008static inline unsigned long pte_val(pte_t x)
1009{
1010 return PVOP_CALL1(unsigned long, pte_val, x.pte_low);
1011}
1012
1013static inline unsigned long pgd_val(pgd_t x)
1014{
1015 return PVOP_CALL1(unsigned long, pgd_val, x.pgd);
1016}
1017
1018static inline void set_pte(pte_t *ptep, pte_t pteval)
1019{
1020 PVOP_VCALL2(set_pte, ptep, pteval.pte_low);
1021}
1022
1023static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1024 pte_t *ptep, pte_t pteval)
1025{
1026 PVOP_VCALL4(set_pte_at, mm, addr, ptep, pteval.pte_low);
1027}
1028
1029static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
1030{
1031 PVOP_VCALL2(set_pmd, pmdp, pmdval.pud.pgd.pgd);
1032}
1033
1034static inline pte_t raw_ptep_get_and_clear(pte_t *p)
1035{
1036 return (pte_t) { PVOP_CALL1(unsigned long, ptep_get_and_clear, p) };
1037}
1038#endif /* CONFIG_X86_PAE */
da181a8b 1039
9226d125 1040#define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
f8822f42
JF
1041static inline void arch_enter_lazy_cpu_mode(void)
1042{
1043 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_CPU);
1044}
1045
1046static inline void arch_leave_lazy_cpu_mode(void)
1047{
1048 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE);
1049}
1050
1051static inline void arch_flush_lazy_cpu_mode(void)
1052{
1053 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH);
1054}
1055
9226d125
ZA
1056
1057#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
f8822f42
JF
1058static inline void arch_enter_lazy_mmu_mode(void)
1059{
1060 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_MMU);
1061}
1062
1063static inline void arch_leave_lazy_mmu_mode(void)
1064{
1065 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE);
1066}
1067
1068static inline void arch_flush_lazy_mmu_mode(void)
1069{
1070 PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH);
1071}
9226d125 1072
45876233
JF
1073void _paravirt_nop(void);
1074#define paravirt_nop ((void *)_paravirt_nop)
1075
139ec7c4 1076/* These all sit in the .parainstructions section to tell us what to patch. */
98de032b 1077struct paravirt_patch_site {
139ec7c4
RR
1078 u8 *instr; /* original instructions */
1079 u8 instrtype; /* type of this instruction */
1080 u8 len; /* length of original instruction */
1081 u16 clobbers; /* what registers you may clobber */
1082};
1083
98de032b
JF
1084extern struct paravirt_patch_site __parainstructions[],
1085 __parainstructions_end[];
1086
139ec7c4
RR
1087static inline unsigned long __raw_local_save_flags(void)
1088{
1089 unsigned long f;
1090
d5822035
JF
1091 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1092 PARAVIRT_CALL
1093 "popl %%edx; popl %%ecx")
1094 : "=a"(f)
1095 : paravirt_type(save_fl),
42c24fa2 1096 paravirt_clobber(CLBR_EAX)
d5822035 1097 : "memory", "cc");
139ec7c4
RR
1098 return f;
1099}
1100
1101static inline void raw_local_irq_restore(unsigned long f)
1102{
d5822035
JF
1103 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1104 PARAVIRT_CALL
1105 "popl %%edx; popl %%ecx")
1106 : "=a"(f)
1107 : "0"(f),
1108 paravirt_type(restore_fl),
1109 paravirt_clobber(CLBR_EAX)
1110 : "memory", "cc");
139ec7c4
RR
1111}
1112
1113static inline void raw_local_irq_disable(void)
1114{
d5822035
JF
1115 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1116 PARAVIRT_CALL
1117 "popl %%edx; popl %%ecx")
1118 :
1119 : paravirt_type(irq_disable),
1120 paravirt_clobber(CLBR_EAX)
1121 : "memory", "eax", "cc");
139ec7c4
RR
1122}
1123
1124static inline void raw_local_irq_enable(void)
1125{
d5822035
JF
1126 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1127 PARAVIRT_CALL
1128 "popl %%edx; popl %%ecx")
1129 :
1130 : paravirt_type(irq_enable),
1131 paravirt_clobber(CLBR_EAX)
1132 : "memory", "eax", "cc");
139ec7c4
RR
1133}
1134
1135static inline unsigned long __raw_local_irq_save(void)
1136{
1137 unsigned long f;
1138
d5822035
JF
1139 f = __raw_local_save_flags();
1140 raw_local_irq_disable();
139ec7c4
RR
1141 return f;
1142}
1143
d5822035
JF
1144#define CLI_STRING \
1145 _paravirt_alt("pushl %%ecx; pushl %%edx;" \
1146 "call *paravirt_ops+%c[paravirt_cli_type]*4;" \
1147 "popl %%edx; popl %%ecx", \
1148 "%c[paravirt_cli_type]", "%c[paravirt_clobber]")
1149
1150#define STI_STRING \
1151 _paravirt_alt("pushl %%ecx; pushl %%edx;" \
1152 "call *paravirt_ops+%c[paravirt_sti_type]*4;" \
1153 "popl %%edx; popl %%ecx", \
1154 "%c[paravirt_sti_type]", "%c[paravirt_clobber]")
139ec7c4 1155
139ec7c4 1156#define CLI_STI_CLOBBERS , "%eax"
d5822035 1157#define CLI_STI_INPUT_ARGS \
139ec7c4 1158 , \
d5822035
JF
1159 [paravirt_cli_type] "i" (PARAVIRT_PATCH(irq_disable)), \
1160 [paravirt_sti_type] "i" (PARAVIRT_PATCH(irq_enable)), \
1161 paravirt_clobber(CLBR_EAX)
1162
294688c0 1163/* Make sure as little as possible of this mess escapes. */
d5822035 1164#undef PARAVIRT_CALL
f8822f42
JF
1165#undef PVOP_VCALL0
1166#undef PVOP_CALL0
1167#undef PVOP_VCALL1
1168#undef PVOP_CALL1
1169#undef PVOP_VCALL2
1170#undef PVOP_CALL2
1171#undef PVOP_VCALL3
1172#undef PVOP_CALL3
1173#undef PVOP_VCALL4
1174#undef PVOP_CALL4
139ec7c4 1175
d3561b7f
RR
1176#else /* __ASSEMBLY__ */
1177
d5822035
JF
1178#define PARA_PATCH(off) ((off) / 4)
1179
1180#define PARA_SITE(ptype, clobbers, ops) \
139ec7c4
RR
1181771:; \
1182 ops; \
1183772:; \
1184 .pushsection .parainstructions,"a"; \
1185 .long 771b; \
1186 .byte ptype; \
1187 .byte 772b-771b; \
1188 .short clobbers; \
1189 .popsection
1190
d5822035 1191#define INTERRUPT_RETURN \
42c24fa2 1192 PARA_SITE(PARA_PATCH(PARAVIRT_iret), CLBR_NONE, \
d5822035
JF
1193 jmp *%cs:paravirt_ops+PARAVIRT_iret)
1194
1195#define DISABLE_INTERRUPTS(clobbers) \
1196 PARA_SITE(PARA_PATCH(PARAVIRT_irq_disable), clobbers, \
42c24fa2 1197 pushl %eax; pushl %ecx; pushl %edx; \
d5822035 1198 call *%cs:paravirt_ops+PARAVIRT_irq_disable; \
42c24fa2 1199 popl %edx; popl %ecx; popl %eax) \
d5822035
JF
1200
1201#define ENABLE_INTERRUPTS(clobbers) \
1202 PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable), clobbers, \
42c24fa2 1203 pushl %eax; pushl %ecx; pushl %edx; \
d5822035 1204 call *%cs:paravirt_ops+PARAVIRT_irq_enable; \
42c24fa2 1205 popl %edx; popl %ecx; popl %eax)
d5822035
JF
1206
1207#define ENABLE_INTERRUPTS_SYSEXIT \
42c24fa2 1208 PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable_sysexit), CLBR_NONE, \
d5822035 1209 jmp *%cs:paravirt_ops+PARAVIRT_irq_enable_sysexit)
139ec7c4
RR
1210
1211#define GET_CR0_INTO_EAX \
42c24fa2
JF
1212 push %ecx; push %edx; \
1213 call *paravirt_ops+PARAVIRT_read_cr0; \
1214 pop %edx; pop %ecx
139ec7c4 1215
d3561b7f
RR
1216#endif /* __ASSEMBLY__ */
1217#endif /* CONFIG_PARAVIRT */
1218#endif /* __ASM_PARAVIRT_H */