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1da177e4 LT |
1 | #ifndef __ASM_SMP_H |
2 | #define __ASM_SMP_H | |
3 | ||
4 | /* | |
5 | * We need the APIC definitions automatically as part of 'smp.h' | |
6 | */ | |
7 | #ifndef __ASSEMBLY__ | |
1da177e4 LT |
8 | #include <linux/kernel.h> |
9 | #include <linux/threads.h> | |
10 | #include <linux/cpumask.h> | |
11 | #endif | |
12 | ||
00f1ea69 | 13 | #if defined(CONFIG_X86_LOCAL_APIC) && !defined(__ASSEMBLY__) |
1da177e4 LT |
14 | #include <asm/bitops.h> |
15 | #include <asm/mpspec.h> | |
00f1ea69 | 16 | #include <asm/apic.h> |
1da177e4 LT |
17 | #ifdef CONFIG_X86_IO_APIC |
18 | #include <asm/io_apic.h> | |
19 | #endif | |
1da177e4 LT |
20 | #endif |
21 | ||
22 | #define BAD_APICID 0xFFu | |
23 | #ifdef CONFIG_SMP | |
24 | #ifndef __ASSEMBLY__ | |
25 | ||
26 | /* | |
27 | * Private routines/data | |
28 | */ | |
29 | ||
30 | extern void smp_alloc_memory(void); | |
31 | extern int pic_mode; | |
32 | extern int smp_num_siblings; | |
33 | extern cpumask_t cpu_sibling_map[]; | |
3dd9d514 | 34 | extern cpumask_t cpu_core_map[]; |
1da177e4 | 35 | |
1da177e4 LT |
36 | extern void (*mtrr_hook) (void); |
37 | extern void zap_low_mappings (void); | |
6fe940d6 LS |
38 | extern void lock_ipi_call_lock(void); |
39 | extern void unlock_ipi_call_lock(void); | |
1da177e4 LT |
40 | |
41 | #define MAX_APICID 256 | |
42 | extern u8 x86_cpu_to_apicid[]; | |
43 | ||
b4033c17 AR |
44 | #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu] |
45 | ||
e1367daf LS |
46 | #ifdef CONFIG_HOTPLUG_CPU |
47 | extern void cpu_exit_clear(void); | |
48 | extern void cpu_uninit(void); | |
e1367daf LS |
49 | #endif |
50 | ||
01a2f435 JF |
51 | struct smp_ops |
52 | { | |
53 | void (*smp_prepare_boot_cpu)(void); | |
54 | void (*smp_prepare_cpus)(unsigned max_cpus); | |
55 | int (*cpu_up)(unsigned cpu); | |
56 | void (*smp_cpus_done)(unsigned max_cpus); | |
57 | ||
58 | void (*smp_send_stop)(void); | |
59 | void (*smp_send_reschedule)(int cpu); | |
60 | int (*smp_call_function_mask)(cpumask_t mask, | |
61 | void (*func)(void *info), void *info, | |
62 | int wait); | |
63 | }; | |
64 | ||
65 | extern struct smp_ops smp_ops; | |
66 | ||
67 | static inline void smp_prepare_boot_cpu(void) | |
68 | { | |
69 | smp_ops.smp_prepare_boot_cpu(); | |
70 | } | |
71 | static inline void smp_prepare_cpus(unsigned int max_cpus) | |
72 | { | |
73 | smp_ops.smp_prepare_cpus(max_cpus); | |
74 | } | |
75 | static inline int __cpu_up(unsigned int cpu) | |
76 | { | |
77 | return smp_ops.cpu_up(cpu); | |
78 | } | |
79 | static inline void smp_cpus_done(unsigned int max_cpus) | |
80 | { | |
81 | smp_ops.smp_cpus_done(max_cpus); | |
82 | } | |
83 | ||
84 | static inline void smp_send_stop(void) | |
85 | { | |
86 | smp_ops.smp_send_stop(); | |
87 | } | |
88 | static inline void smp_send_reschedule(int cpu) | |
89 | { | |
90 | smp_ops.smp_send_reschedule(cpu); | |
91 | } | |
92 | static inline int smp_call_function_mask(cpumask_t mask, | |
93 | void (*func) (void *info), void *info, | |
94 | int wait) | |
95 | { | |
96 | return smp_ops.smp_call_function_mask(mask, func, info, wait); | |
97 | } | |
98 | ||
99 | void native_smp_prepare_boot_cpu(void); | |
100 | void native_smp_prepare_cpus(unsigned int max_cpus); | |
101 | int native_cpu_up(unsigned int cpunum); | |
102 | void native_smp_cpus_done(unsigned int max_cpus); | |
103 | ||
ae5da273 ZA |
104 | #ifndef CONFIG_PARAVIRT |
105 | #define startup_ipi_hook(phys_apicid, start_eip, start_esp) \ | |
106 | do { } while (0) | |
107 | #endif | |
108 | ||
1da177e4 LT |
109 | /* |
110 | * This function is needed by all SMP systems. It must _always_ be valid | |
111 | * from the initial startup. We map APIC_BASE very early in page_setup(), | |
112 | * so this is correct in the x86 case. | |
113 | */ | |
7c3576d2 JF |
114 | DECLARE_PER_CPU(int, cpu_number); |
115 | #define raw_smp_processor_id() (x86_read_percpu(cpu_number)) | |
1da177e4 LT |
116 | |
117 | extern cpumask_t cpu_callout_map; | |
118 | extern cpumask_t cpu_callin_map; | |
4ad8d383 | 119 | extern cpumask_t cpu_possible_map; |
1da177e4 LT |
120 | |
121 | /* We don't mark CPUs online until __cpu_up(), so we need another measure */ | |
122 | static inline int num_booting_cpus(void) | |
123 | { | |
124 | return cpus_weight(cpu_callout_map); | |
125 | } | |
126 | ||
127 | #ifdef CONFIG_X86_LOCAL_APIC | |
128 | ||
129 | #ifdef APIC_DEFINITION | |
130 | extern int hard_smp_processor_id(void); | |
131 | #else | |
132 | #include <mach_apicdef.h> | |
133 | static inline int hard_smp_processor_id(void) | |
134 | { | |
135 | /* we don't want to mark this access volatile - bad code generation */ | |
136 | return GET_APIC_ID(*(unsigned long *)(APIC_BASE+APIC_ID)); | |
137 | } | |
138 | #endif | |
1da177e4 | 139 | #endif |
f3705136 | 140 | |
dc2bc768 | 141 | extern int safe_smp_processor_id(void); |
f3705136 ZM |
142 | extern int __cpu_disable(void); |
143 | extern void __cpu_die(unsigned int cpu); | |
73fea175 | 144 | extern unsigned int num_processors; |
874c4fe3 | 145 | |
1da177e4 LT |
146 | #endif /* !__ASSEMBLY__ */ |
147 | ||
b4033c17 AR |
148 | #else /* CONFIG_SMP */ |
149 | ||
dc2bc768 | 150 | #define safe_smp_processor_id() 0 |
b4033c17 AR |
151 | #define cpu_physical_id(cpu) boot_cpu_physical_apicid |
152 | ||
1da177e4 LT |
153 | #define NO_PROC_ID 0xFF /* No processor magic marker */ |
154 | ||
155 | #endif | |
874c4fe3 AK |
156 | |
157 | #ifndef __ASSEMBLY__ | |
815a965b JK |
158 | |
159 | extern u8 apicid_2_node[]; | |
160 | ||
874c4fe3 AK |
161 | #ifdef CONFIG_X86_LOCAL_APIC |
162 | static __inline int logical_smp_processor_id(void) | |
163 | { | |
164 | /* we don't want to mark this access volatile - bad code generation */ | |
165 | return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR)); | |
166 | } | |
167 | #endif | |
168 | #endif | |
169 | ||
1da177e4 | 170 | #endif |