]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #ifndef _ASM_IA64_ATOMIC_H |
2 | #define _ASM_IA64_ATOMIC_H | |
3 | ||
4 | /* | |
5 | * Atomic operations that C can't guarantee us. Useful for | |
6 | * resource counting etc.. | |
7 | * | |
8 | * NOTE: don't mess with the types below! The "unsigned long" and | |
9 | * "int" types were carefully placed so as to ensure proper operation | |
10 | * of the macros. | |
11 | * | |
12 | * Copyright (C) 1998, 1999, 2002-2003 Hewlett-Packard Co | |
13 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
14 | */ | |
15 | #include <linux/types.h> | |
16 | ||
17 | #include <asm/intrinsics.h> | |
18 | ||
19 | /* | |
20 | * On IA-64, counter must always be volatile to ensure that that the | |
21 | * memory accesses are ordered. | |
22 | */ | |
23 | typedef struct { volatile __s32 counter; } atomic_t; | |
24 | typedef struct { volatile __s64 counter; } atomic64_t; | |
25 | ||
26 | #define ATOMIC_INIT(i) ((atomic_t) { (i) }) | |
27 | #define ATOMIC64_INIT(i) ((atomic64_t) { (i) }) | |
28 | ||
29 | #define atomic_read(v) ((v)->counter) | |
30 | #define atomic64_read(v) ((v)->counter) | |
31 | ||
32 | #define atomic_set(v,i) (((v)->counter) = (i)) | |
33 | #define atomic64_set(v,i) (((v)->counter) = (i)) | |
34 | ||
35 | static __inline__ int | |
36 | ia64_atomic_add (int i, atomic_t *v) | |
37 | { | |
38 | __s32 old, new; | |
39 | CMPXCHG_BUGCHECK_DECL | |
40 | ||
41 | do { | |
42 | CMPXCHG_BUGCHECK(v); | |
43 | old = atomic_read(v); | |
44 | new = old + i; | |
45 | } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); | |
46 | return new; | |
47 | } | |
48 | ||
49 | static __inline__ int | |
50 | ia64_atomic64_add (__s64 i, atomic64_t *v) | |
51 | { | |
52 | __s64 old, new; | |
53 | CMPXCHG_BUGCHECK_DECL | |
54 | ||
55 | do { | |
56 | CMPXCHG_BUGCHECK(v); | |
57 | old = atomic_read(v); | |
58 | new = old + i; | |
59 | } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); | |
60 | return new; | |
61 | } | |
62 | ||
63 | static __inline__ int | |
64 | ia64_atomic_sub (int i, atomic_t *v) | |
65 | { | |
66 | __s32 old, new; | |
67 | CMPXCHG_BUGCHECK_DECL | |
68 | ||
69 | do { | |
70 | CMPXCHG_BUGCHECK(v); | |
71 | old = atomic_read(v); | |
72 | new = old - i; | |
73 | } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); | |
74 | return new; | |
75 | } | |
76 | ||
77 | static __inline__ int | |
78 | ia64_atomic64_sub (__s64 i, atomic64_t *v) | |
79 | { | |
80 | __s64 old, new; | |
81 | CMPXCHG_BUGCHECK_DECL | |
82 | ||
83 | do { | |
84 | CMPXCHG_BUGCHECK(v); | |
85 | old = atomic_read(v); | |
86 | new = old - i; | |
87 | } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); | |
88 | return new; | |
89 | } | |
90 | ||
81979131 | 91 | #define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new)) |
ffbf670f | 92 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) |
4a6dae6d | 93 | |
81979131 MD |
94 | #define atomic64_cmpxchg(v, old, new) \ |
95 | (cmpxchg(&((v)->counter), old, new)) | |
96 | #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) | |
97 | ||
8426e1f6 NP |
98 | #define atomic_add_unless(v, a, u) \ |
99 | ({ \ | |
81979131 | 100 | __typeof__(v->counter) c, old; \ |
8426e1f6 | 101 | c = atomic_read(v); \ |
0b2fcfdb NP |
102 | for (;;) { \ |
103 | if (unlikely(c == (u))) \ | |
104 | break; \ | |
105 | old = atomic_cmpxchg((v), c, c + (a)); \ | |
106 | if (likely(old == c)) \ | |
107 | break; \ | |
8426e1f6 | 108 | c = old; \ |
0b2fcfdb | 109 | } \ |
8426e1f6 NP |
110 | c != (u); \ |
111 | }) | |
112 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | |
113 | ||
81979131 MD |
114 | #define atomic64_add_unless(v, a, u) \ |
115 | ({ \ | |
116 | __typeof__(v->counter) c, old; \ | |
117 | c = atomic64_read(v); \ | |
118 | for (;;) { \ | |
119 | if (unlikely(c == (u))) \ | |
120 | break; \ | |
121 | old = atomic64_cmpxchg((v), c, c + (a)); \ | |
122 | if (likely(old == c)) \ | |
123 | break; \ | |
124 | c = old; \ | |
125 | } \ | |
126 | c != (u); \ | |
127 | }) | |
128 | #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) | |
129 | ||
1da177e4 LT |
130 | #define atomic_add_return(i,v) \ |
131 | ({ \ | |
132 | int __ia64_aar_i = (i); \ | |
133 | (__builtin_constant_p(i) \ | |
134 | && ( (__ia64_aar_i == 1) || (__ia64_aar_i == 4) \ | |
135 | || (__ia64_aar_i == 8) || (__ia64_aar_i == 16) \ | |
136 | || (__ia64_aar_i == -1) || (__ia64_aar_i == -4) \ | |
137 | || (__ia64_aar_i == -8) || (__ia64_aar_i == -16))) \ | |
138 | ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \ | |
139 | : ia64_atomic_add(__ia64_aar_i, v); \ | |
140 | }) | |
141 | ||
142 | #define atomic64_add_return(i,v) \ | |
143 | ({ \ | |
144 | long __ia64_aar_i = (i); \ | |
145 | (__builtin_constant_p(i) \ | |
146 | && ( (__ia64_aar_i == 1) || (__ia64_aar_i == 4) \ | |
147 | || (__ia64_aar_i == 8) || (__ia64_aar_i == 16) \ | |
148 | || (__ia64_aar_i == -1) || (__ia64_aar_i == -4) \ | |
149 | || (__ia64_aar_i == -8) || (__ia64_aar_i == -16))) \ | |
150 | ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \ | |
151 | : ia64_atomic64_add(__ia64_aar_i, v); \ | |
152 | }) | |
153 | ||
154 | /* | |
155 | * Atomically add I to V and return TRUE if the resulting value is | |
156 | * negative. | |
157 | */ | |
158 | static __inline__ int | |
159 | atomic_add_negative (int i, atomic_t *v) | |
160 | { | |
161 | return atomic_add_return(i, v) < 0; | |
162 | } | |
163 | ||
164 | static __inline__ int | |
165 | atomic64_add_negative (__s64 i, atomic64_t *v) | |
166 | { | |
167 | return atomic64_add_return(i, v) < 0; | |
168 | } | |
169 | ||
170 | #define atomic_sub_return(i,v) \ | |
171 | ({ \ | |
172 | int __ia64_asr_i = (i); \ | |
173 | (__builtin_constant_p(i) \ | |
174 | && ( (__ia64_asr_i == 1) || (__ia64_asr_i == 4) \ | |
175 | || (__ia64_asr_i == 8) || (__ia64_asr_i == 16) \ | |
176 | || (__ia64_asr_i == -1) || (__ia64_asr_i == -4) \ | |
177 | || (__ia64_asr_i == -8) || (__ia64_asr_i == -16))) \ | |
178 | ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \ | |
179 | : ia64_atomic_sub(__ia64_asr_i, v); \ | |
180 | }) | |
181 | ||
182 | #define atomic64_sub_return(i,v) \ | |
183 | ({ \ | |
184 | long __ia64_asr_i = (i); \ | |
185 | (__builtin_constant_p(i) \ | |
186 | && ( (__ia64_asr_i == 1) || (__ia64_asr_i == 4) \ | |
187 | || (__ia64_asr_i == 8) || (__ia64_asr_i == 16) \ | |
188 | || (__ia64_asr_i == -1) || (__ia64_asr_i == -4) \ | |
189 | || (__ia64_asr_i == -8) || (__ia64_asr_i == -16))) \ | |
190 | ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \ | |
191 | : ia64_atomic64_sub(__ia64_asr_i, v); \ | |
192 | }) | |
193 | ||
194 | #define atomic_dec_return(v) atomic_sub_return(1, (v)) | |
195 | #define atomic_inc_return(v) atomic_add_return(1, (v)) | |
196 | #define atomic64_dec_return(v) atomic64_sub_return(1, (v)) | |
197 | #define atomic64_inc_return(v) atomic64_add_return(1, (v)) | |
198 | ||
199 | #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) | |
200 | #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) | |
201 | #define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) | |
202 | #define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0) | |
203 | #define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0) | |
204 | #define atomic64_inc_and_test(v) (atomic64_add_return(1, (v)) == 0) | |
205 | ||
206 | #define atomic_add(i,v) atomic_add_return((i), (v)) | |
207 | #define atomic_sub(i,v) atomic_sub_return((i), (v)) | |
208 | #define atomic_inc(v) atomic_add(1, (v)) | |
209 | #define atomic_dec(v) atomic_sub(1, (v)) | |
210 | ||
211 | #define atomic64_add(i,v) atomic64_add_return((i), (v)) | |
212 | #define atomic64_sub(i,v) atomic64_sub_return((i), (v)) | |
213 | #define atomic64_inc(v) atomic64_add(1, (v)) | |
214 | #define atomic64_dec(v) atomic64_sub(1, (v)) | |
215 | ||
216 | /* Atomic operations are already serializing */ | |
217 | #define smp_mb__before_atomic_dec() barrier() | |
218 | #define smp_mb__after_atomic_dec() barrier() | |
219 | #define smp_mb__before_atomic_inc() barrier() | |
220 | #define smp_mb__after_atomic_inc() barrier() | |
221 | ||
d3cb4871 | 222 | #include <asm-generic/atomic.h> |
1da177e4 | 223 | #endif /* _ASM_IA64_ATOMIC_H */ |