[mirror_ubuntu-zesty-kernel.git] / include / asm-mips / addrspace.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1996, 99 Ralf Baechle
 * Copyright (C) 2000, 2002  Maciej W. Rozycki
 * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
 */
#ifndef _ASM_ADDRSPACE_H
#define _ASM_ADDRSPACE_H

#include <spaces.h>

/*
 *  Configure language
 */
#ifdef __ASSEMBLY__
#define _ATYPE_
#define _ATYPE32_
#define _ATYPE64_
#define _LLCONST_(x)	x
#else
#define _ATYPE_		__PTRDIFF_TYPE__
#define _ATYPE32_	int
#define _ATYPE64_	long long
#define _LLCONST_(x)	x ## LL
#endif

/*
 *  32-bit MIPS address spaces
 */
#ifdef __ASSEMBLY__
#define _ACAST32_
#define _ACAST64_
#else
#define _ACAST32_		(_ATYPE_)(_ATYPE32_)	/* widen if necessary */
#define _ACAST64_		(_ATYPE64_)		/* do _not_ narrow */
#endif

/*
 * Returns the kernel segment base of a given address
 */
#define KSEGX(a)		((_ACAST32_ (a)) & 0xe0000000)

/*
 * Returns the physical address of a CKSEGx / XKPHYS address
 */
#define CPHYSADDR(a)		((_ACAST32_(a)) & 0x1fffffff)
#define XPHYSADDR(a)            ((_ACAST64_(a)) &			\
				 _LLCONST_(0x000000ffffffffff))

#ifdef CONFIG_64BIT

/*
 * Memory segments (64bit kernel mode addresses)
 * The compatibility segments use the full 64-bit sign extended value.  Note
 * the R8000 doesn't have them so don't reference these in generic MIPS code.
 */
#define XKUSEG			_LLCONST_(0x0000000000000000)
#define XKSSEG			_LLCONST_(0x4000000000000000)
#define XKPHYS			_LLCONST_(0x8000000000000000)
#define XKSEG			_LLCONST_(0xc000000000000000)
#define CKSEG0			_LLCONST_(0xffffffff80000000)
#define CKSEG1			_LLCONST_(0xffffffffa0000000)
#define CKSSEG			_LLCONST_(0xffffffffc0000000)
#define CKSEG3			_LLCONST_(0xffffffffe0000000)

#define CKSEG0ADDR(a)		(CPHYSADDR(a) | CKSEG0)
#define CKSEG1ADDR(a)		(CPHYSADDR(a) | CKSEG1)
#define CKSEG2ADDR(a)		(CPHYSADDR(a) | CKSEG2)
#define CKSEG3ADDR(a)		(CPHYSADDR(a) | CKSEG3)

#else

#define CKSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0)
#define CKSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1)
#define CKSEG2ADDR(a)		(CPHYSADDR(a) | KSEG2)
#define CKSEG3ADDR(a)		(CPHYSADDR(a) | KSEG3)

/*
 * Map an address to a certain kernel segment
 */
#define KSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0)
#define KSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1)
#define KSEG2ADDR(a)		(CPHYSADDR(a) | KSEG2)
#define KSEG3ADDR(a)		(CPHYSADDR(a) | KSEG3)

/*
 * Memory segments (32bit kernel mode addresses)
 * These are the traditional names used in the 32-bit universe.
 */
#define KUSEG			0x00000000
#define KSEG0			0x80000000
#define KSEG1			0xa0000000
#define KSEG2			0xc0000000
#define KSEG3			0xe0000000

#define CKUSEG			0x00000000
#define CKSEG0			0x80000000
#define CKSEG1			0xa0000000
#define CKSEG2			0xc0000000
#define CKSEG3			0xe0000000

#endif

/*
 * Cache modes for XKPHYS address conversion macros
 */
#define K_CALG_COH_EXCL1_NOL2	0
#define K_CALG_COH_SHRL1_NOL2	1
#define K_CALG_UNCACHED		2
#define K_CALG_NONCOHERENT	3
#define K_CALG_COH_EXCL		4
#define K_CALG_COH_SHAREABLE	5
#define K_CALG_NOTUSED		6
#define K_CALG_UNCACHED_ACCEL	7

/*
 * 64-bit address conversions
 */
#define PHYS_TO_XKSEG_UNCACHED(p)	PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p))
#define PHYS_TO_XKSEG_CACHED(p)		PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p))
#define XKPHYS_TO_PHYS(p)		((p) & TO_PHYS_MASK)
#define PHYS_TO_XKPHYS(cm,a)		(_LLCONST_(0x8000000000000000) | \
					 ((cm)<<59) | (a))

#if defined (CONFIG_CPU_R4300)						\
    || defined (CONFIG_CPU_R4X00)					\
    || defined (CONFIG_CPU_R5000)					\
    || defined (CONFIG_CPU_RM7000)					\
    || defined (CONFIG_CPU_NEVADA)					\
    || defined (CONFIG_CPU_TX49XX)					\
    || defined (CONFIG_CPU_MIPS64)
#define TO_PHYS_MASK	_LLCONST_(0x0000000fffffffff)	/* 2^^36 - 1 */
#endif

#if defined (CONFIG_CPU_R8000)
/* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */
#define TO_PHYS_MASK	_LLCONST_(0x000000ffffffffff)	/* 2^^40 - 1 */
#endif

#if defined (CONFIG_CPU_R10000)
#define TO_PHYS_MASK	_LLCONST_(0x000000ffffffffff)	/* 2^^40 - 1 */
#endif

#if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A)
#define TO_PHYS_MASK	_LLCONST_(0x00000fffffffffff)	/* 2^^44 - 1 */
#endif

#ifndef CONFIG_CPU_R8000

/*
 * The R8000 doesn't have the 32-bit compat spaces so we don't define them
 * in order to catch bugs in the source code.
 */

#define COMPAT_K1BASE32		_LLCONST_(0xffffffffa0000000)
#define PHYS_TO_COMPATK1(x)	((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */

#endif

#define KDM_TO_PHYS(x)		(_ACAST64_ (x) & TO_PHYS_MASK)
#define PHYS_TO_K0(x)		(_ACAST64_ (x) | CAC_BASE)

#endif /* _ASM_ADDRSPACE_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1996, 99 Ralf Baechle
	7	* Copyright (C) 2000, 2002 Maciej W. Rozycki
	8	* Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
	9	*/
	10	#ifndef _ASM_ADDRSPACE_H
	11	#define _ASM_ADDRSPACE_H
	12
1da177e4 LT	13	#include <spaces.h>
	14
	15	/*
	16	* Configure language
	17	*/
	18	#ifdef __ASSEMBLY__
	19	#define _ATYPE_
	20	#define _ATYPE32_
	21	#define _ATYPE64_
7d7ee221	22	#define _LLCONST_(x) x
1da177e4 LT	23	#else
	24	#define _ATYPE_ __PTRDIFF_TYPE__
	25	#define _ATYPE32_ int
	26	#define _ATYPE64_ long long
7d7ee221	27	#define _LLCONST_(x) x ## LL
1da177e4 LT	28	#endif
	29
	30	/*
	31	* 32-bit MIPS address spaces
	32	*/
	33	#ifdef __ASSEMBLY__
	34	#define _ACAST32_
	35	#define _ACAST64_
	36	#else
	37	#define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */
	38	#define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */
	39	#endif
	40
	41	/*
	42	* Returns the kernel segment base of a given address
	43	*/
	44	#define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000)
	45
	46	/*
	47	* Returns the physical address of a CKSEGx / XKPHYS address
	48	*/
7d7ee221 MR	49	#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
	50	#define XPHYSADDR(a) ((_ACAST64_(a)) & \
	51	_LLCONST_(0x000000ffffffffff))
1da177e4	52
875d43e7	53	#ifdef CONFIG_64BIT
1da177e4 LT	54
	55	/*
	56	* Memory segments (64bit kernel mode addresses)
	57	* The compatibility segments use the full 64-bit sign extended value. Note
	58	* the R8000 doesn't have them so don't reference these in generic MIPS code.
	59	*/
7d7ee221 MR	60	#define XKUSEG _LLCONST_(0x0000000000000000)
	61	#define XKSSEG _LLCONST_(0x4000000000000000)
	62	#define XKPHYS _LLCONST_(0x8000000000000000)
	63	#define XKSEG _LLCONST_(0xc000000000000000)
	64	#define CKSEG0 _LLCONST_(0xffffffff80000000)
	65	#define CKSEG1 _LLCONST_(0xffffffffa0000000)
	66	#define CKSSEG _LLCONST_(0xffffffffc0000000)
	67	#define CKSEG3 _LLCONST_(0xffffffffe0000000)
1da177e4 LT	68
	69	#define CKSEG0ADDR(a) (CPHYSADDR(a) \| CKSEG0)
	70	#define CKSEG1ADDR(a) (CPHYSADDR(a) \| CKSEG1)
	71	#define CKSEG2ADDR(a) (CPHYSADDR(a) \| CKSEG2)
	72	#define CKSEG3ADDR(a) (CPHYSADDR(a) \| CKSEG3)
	73
	74	#else
	75
	76	#define CKSEG0ADDR(a) (CPHYSADDR(a) \| KSEG0)
	77	#define CKSEG1ADDR(a) (CPHYSADDR(a) \| KSEG1)
	78	#define CKSEG2ADDR(a) (CPHYSADDR(a) \| KSEG2)
	79	#define CKSEG3ADDR(a) (CPHYSADDR(a) \| KSEG3)
	80
	81	/*
	82	* Map an address to a certain kernel segment
	83	*/
	84	#define KSEG0ADDR(a) (CPHYSADDR(a) \| KSEG0)
	85	#define KSEG1ADDR(a) (CPHYSADDR(a) \| KSEG1)
	86	#define KSEG2ADDR(a) (CPHYSADDR(a) \| KSEG2)
	87	#define KSEG3ADDR(a) (CPHYSADDR(a) \| KSEG3)
	88
	89	/*
	90	* Memory segments (32bit kernel mode addresses)
	91	* These are the traditional names used in the 32-bit universe.
	92	*/
	93	#define KUSEG 0x00000000
	94	#define KSEG0 0x80000000
	95	#define KSEG1 0xa0000000
	96	#define KSEG2 0xc0000000
	97	#define KSEG3 0xe0000000
	98
	99	#define CKUSEG 0x00000000
	100	#define CKSEG0 0x80000000
	101	#define CKSEG1 0xa0000000
	102	#define CKSEG2 0xc0000000
	103	#define CKSEG3 0xe0000000
	104
	105	#endif
	106
	107	/*
	108	* Cache modes for XKPHYS address conversion macros
	109	*/
	110	#define K_CALG_COH_EXCL1_NOL2 0
	111	#define K_CALG_COH_SHRL1_NOL2 1
	112	#define K_CALG_UNCACHED 2
	113	#define K_CALG_NONCOHERENT 3
	114	#define K_CALG_COH_EXCL 4
	115	#define K_CALG_COH_SHAREABLE 5
	116	#define K_CALG_NOTUSED 6
	117	#define K_CALG_UNCACHED_ACCEL 7
	118
	119	/*
	120	* 64-bit address conversions
	121	*/
	122	#define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p))
	123	#define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p))
	124	#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK)
7d7ee221 MR	125	#define PHYS_TO_XKPHYS(cm,a) (_LLCONST_(0x8000000000000000) \| \
7d7ee221 MR	126	((cm)<<59) \| (a))
1da177e4 LT	127
	128	#if defined (CONFIG_CPU_R4300) \
	129	\|\| defined (CONFIG_CPU_R4X00) \
	130	\|\| defined (CONFIG_CPU_R5000) \
e32b6993	131	\|\| defined (CONFIG_CPU_RM7000) \
1da177e4 LT	132	\|\| defined (CONFIG_CPU_NEVADA) \
1da177e4 LT	133	\|\| defined (CONFIG_CPU_TX49XX) \
ec917c2c	134	\|\| defined (CONFIG_CPU_MIPS64)
7d7ee221	135	#define TO_PHYS_MASK _LLCONST_(0x0000000fffffffff) /* 2^^36 - 1 */
1da177e4 LT	136	#endif
	137
	138	#if defined (CONFIG_CPU_R8000)
	139	/* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */
7d7ee221	140	#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
1da177e4 LT	141	#endif
	142
	143	#if defined (CONFIG_CPU_R10000)
7d7ee221	144	#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
1da177e4 LT	145	#endif
1da177e4 LT	146
93ce2f52	147	#if defined(CONFIG_CPU_SB1) \|\| defined(CONFIG_CPU_SB1A)
5090dfb5 RB	148	#define TO_PHYS_MASK _LLCONST_(0x00000fffffffffff) /* 2^^44 - 1 */
	149	#endif
	150
1da177e4 LT	151	#ifndef CONFIG_CPU_R8000
	152
	153	/*
	154	* The R8000 doesn't have the 32-bit compat spaces so we don't define them
	155	* in order to catch bugs in the source code.
	156	*/
	157
7d7ee221	158	#define COMPAT_K1BASE32 _LLCONST_(0xffffffffa0000000)
1da177e4 LT	159	#define PHYS_TO_COMPATK1(x) ((x) \| COMPAT_K1BASE32) /* 32-bit compat k1 */
	160
	161	#endif
	162
	163	#define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK)
	164	#define PHYS_TO_K0(x) (_ACAST64_ (x) \| CAC_BASE)
	165
	166	#endif /* _ASM_ADDRSPACE_H */