[mirror_ubuntu-artful-kernel.git] / include / asm-mips / marvell.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2004 by Ralf Baechle
 */
#ifndef __ASM_MIPS_MARVELL_H
#define __ASM_MIPS_MARVELL_H

#include <linux/pci.h>

#include <asm/byteorder.h>

extern unsigned long marvell_base;

/*
 * Because of an error/peculiarity in the Galileo chip, we need to swap the
 * bytes when running bigendian.
 */
#define __MV_READ(ofs)							\
	(*(volatile u32 *)(marvell_base+(ofs)))
#define __MV_WRITE(ofs, data)						\
	do { *(volatile u32 *)(marvell_base+(ofs)) = (data); } while (0)

#define MV_READ(ofs)		le32_to_cpu(__MV_READ(ofs))
#define MV_WRITE(ofs, data)	__MV_WRITE(ofs, cpu_to_le32(data))

#define MV_READ_16(ofs)							\
        le16_to_cpu(*(volatile u16 *)(marvell_base+(ofs)))
#define MV_WRITE_16(ofs, data)  \
        *(volatile u16 *)(marvell_base+(ofs)) = cpu_to_le16(data)

#define MV_READ_8(ofs)							\
	*(volatile u8 *)(marvell_base+(ofs))
#define MV_WRITE_8(ofs, data)						\
	*(volatile u8 *)(marvell_base+(ofs)) = data

#define MV_SET_REG_BITS(ofs, bits)					\
	(*((volatile u32 *)(marvell_base + (ofs)))) |= ((u32)cpu_to_le32(bits))
#define MV_RESET_REG_BITS(ofs, bits)					\
	(*((volatile u32 *)(marvell_base + (ofs)))) &= ~((u32)cpu_to_le32(bits))

extern struct pci_ops mv_pci_ops;

struct mv_pci_controller {
	struct pci_controller   pcic;

	/*
	 * GT-64240/MV-64340 specific, per host bus information
	 */
	unsigned long   config_addr;
	unsigned long   config_vreg;
};

extern void ll_mv64340_irq(struct pt_regs *regs);

#endif	/* __ASM_MIPS_MARVELL_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 2004 by Ralf Baechle
	7	*/
	8	#ifndef __ASM_MIPS_MARVELL_H
	9	#define __ASM_MIPS_MARVELL_H
	10
	11	#include <linux/pci.h>
	12
	13	#include <asm/byteorder.h>
	14
	15	extern unsigned long marvell_base;
	16
	17	/*
	18	* Because of an error/peculiarity in the Galileo chip, we need to swap the
	19	* bytes when running bigendian.
	20	*/
	21	#define __MV_READ(ofs) \
	22	((volatile u32 )(marvell_base+(ofs)))
	23	#define __MV_WRITE(ofs, data) \
	24	do { (volatile u32 )(marvell_base+(ofs)) = (data); } while (0)
	25
	26	#define MV_READ(ofs) le32_to_cpu(__MV_READ(ofs))
	27	#define MV_WRITE(ofs, data) __MV_WRITE(ofs, cpu_to_le32(data))
	28
	29	#define MV_READ_16(ofs) \
	30	le16_to_cpu((volatile u16 )(marvell_base+(ofs)))
	31	#define MV_WRITE_16(ofs, data) \
	32	(volatile u16 )(marvell_base+(ofs)) = cpu_to_le16(data)
	33
	34	#define MV_READ_8(ofs) \
	35	(volatile u8 )(marvell_base+(ofs))
	36	#define MV_WRITE_8(ofs, data) \
	37	(volatile u8 )(marvell_base+(ofs)) = data
	38
	39	#define MV_SET_REG_BITS(ofs, bits) \
	40	(((volatile u32 )(marvell_base + (ofs)))) \|= ((u32)cpu_to_le32(bits))
	41	#define MV_RESET_REG_BITS(ofs, bits) \
	42	(((volatile u32 )(marvell_base + (ofs)))) &= ~((u32)cpu_to_le32(bits))
	43
	44	extern struct pci_ops mv_pci_ops;
	45
	46	struct mv_pci_controller {
	47	struct pci_controller pcic;
	48
	49	/*
	50	* GT-64240/MV-64340 specific, per host bus information
	51	*/
	52	unsigned long config_addr;
	53	unsigned long config_vreg;
	54	};
	55
088cf96a RB	56	extern void ll_mv64340_irq(struct pt_regs *regs);
088cf96a RB	57
1da177e4	58	#endif /* __ASM_MIPS_MARVELL_H */