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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1994 - 1999, 2000, 03 Ralf Baechle | |
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | |
8 | */ | |
9 | #ifndef _ASM_PAGE_H | |
10 | #define _ASM_PAGE_H | |
11 | ||
1da177e4 LT |
12 | |
13 | #ifdef __KERNEL__ | |
14 | ||
15 | #include <spaces.h> | |
16 | ||
1da177e4 LT |
17 | /* |
18 | * PAGE_SHIFT determines the page size | |
19 | */ | |
20 | #ifdef CONFIG_PAGE_SIZE_4KB | |
21 | #define PAGE_SHIFT 12 | |
22 | #endif | |
23 | #ifdef CONFIG_PAGE_SIZE_8KB | |
24 | #define PAGE_SHIFT 13 | |
25 | #endif | |
26 | #ifdef CONFIG_PAGE_SIZE_16KB | |
27 | #define PAGE_SHIFT 14 | |
28 | #endif | |
29 | #ifdef CONFIG_PAGE_SIZE_64KB | |
30 | #define PAGE_SHIFT 16 | |
31 | #endif | |
32 | #define PAGE_SIZE (1UL << PAGE_SHIFT) | |
33 | #define PAGE_MASK (~((1 << PAGE_SHIFT) - 1)) | |
34 | ||
1da177e4 LT |
35 | #ifndef __ASSEMBLY__ |
36 | ||
41b0483e | 37 | #include <linux/pfn.h> |
b1c65b39 | 38 | #include <asm/io.h> |
6f284a2c FBH |
39 | |
40 | /* | |
41 | * It's normally defined only for FLATMEM config but it's | |
42 | * used in our early mem init code for all memory models. | |
43 | * So always define it. | |
44 | */ | |
45 | #define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET) | |
46 | ||
1da177e4 LT |
47 | extern void clear_page(void * page); |
48 | extern void copy_page(void * to, void * from); | |
49 | ||
50 | extern unsigned long shm_align_mask; | |
51 | ||
52 | static inline unsigned long pages_do_alias(unsigned long addr1, | |
53 | unsigned long addr2) | |
54 | { | |
55 | return (addr1 ^ addr2) & shm_align_mask; | |
56 | } | |
57 | ||
58 | struct page; | |
59 | ||
60 | static inline void clear_user_page(void *addr, unsigned long vaddr, | |
61 | struct page *page) | |
62 | { | |
63 | extern void (*flush_data_cache_page)(unsigned long addr); | |
64 | ||
65 | clear_page(addr); | |
585fa724 | 66 | if (pages_do_alias((unsigned long) addr, vaddr & PAGE_MASK)) |
1da177e4 LT |
67 | flush_data_cache_page((unsigned long)addr); |
68 | } | |
69 | ||
bcd02280 AN |
70 | extern void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, |
71 | struct page *to); | |
72 | struct vm_area_struct; | |
73 | extern void copy_user_highpage(struct page *to, struct page *from, | |
74 | unsigned long vaddr, struct vm_area_struct *vma); | |
1da177e4 | 75 | |
bcd02280 | 76 | #define __HAVE_ARCH_COPY_USER_HIGHPAGE |
1da177e4 LT |
77 | |
78 | /* | |
79 | * These are used to make use of C type-checking.. | |
80 | */ | |
81 | #ifdef CONFIG_64BIT_PHYS_ADDR | |
ec917c2c | 82 | #ifdef CONFIG_CPU_MIPS32 |
1da177e4 LT |
83 | typedef struct { unsigned long pte_low, pte_high; } pte_t; |
84 | #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) | |
d34555fb | 85 | #define __pte(x) ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) |
1da177e4 LT |
86 | #else |
87 | typedef struct { unsigned long long pte; } pte_t; | |
88 | #define pte_val(x) ((x).pte) | |
d34555fb | 89 | #define __pte(x) ((pte_t) { (x) } ) |
1da177e4 LT |
90 | #endif |
91 | #else | |
92 | typedef struct { unsigned long pte; } pte_t; | |
93 | #define pte_val(x) ((x).pte) | |
c6e8b587 | 94 | #define __pte(x) ((pte_t) { (x) } ) |
d34555fb | 95 | #endif |
1da177e4 | 96 | |
c6e8b587 RB |
97 | /* |
98 | * For 3-level pagetables we defines these ourselves, for 2-level the | |
99 | * definitions are supplied by <asm-generic/pgtable-nopmd.h>. | |
100 | */ | |
101 | #ifdef CONFIG_64BIT | |
1da177e4 | 102 | |
c6e8b587 | 103 | typedef struct { unsigned long pmd; } pmd_t; |
1da177e4 | 104 | #define pmd_val(x) ((x).pmd) |
c6e8b587 | 105 | #define __pmd(x) ((pmd_t) { (x) } ) |
1da177e4 | 106 | |
c6e8b587 | 107 | #endif |
1da177e4 | 108 | |
c6e8b587 RB |
109 | /* |
110 | * Right now we don't support 4-level pagetables, so all pud-related | |
111 | * definitions come from <asm-generic/pgtable-nopud.h>. | |
112 | */ | |
113 | ||
114 | /* | |
115 | * Finall the top of the hierarchy, the pgd | |
116 | */ | |
117 | typedef struct { unsigned long pgd; } pgd_t; | |
118 | #define pgd_val(x) ((x).pgd) | |
1da177e4 | 119 | #define __pgd(x) ((pgd_t) { (x) } ) |
c6e8b587 RB |
120 | |
121 | /* | |
122 | * Manipulate page protection bits | |
123 | */ | |
124 | typedef struct { unsigned long pgprot; } pgprot_t; | |
125 | #define pgprot_val(x) ((x).pgprot) | |
1da177e4 LT |
126 | #define __pgprot(x) ((pgprot_t) { (x) } ) |
127 | ||
c6e8b587 RB |
128 | /* |
129 | * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd | |
130 | * pair of pages we only have a single global bit per pair of pages. When | |
131 | * writing to the TLB make sure we always have the bit set for both pages | |
132 | * or none. This macro is used to access the `buddy' of the pte we're just | |
133 | * working on. | |
134 | */ | |
135 | #define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) | |
136 | ||
1da177e4 LT |
137 | #endif /* !__ASSEMBLY__ */ |
138 | ||
139 | /* to align the pointer to the (next) page boundary */ | |
140 | #define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK) | |
141 | ||
6f284a2c FBH |
142 | /* |
143 | * __pa()/__va() should be used only during mem init. | |
144 | */ | |
7d809ba3 | 145 | #ifdef CONFIG_64BIT |
b1c65b39 FBH |
146 | #define __pa(x) \ |
147 | ({ \ | |
148 | unsigned long __x = (unsigned long)(x); \ | |
149 | __x < CKSEG0 ? XPHYSADDR(__x) : CPHYSADDR(__x); \ | |
150 | }) | |
620a4802 | 151 | #else |
b1c65b39 FBH |
152 | #define __pa(x) \ |
153 | ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET) | |
620a4802 | 154 | #endif |
6f284a2c FBH |
155 | #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) |
156 | #define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x),0)) | |
1da177e4 LT |
157 | |
158 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) | |
159 | ||
e53639d8 RB |
160 | #ifdef CONFIG_FLATMEM |
161 | ||
6f284a2c | 162 | #define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr) |
e53639d8 | 163 | |
7de58fab AN |
164 | #elif defined(CONFIG_SPARSEMEM) |
165 | ||
166 | /* pfn_valid is defined in linux/mmzone.h */ | |
167 | ||
e53639d8 RB |
168 | #elif defined(CONFIG_NEED_MULTIPLE_NODES) |
169 | ||
170 | #define pfn_valid(pfn) \ | |
171 | ({ \ | |
172 | unsigned long __pfn = (pfn); \ | |
173 | int __n = pfn_to_nid(__pfn); \ | |
174 | ((__n >= 0) ? (__pfn < NODE_DATA(__n)->node_start_pfn + \ | |
175 | NODE_DATA(__n)->node_spanned_pages) \ | |
176 | : 0); \ | |
177 | }) | |
178 | ||
e53639d8 RB |
179 | #endif |
180 | ||
99e3b942 FBH |
181 | #define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys(kaddr))) |
182 | #define virt_addr_valid(kaddr) pfn_valid(PFN_DOWN(virt_to_phys(kaddr))) | |
1da177e4 LT |
183 | |
184 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ | |
185 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | |
186 | ||
187 | #define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) | |
188 | #define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) | |
189 | ||
a02036e7 | 190 | #include <asm-generic/memory_model.h> |
fd4fd5aa SR |
191 | #include <asm-generic/page.h> |
192 | ||
a2aa3e23 DW |
193 | #endif /* defined (__KERNEL__) */ |
194 | ||
1da177e4 | 195 | #endif /* _ASM_PAGE_H */ |