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1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Derived from IRIX <sys/SN/SN0/addrs.h>, revision 1.126. | |
7 | * | |
8 | * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc. | |
9 | * Copyright (C) 1999 by Ralf Baechle | |
10 | */ | |
11 | #ifndef _ASM_SN_SN0_ADDRS_H | |
12 | #define _ASM_SN_SN0_ADDRS_H | |
13 | ||
14 | #include <linux/config.h> | |
15 | ||
16 | /* | |
17 | * SN0 (on a T5) Address map | |
18 | * | |
19 | * This file contains a set of definitions and macros which are used | |
20 | * to reference into the major address spaces (CAC, HSPEC, IO, MSPEC, | |
21 | * and UNCAC) used by the SN0 architecture. It also contains addresses | |
22 | * for "major" statically locatable PROM/Kernel data structures, such as | |
23 | * the partition table, the configuration data structure, etc. | |
24 | * We make an implicit assumption that the processor using this file | |
25 | * follows the R10K's provisions for specifying uncached attributes; | |
26 | * should this change, the base registers may very well become processor- | |
27 | * dependent. | |
28 | * | |
29 | * For more information on the address spaces, see the "Local Resources" | |
30 | * chapter of the Hub specification. | |
31 | * | |
32 | * NOTE: This header file is included both by C and by assembler source | |
33 | * files. Please bracket any language-dependent definitions | |
34 | * appropriately. | |
35 | */ | |
36 | ||
37 | /* | |
38 | * Some of the macros here need to be casted to appropriate types when used | |
39 | * from C. They definitely must not be casted from assembly language so we | |
40 | * use some new ANSI preprocessor stuff to paste these on where needed. | |
41 | */ | |
42 | ||
43 | /* | |
44 | * The following couple of definitions will eventually need to be variables, | |
45 | * since the amount of address space assigned to each node depends on | |
46 | * whether the system is running in N-mode (more nodes with less memory) | |
47 | * or M-mode (fewer nodes with more memory). We expect that it will | |
48 | * be a while before we need to make this decision dynamically, though, | |
49 | * so for now we just use defines bracketed by an ifdef. | |
50 | */ | |
51 | ||
52 | #ifdef CONFIG_SGI_SN0_N_MODE | |
53 | ||
54 | #define NODE_SIZE_BITS 31 | |
55 | #define BWIN_SIZE_BITS 28 | |
56 | ||
57 | #define NASID_BITS 9 | |
58 | #define NASID_BITMASK (0x1ffLL) | |
59 | #define NASID_SHFT 31 | |
60 | #define NASID_META_BITS 5 | |
61 | #define NASID_LOCAL_BITS 4 | |
62 | ||
63 | #define BDDIR_UPPER_MASK (UINT64_CAST 0x7ffff << 10) | |
64 | #define BDECC_UPPER_MASK (UINT64_CAST 0x3ffffff << 3) | |
65 | ||
66 | #else /* !defined(CONFIG_SGI_SN0_N_MODE), assume that M-mode is desired */ | |
67 | ||
68 | #define NODE_SIZE_BITS 32 | |
69 | #define BWIN_SIZE_BITS 29 | |
70 | ||
71 | #define NASID_BITMASK (0xffLL) | |
72 | #define NASID_BITS 8 | |
73 | #define NASID_SHFT 32 | |
74 | #define NASID_META_BITS 4 | |
75 | #define NASID_LOCAL_BITS 4 | |
76 | ||
77 | #define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10) | |
78 | #define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3) | |
79 | ||
80 | #endif /* !defined(CONFIG_SGI_SN0_N_MODE) */ | |
81 | ||
82 | #define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS) | |
83 | ||
84 | #define NASID_MASK (UINT64_CAST NASID_BITMASK << NASID_SHFT) | |
85 | #define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \ | |
86 | NASID_SHFT) & NASID_BITMASK) | |
87 | ||
88 | #if !defined(__ASSEMBLY__) && !defined(_STANDALONE) | |
89 | ||
90 | #define NODE_SWIN_BASE(nasid, widget) \ | |
91 | ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \ | |
92 | : RAW_NODE_SWIN_BASE(nasid, widget)) | |
93 | #else /* __ASSEMBLY__ || _STANDALONE */ | |
94 | #define NODE_SWIN_BASE(nasid, widget) \ | |
95 | (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS)) | |
96 | #endif /* __ASSEMBLY__ || _STANDALONE */ | |
97 | ||
98 | /* | |
99 | * The following definitions pertain to the IO special address | |
100 | * space. They define the location of the big and little windows | |
101 | * of any given node. | |
102 | */ | |
103 | ||
104 | #define BWIN_INDEX_BITS 3 | |
105 | #define BWIN_SIZE (UINT64_CAST 1 << BWIN_SIZE_BITS) | |
106 | #define BWIN_SIZEMASK (BWIN_SIZE - 1) | |
107 | #define BWIN_WIDGET_MASK 0x7 | |
108 | #define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE) | |
109 | #define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + \ | |
110 | (UINT64_CAST (bigwin) << BWIN_SIZE_BITS)) | |
111 | ||
112 | #define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK) | |
113 | #define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) | |
114 | /* | |
115 | * Verify if addr belongs to large window address of node with "nasid" | |
116 | * | |
117 | * | |
118 | * NOTE: "addr" is expected to be XKPHYS address, and NOT physical | |
119 | * address | |
120 | * | |
121 | * | |
122 | */ | |
123 | ||
124 | #define NODE_BWIN_ADDR(nasid, addr) \ | |
125 | (((addr) >= NODE_BWIN_BASE0(nasid)) && \ | |
126 | ((addr) < (NODE_BWIN_BASE(nasid, HUB_NUM_BIG_WINDOW) + \ | |
127 | BWIN_SIZE))) | |
128 | ||
129 | /* | |
130 | * The following define the major position-independent aliases used | |
131 | * in SN0. | |
132 | * CALIAS -- Varies in size, points to the first n bytes of memory | |
133 | * on the reader's node. | |
134 | */ | |
135 | ||
136 | #define CALIAS_BASE CAC_BASE | |
137 | ||
138 | ||
139 | ||
140 | #define BRIDGE_REG_PTR(_base, _off) ((volatile bridgereg_t *) \ | |
141 | ((__psunsigned_t)(_base) + (__psunsigned_t)(_off))) | |
142 | ||
143 | #define SN0_WIDGET_BASE(_nasid, _wid) (NODE_SWIN_BASE((_nasid), (_wid))) | |
144 | ||
145 | /* Turn on sable logging for the processors whose bits are set. */ | |
146 | #ifdef SABLE | |
147 | #define SABLE_LOG_TRIGGER(_map) \ | |
148 | *((volatile hubreg_t *)(IO_BASE + 0x17ffff0)) = (_map) | |
149 | #else | |
150 | #define SABLE_LOG_TRIGGER(_map) | |
151 | #endif /* SABLE */ | |
152 | ||
153 | #ifndef __ASSEMBLY__ | |
154 | #define KERN_NMI_ADDR(nasid, slice) \ | |
155 | TO_NODE_UNCAC((nasid), IP27_NMI_KREGS_OFFSET + \ | |
156 | (IP27_NMI_KREGS_CPU_SIZE * (slice))) | |
157 | #endif /* !__ASSEMBLY__ */ | |
158 | ||
159 | #ifdef PROM | |
160 | ||
161 | #define MISC_PROM_BASE PHYS_TO_K0(0x01300000) | |
162 | #define MISC_PROM_SIZE 0x200000 | |
163 | ||
164 | #define DIAG_BASE PHYS_TO_K0(0x01500000) | |
165 | #define DIAG_SIZE 0x300000 | |
166 | ||
167 | #define ROUTE_BASE PHYS_TO_K0(0x01800000) | |
168 | #define ROUTE_SIZE 0x200000 | |
169 | ||
170 | #define IP27PROM_FLASH_HDR PHYS_TO_K0(0x01300000) | |
171 | #define IP27PROM_FLASH_DATA PHYS_TO_K0(0x01301000) | |
172 | #define IP27PROM_CORP_MAX 32 | |
173 | #define IP27PROM_CORP PHYS_TO_K0(0x01800000) | |
174 | #define IP27PROM_CORP_SIZE 0x10000 | |
175 | #define IP27PROM_CORP_STK PHYS_TO_K0(0x01810000) | |
176 | #define IP27PROM_CORP_STKSIZE 0x2000 | |
177 | #define IP27PROM_DECOMP_BUF PHYS_TO_K0(0x01900000) | |
178 | #define IP27PROM_DECOMP_SIZE 0xfff00 | |
179 | ||
180 | #define IP27PROM_BASE PHYS_TO_K0(0x01a00000) | |
181 | #define IP27PROM_BASE_MAPPED (UNCAC_BASE | 0x1fc00000) | |
182 | #define IP27PROM_SIZE_MAX 0x100000 | |
183 | ||
184 | #define IP27PROM_PCFG PHYS_TO_K0(0x01b00000) | |
185 | #define IP27PROM_PCFG_SIZE 0xd0000 | |
186 | #define IP27PROM_ERRDMP PHYS_TO_K1(0x01bd0000) | |
187 | #define IP27PROM_ERRDMP_SIZE 0xf000 | |
188 | ||
189 | #define IP27PROM_INIT_START PHYS_TO_K1(0x01bd0000) | |
190 | #define IP27PROM_CONSOLE PHYS_TO_K1(0x01bdf000) | |
191 | #define IP27PROM_CONSOLE_SIZE 0x200 | |
192 | #define IP27PROM_NETUART PHYS_TO_K1(0x01bdf200) | |
193 | #define IP27PROM_NETUART_SIZE 0x100 | |
194 | #define IP27PROM_UNUSED1 PHYS_TO_K1(0x01bdf300) | |
195 | #define IP27PROM_UNUSED1_SIZE 0x500 | |
196 | #define IP27PROM_ELSC_BASE_A PHYS_TO_K0(0x01bdf800) | |
197 | #define IP27PROM_ELSC_BASE_B PHYS_TO_K0(0x01bdfc00) | |
198 | #define IP27PROM_STACK_A PHYS_TO_K0(0x01be0000) | |
199 | #define IP27PROM_STACK_B PHYS_TO_K0(0x01bf0000) | |
200 | #define IP27PROM_STACK_SHFT 16 | |
201 | #define IP27PROM_STACK_SIZE (1 << IP27PROM_STACK_SHFT) | |
202 | #define IP27PROM_INIT_END PHYS_TO_K0(0x01c00000) | |
203 | ||
204 | #define SLAVESTACK_BASE PHYS_TO_K0(0x01580000) | |
205 | #define SLAVESTACK_SIZE 0x40000 | |
206 | ||
207 | #define ENETBUFS_BASE PHYS_TO_K0(0x01f80000) | |
208 | #define ENETBUFS_SIZE 0x20000 | |
209 | ||
210 | #define IO6PROM_BASE PHYS_TO_K0(0x01c00000) | |
211 | #define IO6PROM_SIZE 0x400000 | |
212 | #define IO6PROM_BASE_MAPPED (UNCAC_BASE | 0x11c00000) | |
213 | #define IO6DPROM_BASE PHYS_TO_K0(0x01c00000) | |
214 | #define IO6DPROM_SIZE 0x200000 | |
215 | ||
216 | #define NODEBUGUNIX_ADDR PHYS_TO_K0(0x00019000) | |
217 | #define DEBUGUNIX_ADDR PHYS_TO_K0(0x00100000) | |
218 | ||
219 | #define IP27PROM_INT_LAUNCH 10 /* and 11 */ | |
220 | #define IP27PROM_INT_NETUART 12 /* through 17 */ | |
221 | ||
222 | #endif /* PROM */ | |
223 | ||
224 | /* | |
225 | * needed by symmon so it needs to be outside #if PROM | |
226 | */ | |
227 | #define IP27PROM_ELSC_SHFT 10 | |
228 | #define IP27PROM_ELSC_SIZE (1 << IP27PROM_ELSC_SHFT) | |
229 | ||
230 | /* | |
231 | * This address is used by IO6PROM to build MemoryDescriptors of | |
232 | * free memory. This address is important since unix gets loaded | |
233 | * at this address, and this memory has to be FREE if unix is to | |
234 | * be loaded. | |
235 | */ | |
236 | ||
237 | #define FREEMEM_BASE PHYS_TO_K0(0x2000000) | |
238 | ||
239 | #define IO6PROM_STACK_SHFT 14 /* stack per cpu */ | |
240 | #define IO6PROM_STACK_SIZE (1 << IO6PROM_STACK_SHFT) | |
241 | ||
242 | /* | |
243 | * IP27 PROM vectors | |
244 | */ | |
245 | ||
246 | #define IP27PROM_ENTRY PHYS_TO_COMPATK1(0x1fc00000) | |
247 | #define IP27PROM_RESTART PHYS_TO_COMPATK1(0x1fc00008) | |
248 | #define IP27PROM_SLAVELOOP PHYS_TO_COMPATK1(0x1fc00010) | |
249 | #define IP27PROM_PODMODE PHYS_TO_COMPATK1(0x1fc00018) | |
250 | #define IP27PROM_IOC3UARTPOD PHYS_TO_COMPATK1(0x1fc00020) | |
251 | #define IP27PROM_FLASHLEDS PHYS_TO_COMPATK1(0x1fc00028) | |
252 | #define IP27PROM_REPOD PHYS_TO_COMPATK1(0x1fc00030) | |
253 | #define IP27PROM_LAUNCHSLAVE PHYS_TO_COMPATK1(0x1fc00038) | |
254 | #define IP27PROM_WAITSLAVE PHYS_TO_COMPATK1(0x1fc00040) | |
255 | #define IP27PROM_POLLSLAVE PHYS_TO_COMPATK1(0x1fc00048) | |
256 | ||
257 | #define KL_UART_BASE LOCAL_HUB_ADDR(MD_UREG0_0) /* base of UART regs */ | |
258 | #define KL_UART_CMD LOCAL_HUB_ADDR(MD_UREG0_0) /* UART command reg */ | |
259 | #define KL_UART_DATA LOCAL_HUB_ADDR(MD_UREG0_1) /* UART data reg */ | |
260 | #define KL_I2C_REG MD_UREG0_0 /* I2C reg */ | |
261 | ||
262 | #ifndef __ASSEMBLY__ | |
263 | ||
264 | /* Address 0x400 to 0x1000 ualias points to cache error eframe + misc | |
265 | * CACHE_ERR_SP_PTR could either contain an address to the stack, or | |
266 | * the stack could start at CACHE_ERR_SP_PTR | |
267 | */ | |
268 | #if defined (HUB_ERR_STS_WAR) | |
269 | #define CACHE_ERR_EFRAME 0x480 | |
270 | #else /* HUB_ERR_STS_WAR */ | |
271 | #define CACHE_ERR_EFRAME 0x400 | |
272 | #endif /* HUB_ERR_STS_WAR */ | |
273 | ||
274 | #define CACHE_ERR_ECCFRAME (CACHE_ERR_EFRAME + EF_SIZE) | |
275 | #define CACHE_ERR_SP_PTR (0x1000 - 32) /* why -32? TBD */ | |
276 | #define CACHE_ERR_IBASE_PTR (0x1000 - 40) | |
277 | #define CACHE_ERR_SP (CACHE_ERR_SP_PTR - 16) | |
278 | #define CACHE_ERR_AREA_SIZE (ARCS_SPB_OFFSET - CACHE_ERR_EFRAME) | |
279 | ||
280 | #endif /* !__ASSEMBLY__ */ | |
281 | ||
282 | #define _ARCSPROM | |
283 | ||
284 | #ifdef _STANDALONE | |
285 | ||
286 | /* | |
287 | * The PROM needs to pass the device base address and the | |
288 | * device pci cfg space address to the device drivers during | |
289 | * install. The COMPONENT->Key field is used for this purpose. | |
290 | * Macros needed by SN0 device drivers to convert the | |
291 | * COMPONENT->Key field to the respective base address. | |
292 | * Key field looks as follows: | |
293 | * | |
294 | * +----------------------------------------------------+ | |
295 | * |devnasid | widget |pciid |hubwidid|hstnasid | adap | | |
296 | * | 2 | 1 | 1 | 1 | 2 | 1 | | |
297 | * +----------------------------------------------------+ | |
298 | * | | | | | | | | |
299 | * 64 48 40 32 24 8 0 | |
300 | * | |
301 | * These are used by standalone drivers till the io infrastructure | |
302 | * is in place. | |
303 | */ | |
304 | ||
305 | #ifndef __ASSEMBLY__ | |
306 | ||
307 | #define uchar unsigned char | |
308 | ||
309 | #define KEY_DEVNASID_SHFT 48 | |
310 | #define KEY_WIDID_SHFT 40 | |
311 | #define KEY_PCIID_SHFT 32 | |
312 | #define KEY_HUBWID_SHFT 24 | |
313 | #define KEY_HSTNASID_SHFT 8 | |
314 | ||
315 | #define MK_SN0_KEY(nasid, widid, pciid) \ | |
316 | ((((__psunsigned_t)nasid)<< KEY_DEVNASID_SHFT |\ | |
317 | ((__psunsigned_t)widid) << KEY_WIDID_SHFT) |\ | |
318 | ((__psunsigned_t)pciid) << KEY_PCIID_SHFT) | |
319 | ||
320 | #define ADD_HUBWID_KEY(key,hubwid)\ | |
321 | (key|=((__psunsigned_t)hubwid << KEY_HUBWID_SHFT)) | |
322 | ||
323 | #define ADD_HSTNASID_KEY(key,hstnasid)\ | |
324 | (key|=((__psunsigned_t)hstnasid << KEY_HSTNASID_SHFT)) | |
325 | ||
326 | #define GET_DEVNASID_FROM_KEY(key) ((short)(key >> KEY_DEVNASID_SHFT)) | |
327 | #define GET_WIDID_FROM_KEY(key) ((uchar)(key >> KEY_WIDID_SHFT)) | |
328 | #define GET_PCIID_FROM_KEY(key) ((uchar)(key >> KEY_PCIID_SHFT)) | |
329 | #define GET_HUBWID_FROM_KEY(key) ((uchar)(key >> KEY_HUBWID_SHFT)) | |
330 | #define GET_HSTNASID_FROM_KEY(key) ((short)(key >> KEY_HSTNASID_SHFT)) | |
331 | ||
332 | #define PCI_64_TARGID_SHFT 60 | |
333 | ||
334 | #define GET_PCIBASE_FROM_KEY(key) (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\ | |
335 | GET_WIDID_FROM_KEY(key))\ | |
336 | | BRIDGE_DEVIO(GET_PCIID_FROM_KEY(key))) | |
337 | ||
338 | #define GET_PCICFGBASE_FROM_KEY(key) \ | |
339 | (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\ | |
340 | GET_WIDID_FROM_KEY(key))\ | |
341 | | BRIDGE_TYPE0_CFG_DEV(GET_PCIID_FROM_KEY(key))) | |
342 | ||
343 | #define GET_WIDBASE_FROM_KEY(key) \ | |
344 | (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\ | |
345 | GET_WIDID_FROM_KEY(key))) | |
346 | ||
347 | #define PUT_INSTALL_STATUS(c,s) c->Revision = s | |
348 | #define GET_INSTALL_STATUS(c) c->Revision | |
349 | ||
350 | #endif /* !__ASSEMBLY__ */ | |
351 | ||
352 | #endif /* _STANDALONE */ | |
353 | ||
354 | #if defined (HUB_ERR_STS_WAR) | |
355 | ||
356 | #define ERR_STS_WAR_REGISTER IIO_IIBUSERR | |
357 | #define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR) | |
358 | #define ERR_STS_WAR_PHYSADDR TO_PHYS((__psunsigned_t)ERR_STS_WAR_ADDR) | |
359 | /* Used to match addr in error reg. */ | |
360 | #define OLD_ERR_STS_WAR_OFFSET ((MD_MEM_BANKS * MD_BANK_SIZE) - 0x100) | |
361 | ||
362 | #endif /* HUB_ERR_STS_WAR */ | |
363 | ||
364 | #endif /* _ASM_SN_SN0_ADDRS_H */ |