[mirror_ubuntu-jammy-kernel.git] / include / asm-mips / stackframe.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994, 95, 96, 99, 2001 Ralf Baechle
 * Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
 * Copyright (C) 1999 Silicon Graphics, Inc.
 */
#ifndef _ASM_STACKFRAME_H
#define _ASM_STACKFRAME_H

#include <linux/config.h>
#include <linux/threads.h>

#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/asm-offsets.h>

		.macro	SAVE_AT
		.set	push
		.set	noat
		LONG_S	$1, PT_R1(sp)
		.set	pop
		.endm

		.macro	SAVE_TEMP
		mfhi	v1
#ifdef CONFIG_32BIT
		LONG_S	$8, PT_R8(sp)
		LONG_S	$9, PT_R9(sp)
#endif
		LONG_S	v1, PT_HI(sp)
		mflo	v1
		LONG_S	$10, PT_R10(sp)
		LONG_S	$11, PT_R11(sp)
		LONG_S	v1,  PT_LO(sp)
		LONG_S	$12, PT_R12(sp)
		LONG_S	$13, PT_R13(sp)
		LONG_S	$14, PT_R14(sp)
		LONG_S	$15, PT_R15(sp)
		LONG_S	$24, PT_R24(sp)
		.endm

		.macro	SAVE_STATIC
		LONG_S	$16, PT_R16(sp)
		LONG_S	$17, PT_R17(sp)
		LONG_S	$18, PT_R18(sp)
		LONG_S	$19, PT_R19(sp)
		LONG_S	$20, PT_R20(sp)
		LONG_S	$21, PT_R21(sp)
		LONG_S	$22, PT_R22(sp)
		LONG_S	$23, PT_R23(sp)
		LONG_S	$30, PT_R30(sp)
		.endm

#ifdef CONFIG_SMP
		.macro	get_saved_sp	/* SMP variation */
#ifdef CONFIG_32BIT
		mfc0	k0, CP0_CONTEXT
		lui	k1, %hi(kernelsp)
		srl	k0, k0, 23
		addu	k1, k0
		LONG_L	k1, %lo(kernelsp)(k1)
#endif
#ifdef CONFIG_64BIT
		MFC0	k1, CP0_CONTEXT
		lui	k0, %highest(kernelsp)
		dsrl	k1, 23
		daddiu	k0, %higher(kernelsp)
		dsll	k0, k0, 16
		daddiu	k0, %hi(kernelsp)
		dsll	k0, k0, 16
		daddu	k1, k1, k0
		LONG_L	k1, %lo(kernelsp)(k1)
#endif
		.endm

		.macro	set_saved_sp stackp temp temp2
#ifdef CONFIG_32BIT
		mfc0	\temp, CP0_CONTEXT
		srl	\temp, 23
#endif
#ifdef CONFIG_64BIT
		MFC0	\temp, CP0_CONTEXT
		dsrl	\temp, 23
#endif
		LONG_S	\stackp, kernelsp(\temp)
		.endm
#else
		.macro	get_saved_sp	/* Uniprocessor variation */
#ifdef CONFIG_64BIT
		lui	k1, %highest(kernelsp)
		daddiu	k1, %higher(kernelsp)
		dsll	k1, k1, 16
		daddiu	k1, %hi(kernelsp)
		dsll	k1, k1, 16
#else
		lui	k1, %hi(kernelsp)
#endif
		LONG_L	k1, %lo(kernelsp)(k1)
		.endm

		.macro	set_saved_sp stackp temp temp2
		LONG_S	\stackp, kernelsp
		.endm
#endif

		.macro	SAVE_SOME
		.set	push
		.set	noat
		.set	reorder
		mfc0	k0, CP0_STATUS
		sll	k0, 3		/* extract cu0 bit */
		.set	noreorder
		bltz	k0, 8f
		 move	k1, sp
		.set	reorder
		/* Called from user mode, new stack. */
		get_saved_sp
8:		move	k0, sp
		PTR_SUBU sp, k1, PT_SIZE
		LONG_S	k0, PT_R29(sp)
		LONG_S	$3, PT_R3(sp)
		LONG_S	$0, PT_R0(sp)
		mfc0	v1, CP0_STATUS
		LONG_S	$2, PT_R2(sp)
		LONG_S	v1, PT_STATUS(sp)
		LONG_S	$4, PT_R4(sp)
		mfc0	v1, CP0_CAUSE
		LONG_S	$5, PT_R5(sp)
		LONG_S	v1, PT_CAUSE(sp)
		LONG_S	$6, PT_R6(sp)
		MFC0	v1, CP0_EPC
		LONG_S	$7, PT_R7(sp)
#ifdef CONFIG_64BIT
		LONG_S	$8, PT_R8(sp)
		LONG_S	$9, PT_R9(sp)
#endif
		LONG_S	v1, PT_EPC(sp)
		LONG_S	$25, PT_R25(sp)
		LONG_S	$28, PT_R28(sp)
		LONG_S	$31, PT_R31(sp)
		ori	$28, sp, _THREAD_MASK
		xori	$28, _THREAD_MASK
		.set	pop
		.endm

		.macro	SAVE_ALL
		SAVE_SOME
		SAVE_AT
		SAVE_TEMP
		SAVE_STATIC
		.endm

		.macro	RESTORE_AT
		.set	push
		.set	noat
		LONG_L	$1,  PT_R1(sp)
		.set	pop
		.endm

		.macro	RESTORE_TEMP
		LONG_L	$24, PT_LO(sp)
#ifdef CONFIG_32BIT
		LONG_L	$8, PT_R8(sp)
		LONG_L	$9, PT_R9(sp)
#endif
		mtlo	$24
		LONG_L	$24, PT_HI(sp)
		LONG_L	$10, PT_R10(sp)
		LONG_L	$11, PT_R11(sp)
		mthi	$24
		LONG_L	$12, PT_R12(sp)
		LONG_L	$13, PT_R13(sp)
		LONG_L	$14, PT_R14(sp)
		LONG_L	$15, PT_R15(sp)
		LONG_L	$24, PT_R24(sp)
		.endm

		.macro	RESTORE_STATIC
		LONG_L	$16, PT_R16(sp)
		LONG_L	$17, PT_R17(sp)
		LONG_L	$18, PT_R18(sp)
		LONG_L	$19, PT_R19(sp)
		LONG_L	$20, PT_R20(sp)
		LONG_L	$21, PT_R21(sp)
		LONG_L	$22, PT_R22(sp)
		LONG_L	$23, PT_R23(sp)
		LONG_L	$30, PT_R30(sp)
		.endm

#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)

		.macro	RESTORE_SOME
		.set	push
		.set	reorder
		.set	noat
		mfc0	a0, CP0_STATUS
		ori	a0, 0x1f
		xori	a0, 0x1f
		mtc0	a0, CP0_STATUS
		li	v1, 0xff00
		and	a0, v1
		LONG_L	v0, PT_STATUS(sp)
		nor	v1, $0, v1
		and	v0, v1
		or	v0, a0
		mtc0	v0, CP0_STATUS
		LONG_L	$31, PT_R31(sp)
		LONG_L	$28, PT_R28(sp)
		LONG_L	$25, PT_R25(sp)
#ifdef CONFIG_64BIT
		LONG_L	$8, PT_R8(sp)
		LONG_L	$9, PT_R9(sp)
#endif
		LONG_L	$7,  PT_R7(sp)
		LONG_L	$6,  PT_R6(sp)
		LONG_L	$5,  PT_R5(sp)
		LONG_L	$4,  PT_R4(sp)
		LONG_L	$3,  PT_R3(sp)
		LONG_L	$2,  PT_R2(sp)
		.set	pop
		.endm

		.macro	RESTORE_SP_AND_RET
		.set	push
		.set	noreorder
		LONG_L	k0, PT_EPC(sp)
		LONG_L	sp, PT_R29(sp)
		jr	k0
		 rfe
		.set	pop
		.endm

#else

		.macro	RESTORE_SOME
		.set	push
		.set	reorder
		.set	noat
		mfc0	a0, CP0_STATUS
		ori	a0, 0x1f
		xori	a0, 0x1f
		mtc0	a0, CP0_STATUS
		li	v1, 0xff00
		and	a0, v1
		LONG_L	v0, PT_STATUS(sp)
		nor	v1, $0, v1
		and	v0, v1
		or	v0, a0
		mtc0	v0, CP0_STATUS
		LONG_L	v1, PT_EPC(sp)
		MTC0	v1, CP0_EPC
		LONG_L	$31, PT_R31(sp)
		LONG_L	$28, PT_R28(sp)
		LONG_L	$25, PT_R25(sp)
#ifdef CONFIG_64BIT
		LONG_L	$8, PT_R8(sp)
		LONG_L	$9, PT_R9(sp)
#endif
		LONG_L	$7,  PT_R7(sp)
		LONG_L	$6,  PT_R6(sp)
		LONG_L	$5,  PT_R5(sp)
		LONG_L	$4,  PT_R4(sp)
		LONG_L	$3,  PT_R3(sp)
		LONG_L	$2,  PT_R2(sp)
		.set	pop
		.endm

		.macro	RESTORE_SP_AND_RET
		LONG_L	sp, PT_R29(sp)
		.set	mips3
		eret
		.set	mips0
		.endm

#endif

		.macro	RESTORE_SP
		LONG_L	sp, PT_R29(sp)
		.endm

		.macro	RESTORE_ALL
		RESTORE_TEMP
		RESTORE_STATIC
		RESTORE_AT
		RESTORE_SOME
		RESTORE_SP
		.endm

		.macro	RESTORE_ALL_AND_RET
		RESTORE_TEMP
		RESTORE_STATIC
		RESTORE_AT
		RESTORE_SOME
		RESTORE_SP_AND_RET
		.endm

/*
 * Move to kernel mode and disable interrupts.
 * Set cp0 enable bit as sign that we're running on the kernel stack
 */
		.macro	CLI
		mfc0	t0, CP0_STATUS
		li	t1, ST0_CU0 | 0x1f
		or	t0, t1
		xori	t0, 0x1f
		mtc0	t0, CP0_STATUS
		irq_disable_hazard
		.endm

/*
 * Move to kernel mode and enable interrupts.
 * Set cp0 enable bit as sign that we're running on the kernel stack
 */
		.macro	STI
		mfc0	t0, CP0_STATUS
		li	t1, ST0_CU0 | 0x1f
		or	t0, t1
		xori	t0, 0x1e
		mtc0	t0, CP0_STATUS
		irq_enable_hazard
		.endm

/*
 * Just move to kernel mode and leave interrupts as they are.
 * Set cp0 enable bit as sign that we're running on the kernel stack
 */
		.macro	KMODE
		mfc0	t0, CP0_STATUS
		li	t1, ST0_CU0 | 0x1e
		or	t0, t1
		xori	t0, 0x1e
		mtc0	t0, CP0_STATUS
		irq_disable_hazard
		.endm

#endif /* _ASM_STACKFRAME_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1994, 95, 96, 99, 2001 Ralf Baechle
	7	* Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
	8	* Copyright (C) 1999 Silicon Graphics, Inc.
	9	*/
	10	#ifndef _ASM_STACKFRAME_H
	11	#define _ASM_STACKFRAME_H
	12
	13	#include <linux/config.h>
	14	#include <linux/threads.h>
	15
	16	#include <asm/asm.h>
	17	#include <asm/mipsregs.h>
048eb582	18	#include <asm/asm-offsets.h>
1da177e4 LT	19
	20	.macro SAVE_AT
	21	.set push
	22	.set noat
	23	LONG_S $1, PT_R1(sp)
	24	.set pop
	25	.endm
	26
	27	.macro SAVE_TEMP
	28	mfhi v1
875d43e7	29	#ifdef CONFIG_32BIT
1da177e4 LT	30	LONG_S $8, PT_R8(sp)
	31	LONG_S $9, PT_R9(sp)
	32	#endif
	33	LONG_S v1, PT_HI(sp)
	34	mflo v1
	35	LONG_S $10, PT_R10(sp)
	36	LONG_S $11, PT_R11(sp)
	37	LONG_S v1, PT_LO(sp)
	38	LONG_S $12, PT_R12(sp)
	39	LONG_S $13, PT_R13(sp)
	40	LONG_S $14, PT_R14(sp)
	41	LONG_S $15, PT_R15(sp)
	42	LONG_S $24, PT_R24(sp)
	43	.endm
	44
	45	.macro SAVE_STATIC
	46	LONG_S $16, PT_R16(sp)
	47	LONG_S $17, PT_R17(sp)
	48	LONG_S $18, PT_R18(sp)
	49	LONG_S $19, PT_R19(sp)
	50	LONG_S $20, PT_R20(sp)
	51	LONG_S $21, PT_R21(sp)
	52	LONG_S $22, PT_R22(sp)
	53	LONG_S $23, PT_R23(sp)
	54	LONG_S $30, PT_R30(sp)
	55	.endm
	56
	57	#ifdef CONFIG_SMP
	58	.macro get_saved_sp /* SMP variation */
875d43e7	59	#ifdef CONFIG_32BIT
1da177e4 LT	60	mfc0 k0, CP0_CONTEXT
	61	lui k1, %hi(kernelsp)
	62	srl k0, k0, 23
1da177e4 LT	63	addu k1, k0
	64	LONG_L k1, %lo(kernelsp)(k1)
	65	#endif
8145095c	66	#ifdef CONFIG_64BIT
1da177e4	67	MFC0 k1, CP0_CONTEXT
85b6e818	68	lui k0, %highest(kernelsp)
1b3a6e97	69	dsrl k1, 23
85b6e818 RB	70	daddiu k0, %higher(kernelsp)
	71	dsll k0, k0, 16
	72	daddiu k0, %hi(kernelsp)
1b3a6e97	73	dsll k0, k0, 16
85b6e818 RB	74	daddu k1, k1, k0
85b6e818 RB	75	LONG_L k1, %lo(kernelsp)(k1)
1da177e4 LT	76	#endif
	77	.endm
	78
	79	.macro set_saved_sp stackp temp temp2
875d43e7	80	#ifdef CONFIG_32BIT
1da177e4 LT	81	mfc0 \temp, CP0_CONTEXT
1da177e4 LT	82	srl \temp, 23
1da177e4	83	#endif
8145095c	84	#ifdef CONFIG_64BIT
1b3a6e97 TS	85	MFC0 \temp, CP0_CONTEXT
1b3a6e97 TS	86	dsrl \temp, 23
1da177e4	87	#endif
9556ac2f	88	LONG_S \stackp, kernelsp(\temp)
1da177e4 LT	89	.endm
	90	#else
	91	.macro get_saved_sp /* Uniprocessor variation */
8145095c	92	#ifdef CONFIG_64BIT
9556ac2f TS	93	lui k1, %highest(kernelsp)
	94	daddiu k1, %higher(kernelsp)
	95	dsll k1, k1, 16
	96	daddiu k1, %hi(kernelsp)
	97	dsll k1, k1, 16
	98	#else
1da177e4	99	lui k1, %hi(kernelsp)
9556ac2f	100	#endif
1da177e4 LT	101	LONG_L k1, %lo(kernelsp)(k1)
	102	.endm
	103
	104	.macro set_saved_sp stackp temp temp2
	105	LONG_S \stackp, kernelsp
	106	.endm
	107	#endif
	108
	109	.macro SAVE_SOME
	110	.set push
	111	.set noat
	112	.set reorder
	113	mfc0 k0, CP0_STATUS
	114	sll k0, 3 /* extract cu0 bit */
	115	.set noreorder
	116	bltz k0, 8f
	117	move k1, sp
	118	.set reorder
	119	/* Called from user mode, new stack. */
	120	get_saved_sp
	121	8: move k0, sp
	122	PTR_SUBU sp, k1, PT_SIZE
	123	LONG_S k0, PT_R29(sp)
	124	LONG_S $3, PT_R3(sp)
	125	LONG_S $0, PT_R0(sp)
	126	mfc0 v1, CP0_STATUS
	127	LONG_S $2, PT_R2(sp)
	128	LONG_S v1, PT_STATUS(sp)
	129	LONG_S $4, PT_R4(sp)
	130	mfc0 v1, CP0_CAUSE
	131	LONG_S $5, PT_R5(sp)
	132	LONG_S v1, PT_CAUSE(sp)
	133	LONG_S $6, PT_R6(sp)
	134	MFC0 v1, CP0_EPC
	135	LONG_S $7, PT_R7(sp)
875d43e7	136	#ifdef CONFIG_64BIT
1da177e4 LT	137	LONG_S $8, PT_R8(sp)
	138	LONG_S $9, PT_R9(sp)
	139	#endif
	140	LONG_S v1, PT_EPC(sp)
	141	LONG_S $25, PT_R25(sp)
	142	LONG_S $28, PT_R28(sp)
	143	LONG_S $31, PT_R31(sp)
	144	ori $28, sp, _THREAD_MASK
	145	xori $28, _THREAD_MASK
	146	.set pop
	147	.endm
	148
	149	.macro SAVE_ALL
	150	SAVE_SOME
	151	SAVE_AT
	152	SAVE_TEMP
	153	SAVE_STATIC
	154	.endm
	155
	156	.macro RESTORE_AT
	157	.set push
	158	.set noat
	159	LONG_L $1, PT_R1(sp)
	160	.set pop
	161	.endm
	162
	163	.macro RESTORE_TEMP
	164	LONG_L $24, PT_LO(sp)
875d43e7	165	#ifdef CONFIG_32BIT
1da177e4 LT	166	LONG_L $8, PT_R8(sp)
	167	LONG_L $9, PT_R9(sp)
	168	#endif
	169	mtlo $24
	170	LONG_L $24, PT_HI(sp)
	171	LONG_L $10, PT_R10(sp)
	172	LONG_L $11, PT_R11(sp)
	173	mthi $24
	174	LONG_L $12, PT_R12(sp)
	175	LONG_L $13, PT_R13(sp)
	176	LONG_L $14, PT_R14(sp)
	177	LONG_L $15, PT_R15(sp)
	178	LONG_L $24, PT_R24(sp)
	179	.endm
	180
	181	.macro RESTORE_STATIC
	182	LONG_L $16, PT_R16(sp)
	183	LONG_L $17, PT_R17(sp)
	184	LONG_L $18, PT_R18(sp)
	185	LONG_L $19, PT_R19(sp)
	186	LONG_L $20, PT_R20(sp)
	187	LONG_L $21, PT_R21(sp)
	188	LONG_L $22, PT_R22(sp)
	189	LONG_L $23, PT_R23(sp)
	190	LONG_L $30, PT_R30(sp)
	191	.endm
	192
	193	#if defined(CONFIG_CPU_R3000) \|\| defined(CONFIG_CPU_TX39XX)
	194
	195	.macro RESTORE_SOME
	196	.set push
	197	.set reorder
	198	.set noat
	199	mfc0 a0, CP0_STATUS
	200	ori a0, 0x1f
	201	xori a0, 0x1f
	202	mtc0 a0, CP0_STATUS
	203	li v1, 0xff00
	204	and a0, v1
	205	LONG_L v0, PT_STATUS(sp)
	206	nor v1, $0, v1
	207	and v0, v1
	208	or v0, a0
	209	mtc0 v0, CP0_STATUS
	210	LONG_L $31, PT_R31(sp)
	211	LONG_L $28, PT_R28(sp)
	212	LONG_L $25, PT_R25(sp)
875d43e7	213	#ifdef CONFIG_64BIT
1da177e4 LT	214	LONG_L $8, PT_R8(sp)
	215	LONG_L $9, PT_R9(sp)
	216	#endif
	217	LONG_L $7, PT_R7(sp)
	218	LONG_L $6, PT_R6(sp)
	219	LONG_L $5, PT_R5(sp)
	220	LONG_L $4, PT_R4(sp)
	221	LONG_L $3, PT_R3(sp)
	222	LONG_L $2, PT_R2(sp)
	223	.set pop
	224	.endm
	225
	226	.macro RESTORE_SP_AND_RET
	227	.set push
	228	.set noreorder
	229	LONG_L k0, PT_EPC(sp)
	230	LONG_L sp, PT_R29(sp)
	231	jr k0
	232	rfe
	233	.set pop
	234	.endm
	235
	236	#else
	237
	238	.macro RESTORE_SOME
	239	.set push
	240	.set reorder
	241	.set noat
	242	mfc0 a0, CP0_STATUS
	243	ori a0, 0x1f
	244	xori a0, 0x1f
	245	mtc0 a0, CP0_STATUS
	246	li v1, 0xff00
	247	and a0, v1
	248	LONG_L v0, PT_STATUS(sp)
	249	nor v1, $0, v1
	250	and v0, v1
	251	or v0, a0
	252	mtc0 v0, CP0_STATUS
	253	LONG_L v1, PT_EPC(sp)
	254	MTC0 v1, CP0_EPC
	255	LONG_L $31, PT_R31(sp)
	256	LONG_L $28, PT_R28(sp)
	257	LONG_L $25, PT_R25(sp)
875d43e7	258	#ifdef CONFIG_64BIT
1da177e4 LT	259	LONG_L $8, PT_R8(sp)
	260	LONG_L $9, PT_R9(sp)
	261	#endif
	262	LONG_L $7, PT_R7(sp)
	263	LONG_L $6, PT_R6(sp)
	264	LONG_L $5, PT_R5(sp)
	265	LONG_L $4, PT_R4(sp)
	266	LONG_L $3, PT_R3(sp)
	267	LONG_L $2, PT_R2(sp)
	268	.set pop
	269	.endm
	270
	271	.macro RESTORE_SP_AND_RET
	272	LONG_L sp, PT_R29(sp)
	273	.set mips3
	274	eret
	275	.set mips0
	276	.endm
	277
	278	#endif
	279
	280	.macro RESTORE_SP
	281	LONG_L sp, PT_R29(sp)
	282	.endm
	283
	284	.macro RESTORE_ALL
	285	RESTORE_TEMP
	286	RESTORE_STATIC
	287	RESTORE_AT
	288	RESTORE_SOME
	289	RESTORE_SP
	290	.endm
	291
	292	.macro RESTORE_ALL_AND_RET
	293	RESTORE_TEMP
	294	RESTORE_STATIC
	295	RESTORE_AT
	296	RESTORE_SOME
	297	RESTORE_SP_AND_RET
	298	.endm
	299
	300	/*
	301	* Move to kernel mode and disable interrupts.
	302	* Set cp0 enable bit as sign that we're running on the kernel stack
	303	*/
	304	.macro CLI
	305	mfc0 t0, CP0_STATUS
	306	li t1, ST0_CU0 \| 0x1f
	307	or t0, t1
	308	xori t0, 0x1f
	309	mtc0 t0, CP0_STATUS
	310	irq_disable_hazard
	311	.endm
	312
	313	/*
	314	* Move to kernel mode and enable interrupts.
	315	* Set cp0 enable bit as sign that we're running on the kernel stack
	316	*/
	317	.macro STI
	318	mfc0 t0, CP0_STATUS
	319	li t1, ST0_CU0 \| 0x1f
	320	or t0, t1
	321	xori t0, 0x1e
	322	mtc0 t0, CP0_STATUS
323	irq_enable_hazard
324	.endm
325
326	/*
327	* Just move to kernel mode and leave interrupts as they are.
328	* Set cp0 enable bit as sign that we're running on the kernel stack
329	*/
330	.macro KMODE
331	mfc0 t0, CP0_STATUS
332	li t1, ST0_CU0 \| 0x1e
333	or t0, t1
334	xori t0, 0x1e
335	mtc0 t0, CP0_STATUS
336	irq_disable_hazard
337	.endm
338
339	#endif /* _ASM_STACKFRAME_H */