]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #ifndef _PARISC_DMA_MAPPING_H |
2 | #define _PARISC_DMA_MAPPING_H | |
3 | ||
4 | #include <linux/config.h> | |
5 | #include <linux/mm.h> | |
6 | #include <asm/cacheflush.h> | |
7 | #include <asm/scatterlist.h> | |
8 | ||
9 | /* See Documentation/DMA-mapping.txt */ | |
10 | struct hppa_dma_ops { | |
11 | int (*dma_supported)(struct device *dev, u64 mask); | |
5c1fb41f AV |
12 | void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag); |
13 | void *(*alloc_noncoherent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag); | |
1da177e4 LT |
14 | void (*free_consistent)(struct device *dev, size_t size, void *vaddr, dma_addr_t iova); |
15 | dma_addr_t (*map_single)(struct device *dev, void *addr, size_t size, enum dma_data_direction direction); | |
16 | void (*unmap_single)(struct device *dev, dma_addr_t iova, size_t size, enum dma_data_direction direction); | |
17 | int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction); | |
18 | void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nhwents, enum dma_data_direction direction); | |
19 | void (*dma_sync_single_for_cpu)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction); | |
20 | void (*dma_sync_single_for_device)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction); | |
21 | void (*dma_sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction); | |
22 | void (*dma_sync_sg_for_device)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction); | |
23 | }; | |
24 | ||
25 | /* | |
26 | ** We could live without the hppa_dma_ops indirection if we didn't want | |
27 | ** to support 4 different coherent dma models with one binary (they will | |
28 | ** someday be loadable modules): | |
29 | ** I/O MMU consistent method dma_sync behavior | |
30 | ** ============= ====================== ======================= | |
31 | ** a) PA-7x00LC uncachable host memory flush/purge | |
32 | ** b) U2/Uturn cachable host memory NOP | |
33 | ** c) Ike/Astro cachable host memory NOP | |
34 | ** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel | |
35 | ** | |
36 | ** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU. | |
37 | ** | |
38 | ** Systems (eg PCX-T workstations) that don't fall into the above | |
39 | ** categories will need to modify the needed drivers to perform | |
40 | ** flush/purge and allocate "regular" cacheable pages for everything. | |
41 | */ | |
42 | ||
43 | #ifdef CONFIG_PA11 | |
44 | extern struct hppa_dma_ops pcxl_dma_ops; | |
45 | extern struct hppa_dma_ops pcx_dma_ops; | |
46 | #endif | |
47 | ||
48 | extern struct hppa_dma_ops *hppa_dma_ops; | |
49 | ||
50 | static inline void * | |
51 | dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, | |
5c1fb41f | 52 | gfp_t flag) |
1da177e4 LT |
53 | { |
54 | return hppa_dma_ops->alloc_consistent(dev, size, dma_handle, flag); | |
55 | } | |
56 | ||
57 | static inline void * | |
58 | dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle, | |
5c1fb41f | 59 | gfp_t flag) |
1da177e4 LT |
60 | { |
61 | return hppa_dma_ops->alloc_noncoherent(dev, size, dma_handle, flag); | |
62 | } | |
63 | ||
64 | static inline void | |
65 | dma_free_coherent(struct device *dev, size_t size, | |
66 | void *vaddr, dma_addr_t dma_handle) | |
67 | { | |
68 | hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle); | |
69 | } | |
70 | ||
71 | static inline void | |
72 | dma_free_noncoherent(struct device *dev, size_t size, | |
73 | void *vaddr, dma_addr_t dma_handle) | |
74 | { | |
75 | hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle); | |
76 | } | |
77 | ||
78 | static inline dma_addr_t | |
79 | dma_map_single(struct device *dev, void *ptr, size_t size, | |
80 | enum dma_data_direction direction) | |
81 | { | |
82 | return hppa_dma_ops->map_single(dev, ptr, size, direction); | |
83 | } | |
84 | ||
85 | static inline void | |
86 | dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | |
87 | enum dma_data_direction direction) | |
88 | { | |
89 | hppa_dma_ops->unmap_single(dev, dma_addr, size, direction); | |
90 | } | |
91 | ||
92 | static inline int | |
93 | dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | |
94 | enum dma_data_direction direction) | |
95 | { | |
96 | return hppa_dma_ops->map_sg(dev, sg, nents, direction); | |
97 | } | |
98 | ||
99 | static inline void | |
100 | dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, | |
101 | enum dma_data_direction direction) | |
102 | { | |
103 | hppa_dma_ops->unmap_sg(dev, sg, nhwentries, direction); | |
104 | } | |
105 | ||
106 | static inline dma_addr_t | |
107 | dma_map_page(struct device *dev, struct page *page, unsigned long offset, | |
108 | size_t size, enum dma_data_direction direction) | |
109 | { | |
110 | return dma_map_single(dev, (page_address(page) + (offset)), size, direction); | |
111 | } | |
112 | ||
113 | static inline void | |
114 | dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, | |
115 | enum dma_data_direction direction) | |
116 | { | |
117 | dma_unmap_single(dev, dma_address, size, direction); | |
118 | } | |
119 | ||
120 | ||
121 | static inline void | |
122 | dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, | |
123 | enum dma_data_direction direction) | |
124 | { | |
125 | if(hppa_dma_ops->dma_sync_single_for_cpu) | |
126 | hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, 0, size, direction); | |
127 | } | |
128 | ||
129 | static inline void | |
130 | dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, | |
131 | enum dma_data_direction direction) | |
132 | { | |
133 | if(hppa_dma_ops->dma_sync_single_for_device) | |
134 | hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, 0, size, direction); | |
135 | } | |
136 | ||
137 | static inline void | |
138 | dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, | |
139 | unsigned long offset, size_t size, | |
140 | enum dma_data_direction direction) | |
141 | { | |
142 | if(hppa_dma_ops->dma_sync_single_for_cpu) | |
143 | hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, offset, size, direction); | |
144 | } | |
145 | ||
146 | static inline void | |
147 | dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, | |
148 | unsigned long offset, size_t size, | |
149 | enum dma_data_direction direction) | |
150 | { | |
151 | if(hppa_dma_ops->dma_sync_single_for_device) | |
152 | hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, offset, size, direction); | |
153 | } | |
154 | ||
155 | static inline void | |
156 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, | |
157 | enum dma_data_direction direction) | |
158 | { | |
159 | if(hppa_dma_ops->dma_sync_sg_for_cpu) | |
160 | hppa_dma_ops->dma_sync_sg_for_cpu(dev, sg, nelems, direction); | |
161 | } | |
162 | ||
163 | static inline void | |
164 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, | |
165 | enum dma_data_direction direction) | |
166 | { | |
167 | if(hppa_dma_ops->dma_sync_sg_for_device) | |
168 | hppa_dma_ops->dma_sync_sg_for_device(dev, sg, nelems, direction); | |
169 | } | |
170 | ||
171 | static inline int | |
172 | dma_supported(struct device *dev, u64 mask) | |
173 | { | |
174 | return hppa_dma_ops->dma_supported(dev, mask); | |
175 | } | |
176 | ||
177 | static inline int | |
178 | dma_set_mask(struct device *dev, u64 mask) | |
179 | { | |
180 | if(!dev->dma_mask || !dma_supported(dev, mask)) | |
181 | return -EIO; | |
182 | ||
183 | *dev->dma_mask = mask; | |
184 | ||
185 | return 0; | |
186 | } | |
187 | ||
188 | static inline int | |
189 | dma_get_cache_alignment(void) | |
190 | { | |
191 | return dcache_stride; | |
192 | } | |
193 | ||
194 | static inline int | |
195 | dma_is_consistent(dma_addr_t dma_addr) | |
196 | { | |
197 | return (hppa_dma_ops->dma_sync_single_for_cpu == NULL); | |
198 | } | |
199 | ||
200 | static inline void | |
201 | dma_cache_sync(void *vaddr, size_t size, | |
202 | enum dma_data_direction direction) | |
203 | { | |
204 | if(hppa_dma_ops->dma_sync_single_for_cpu) | |
205 | flush_kernel_dcache_range((unsigned long)vaddr, size); | |
206 | } | |
207 | ||
208 | static inline void * | |
209 | parisc_walk_tree(struct device *dev) | |
210 | { | |
211 | struct device *otherdev; | |
212 | if(likely(dev->platform_data != NULL)) | |
213 | return dev->platform_data; | |
214 | /* OK, just traverse the bus to find it */ | |
215 | for(otherdev = dev->parent; otherdev; | |
216 | otherdev = otherdev->parent) { | |
217 | if(otherdev->platform_data) { | |
218 | dev->platform_data = otherdev->platform_data; | |
219 | break; | |
220 | } | |
221 | } | |
222 | BUG_ON(!dev->platform_data); | |
223 | return dev->platform_data; | |
224 | } | |
225 | ||
226 | #define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu); | |
227 | ||
228 | ||
229 | #ifdef CONFIG_IOMMU_CCIO | |
230 | struct parisc_device; | |
231 | struct ioc; | |
232 | void * ccio_get_iommu(const struct parisc_device *dev); | |
233 | int ccio_request_resource(const struct parisc_device *dev, | |
234 | struct resource *res); | |
235 | int ccio_allocate_resource(const struct parisc_device *dev, | |
236 | struct resource *res, unsigned long size, | |
237 | unsigned long min, unsigned long max, unsigned long align); | |
238 | #else /* !CONFIG_IOMMU_CCIO */ | |
239 | #define ccio_get_iommu(dev) NULL | |
240 | #define ccio_request_resource(dev, res) request_resource(&iomem_resource, res) | |
241 | #define ccio_allocate_resource(dev, res, size, min, max, align) \ | |
242 | allocate_resource(&iomem_resource, res, size, min, max, \ | |
243 | align, NULL, NULL) | |
244 | #endif /* !CONFIG_IOMMU_CCIO */ | |
245 | ||
246 | #ifdef CONFIG_IOMMU_SBA | |
247 | struct parisc_device; | |
248 | void * sba_get_iommu(struct parisc_device *dev); | |
249 | #endif | |
250 | ||
251 | /* At the moment, we panic on error for IOMMU resource exaustion */ | |
252 | #define dma_mapping_error(x) 0 | |
253 | ||
254 | #endif |